OpenCores
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Subversion Repositories ao68000

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  <div class="summary">
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<a href="#Inputs">Inputs</a> &#124;
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<a href="#Outputs">Outputs</a> &#124;
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<a href="#Signals">Signals</a> &#124;
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<a href="#Module Instances">Module Instances</a>  </div>
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<h1>ao68000 Module Reference</h1>  </div>
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<!-- doxytag: class="ao68000" --><!-- doxytag: inherits="bus_control,registers,memory_registers,decoder,condition,alu,microcode_branch" -->
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<p><a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> top level module.
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Inheritance diagram for ao68000:<!-- endSectionHeader --></div>
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 </div><!-- endSectionContent --></div>
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<p><a href="classao68000-members.html">List of all members.</a></p>
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<table class="memberdecls">
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<tr><td colspan="2"><h2><a name="Inputs"></a>
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Inputs</h2></td></tr>
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 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">CLK_I</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Clock Input </p>
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  <a href="#a6bee7e749a667293d6fbea8fc1380d12"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a5c903f753511ea2ec94145415549a148">reset_n</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>Asynchronous Reset Input </p>
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  <a href="#a5c903f753511ea2ec94145415549a148"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#abffdd6f5cefb3be32b6db5bfc6b56442">DAT_I</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Data Input </p>
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  <a href="#abffdd6f5cefb3be32b6db5bfc6b56442"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a818ab80622c2364eb33814a5ef1f33ba">ACK_I</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Acknowledge Input:</p>
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<ul>
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<li>on normal cycle: acknowledge,</li>
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<li>on interrupt acknowledge cycle: external vector provided on DAT_I[7:0]. </li>
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</ul>
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  <a href="#a818ab80622c2364eb33814a5ef1f33ba"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a2a1a525f5a12c4e4a67bdf9fdf6df2be">ERR_I</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Error Input</p>
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<ul>
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<li>on normal cycle: bus error,</li>
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<li>on interrupt acknowledge cycle: spurious interrupt. </li>
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</ul>
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  <a href="#a2a1a525f5a12c4e4a67bdf9fdf6df2be"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#af26604192b486b62964b9fada0bc6aff">RTY_I</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Retry Input</p>
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<ul>
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<li>on normal cycle: retry bus cycle,</li>
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<li>on interrupt acknowledge: use auto-vector. </li>
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</ul>
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  <a href="#af26604192b486b62964b9fada0bc6aff"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a1ff11e699c0192bb533209bd3cf9d5ba">ipl_i</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>Interrupt Priority Level Interrupt acknowledge cycle:</p>
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<ul>
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<li>ACK_I: interrupt vector on DAT_I[7:0],</li>
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<li>ERR_I: spurious interrupt,</li>
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<li>RTY_I: auto-vector. </li>
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</ul>
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  <a href="#a1ff11e699c0192bb533209bd3cf9d5ba"></a><br/></td></tr>
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<br/>
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<tr><td colspan="2"><h2><a name="Outputs"></a>
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Outputs</h2></td></tr>
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 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a61843aa9b51ba23ec6c8c35892366559">CYC_O</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Cycle Output </p>
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  <a href="#a61843aa9b51ba23ec6c8c35892366559"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a277895ba6004986cf490068945998fd0">ADR_O</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Address Output </p>
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  <a href="#a277895ba6004986cf490068945998fd0"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a801fbb1ae4c2812332242ce5d746cf36">DAT_O</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Data Output </p>
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  <a href="#a801fbb1ae4c2812332242ce5d746cf36"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#ae636550dd8481fd101623d0c665e894c">SEL_O</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Byte Select </p>
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  <a href="#ae636550dd8481fd101623d0c665e894c"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a0e045730861ed97d585a192fcbbfd8a5">STB_O</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Strobe Output </p>
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  <a href="#a0e045730861ed97d585a192fcbbfd8a5"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a6cd0052d2c68597331280fe500366be4">WE_O</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Master Write Enable Output </p>
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  <a href="#a6cd0052d2c68597331280fe500366be4"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a067f51b370f090178fbe8248b48f50b0">SGL_O</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Single Bus Cycle. </p>
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  <a href="#a067f51b370f090178fbe8248b48f50b0"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#af57b8a8680a72f392a1f2af3ee2b61a9">BLK_O</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Block Bus Cycle. </p>
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  <a href="#af57b8a8680a72f392a1f2af3ee2b61a9"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a951678555b50fc9229fe9b553c7b09d0">RMW_O</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Read-Modify-Write Cycle. </p>
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  <a href="#a951678555b50fc9229fe9b553c7b09d0"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a02037d382851d62248a83cbc35dd1529">CTI_O</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Address Tag, TAG_TYPE: TGA_O, Cycle Type Identifier, Incrementing Bus Cycle or End-of-Burst Cycle. </p>
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  <a href="#a02037d382851d62248a83cbc35dd1529"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a08f46078858b7e8b6f2dfe2f6ec20c84">BTE_O</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>WISHBONE Address Tag, TAG_TYPE: TGA_O, Burst Type Extension, always Linear Burst. </p>
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  <a href="#a08f46078858b7e8b6f2dfe2f6ec20c84"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a4b66c96fdd706df792811882b6f9fa9b">fc_o</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>Custom TAG_TYPE: TGC_O, Cycle Tag, Processor Function Code:</p>
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<ul>
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<li>1 - user data,</li>
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<li>2 - user program,</li>
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<li>5 - supervisor data : all exception vector entries except reset,</li>
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<li>6 - supervisor program : exception vector for reset,</li>
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<li>7 - cpu space: interrupt acknowledge. </li>
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</ul>
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  <a href="#a4b66c96fdd706df792811882b6f9fa9b"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a8246303a982cd24ff7dcc7b36c3038e2">reset_o</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>External device reset. Output high when processing the RESET instruction. </p>
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  <a href="#a8246303a982cd24ff7dcc7b36c3038e2"></a><br/></td></tr>
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<br/>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">blocked_o</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight"><p>Processor blocked indicator. The processor is blocked after a double bus error. </p>
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  <a href="#a0a90a371e379531c8e466799ff5c3d49"></a><br/></td></tr>
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<br/>
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<tr><td colspan="2"><h2><a name="Module Instances"></a>
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Module Instances</h2></td></tr>
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 <tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classao68000.html#a2c34e1b84d9fe30c49c5c814be3dc392">bus_control::bus_control_m</a>  </b>&#160;</td><td class="memItemRight" valign="bottom">   <b>Module</b><em> <a class="el" href="classbus__control.html">bus_control</a></em></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classao68000.html#ad82deea9ab15d2e02890df123ad51fd9">registers::registers_m</a>  </b>&#160;</td><td class="memItemRight" valign="bottom">   <b>Module</b><em> <a class="el" href="classregisters.html">registers</a></em></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classao68000.html#ab85a25c3b08b1de81856944a16fafd5d">memory_registers::memory_registers_m</a>  </b>&#160;</td><td class="memItemRight" valign="bottom">   <b>Module</b><em> <a class="el" href="classmemory__registers.html">memory_registers</a></em></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classao68000.html#a6f5a57c27d91cf2c4092c71adf13ae81">decoder::decoder_m</a>  </b>&#160;</td><td class="memItemRight" valign="bottom">   <b>Module</b><em> <a class="el" href="classdecoder.html">decoder</a></em></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classao68000.html#a30446f4f602b6185a7ed25e5aa8e470e">condition::condition_m</a>  </b>&#160;</td><td class="memItemRight" valign="bottom">   <b>Module</b><em> <a class="el" href="classcondition.html">condition</a></em></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classao68000.html#a63ee30297781426b4dd11d052490997f">alu::alu_m</a>  </b>&#160;</td><td class="memItemRight" valign="bottom">   <b>Module</b><em> <a class="el" href="classalu.html">alu</a></em></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classao68000.html#a753de474d4bdb41b494fed2539290cc4">microcode_branch::microcode_branch_m</a>  </b>&#160;</td><td class="memItemRight" valign="bottom">   <b>Module</b><em> <a class="el" href="classmicrocode__branch.html">microcode_branch</a></em></td></tr>
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<tr><td colspan="2"><h2><a name="Signals"></a>
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Signals</h2></td></tr>
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 <tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classao68000.html#a608eadff9f4d94d93a9a08c244e93aa7">size</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classao68000.html#a341be6a91dd12d14293eaa53c7c254d2">data_read</a> </td></tr>
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</table>
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<hr/><a name="_details"></a><h2>Detailed Description</h2>
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<p><a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> top level module. </p>
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<p>This module contains only instantiations of sub-modules and wire declarations. </p>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00405">405</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
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<hr/><h2>Member Data Documentation</h2>
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<a class="anchor" id="a6bee7e749a667293d6fbea8fc1380d12"></a><!-- doxytag: member="ao68000::CLK_I" ref="a6bee7e749a667293d6fbea8fc1380d12" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">CLK_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
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<p><p>WISHBONE Clock Input </p>
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 </p>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00407">407</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
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<a class="anchor" id="a2a1a525f5a12c4e4a67bdf9fdf6df2be"></a><!-- doxytag: member="ao68000::ERR_I" ref="a2a1a525f5a12c4e4a67bdf9fdf6df2be" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a2a1a525f5a12c4e4a67bdf9fdf6df2be">ERR_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p><p>WISHBONE Master Error Input</p>
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<ul>
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<li>on normal cycle: bus error,</li>
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<li>on interrupt acknowledge cycle: spurious interrupt. </li>
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 </p>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00419">419</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
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<a class="anchor" id="af26604192b486b62964b9fada0bc6aff"></a><!-- doxytag: member="ao68000::RTY_I" ref="af26604192b486b62964b9fada0bc6aff" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#af26604192b486b62964b9fada0bc6aff">RTY_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
288
        </tr>
289
      </table>
290
</div>
291
<div class="memdoc">
292
 
293
<p><p>WISHBONE Master Retry Input</p>
294
<ul>
295
<li>on normal cycle: retry bus cycle,</li>
296
<li>on interrupt acknowledge: use auto-vector. </li>
297
</ul>
298
 </p>
299
 
300
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00420">420</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
301
 
302
</div>
303
</div>
304
<a class="anchor" id="a067f51b370f090178fbe8248b48f50b0"></a><!-- doxytag: member="ao68000::SGL_O" ref="a067f51b370f090178fbe8248b48f50b0" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a067f51b370f090178fbe8248b48f50b0">SGL_O</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
310
        </tr>
311
      </table>
312
</div>
313
<div class="memdoc">
314
 
315
<p><p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Single Bus Cycle. </p>
316
 </p>
317
 
318
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00423">423</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
319
 
320
</div>
321
</div>
322
<a class="anchor" id="af57b8a8680a72f392a1f2af3ee2b61a9"></a><!-- doxytag: member="ao68000::BLK_O" ref="af57b8a8680a72f392a1f2af3ee2b61a9" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#af57b8a8680a72f392a1f2af3ee2b61a9">BLK_O</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
328
        </tr>
329
      </table>
330
</div>
331
<div class="memdoc">
332
 
333
<p><p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Block Bus Cycle. </p>
334
 </p>
335
 
336
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00424">424</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
337
 
338
</div>
339
</div>
340
<a class="anchor" id="a951678555b50fc9229fe9b553c7b09d0"></a><!-- doxytag: member="ao68000::RMW_O" ref="a951678555b50fc9229fe9b553c7b09d0" args="" -->
341
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a951678555b50fc9229fe9b553c7b09d0">RMW_O</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
346
        </tr>
347
      </table>
348
</div>
349
<div class="memdoc">
350
 
351
<p><p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Read-Modify-Write Cycle. </p>
352
 </p>
353
 
354
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00425">425</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
355
 
356
</div>
357
</div>
358
<a class="anchor" id="a02037d382851d62248a83cbc35dd1529"></a><!-- doxytag: member="ao68000::CTI_O" ref="a02037d382851d62248a83cbc35dd1529" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a02037d382851d62248a83cbc35dd1529">CTI_O</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
364
        </tr>
365
      </table>
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</div>
367
<div class="memdoc">
368
 
369
<p><p>WISHBONE Address Tag, TAG_TYPE: TGA_O, Cycle Type Identifier, Incrementing Bus Cycle or End-of-Burst Cycle. </p>
370
 </p>
371
 
372
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00428">428</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
373
 
374
</div>
375
</div>
376
<a class="anchor" id="a08f46078858b7e8b6f2dfe2f6ec20c84"></a><!-- doxytag: member="ao68000::BTE_O" ref="a08f46078858b7e8b6f2dfe2f6ec20c84" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a08f46078858b7e8b6f2dfe2f6ec20c84">BTE_O</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
382
        </tr>
383
      </table>
384
</div>
385
<div class="memdoc">
386
 
387
<p><p>WISHBONE Address Tag, TAG_TYPE: TGA_O, Burst Type Extension, always Linear Burst. </p>
388
 </p>
389
 
390
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00429">429</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
391
 
392
</div>
393
</div>
394
<a class="anchor" id="a4b66c96fdd706df792811882b6f9fa9b"></a><!-- doxytag: member="ao68000::fc_o" ref="a4b66c96fdd706df792811882b6f9fa9b" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a4b66c96fdd706df792811882b6f9fa9b">fc_o</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
400
        </tr>
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      </table>
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</div>
403
<div class="memdoc">
404
 
405
<p><p>Custom TAG_TYPE: TGC_O, Cycle Tag, Processor Function Code:</p>
406
<ul>
407
<li>1 - user data,</li>
408
<li>2 - user program,</li>
409
<li>5 - supervisor data : all exception vector entries except reset,</li>
410
<li>6 - supervisor program : exception vector for reset,</li>
411
<li>7 - cpu space: interrupt acknowledge. </li>
412
</ul>
413
 </p>
414
 
415
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00432">432</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
416
 
417
</div>
418
</div>
419
<a class="anchor" id="a1ff11e699c0192bb533209bd3cf9d5ba"></a><!-- doxytag: member="ao68000::ipl_i" ref="a1ff11e699c0192bb533209bd3cf9d5ba" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a1ff11e699c0192bb533209bd3cf9d5ba">ipl_i</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
425
        </tr>
426
      </table>
427
</div>
428
<div class="memdoc">
429
 
430
<p><p>Interrupt Priority Level Interrupt acknowledge cycle:</p>
431
<ul>
432
<li>ACK_I: interrupt vector on DAT_I[7:0],</li>
433
<li>ERR_I: spurious interrupt,</li>
434
<li>RTY_I: auto-vector. </li>
435
</ul>
436
 </p>
437
 
438
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00440">440</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
439
 
440
</div>
441
</div>
442
<a class="anchor" id="a8246303a982cd24ff7dcc7b36c3038e2"></a><!-- doxytag: member="ao68000::reset_o" ref="a8246303a982cd24ff7dcc7b36c3038e2" args="" -->
443
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a8246303a982cd24ff7dcc7b36c3038e2">reset_o</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
448
        </tr>
449
      </table>
450
</div>
451
<div class="memdoc">
452
 
453
<p><p>External device reset. Output high when processing the RESET instruction. </p>
454
 </p>
455
 
456
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00441">441</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
457
 
458
</div>
459
</div>
460
<a class="anchor" id="a5c903f753511ea2ec94145415549a148"></a><!-- doxytag: member="ao68000::reset_n" ref="a5c903f753511ea2ec94145415549a148" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a5c903f753511ea2ec94145415549a148">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
466
        </tr>
467
      </table>
468
</div>
469
<div class="memdoc">
470
 
471
<p><p>Asynchronous Reset Input </p>
472
 </p>
473
 
474
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00408">408</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
475
 
476
</div>
477
</div>
478
<a class="anchor" id="a0a90a371e379531c8e466799ff5c3d49"></a><!-- doxytag: member="ao68000::blocked_o" ref="a0a90a371e379531c8e466799ff5c3d49" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">blocked_o</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
484
        </tr>
485
      </table>
486
</div>
487
<div class="memdoc">
488
 
489
<p><p>Processor blocked indicator. The processor is blocked after a double bus error. </p>
490
 </p>
491
 
492
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00442">442</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
493
 
494
</div>
495
</div>
496
<a class="anchor" id="abef0ede1a300bfe80eeecc8d51a0afe0"></a><!-- doxytag: member="ao68000::sr" ref="abef0ede1a300bfe80eeecc8d51a0afe0" args="wire[15:0]" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[15:0]]</code></td>
502
        </tr>
503
      </table>
504
</div>
505
<div class="memdoc">
506
 
507
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00445">445</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
508
 
509
</div>
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</div>
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<a class="anchor" id="a608eadff9f4d94d93a9a08c244e93aa7"></a><!-- doxytag: member="ao68000::size" ref="a608eadff9f4d94d93a9a08c244e93aa7" args="wire[1:0]" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a608eadff9f4d94d93a9a08c244e93aa7">size</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[1:0]]</code></td>
517
        </tr>
518
      </table>
519
</div>
520
<div class="memdoc">
521
 
522
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00446">446</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
523
 
524
</div>
525
</div>
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<a class="anchor" id="aaf40157e76d59864abf62ffe1c4f605d"></a><!-- doxytag: member="ao68000::address" ref="aaf40157e76d59864abf62ffe1c4f605d" args="wire[31:0]" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
532
        </tr>
533
      </table>
534
</div>
535
<div class="memdoc">
536
 
537
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00447">447</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
538
 
539
</div>
540
</div>
541
<a class="anchor" id="a3da831ef8ac6ec75b132d8d299115092"></a><!-- doxytag: member="ao68000::address_type" ref="a3da831ef8ac6ec75b132d8d299115092" args="wire" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
547
        </tr>
548
      </table>
549
</div>
550
<div class="memdoc">
551
 
552
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00448">448</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
553
 
554
</div>
555
</div>
556
<a class="anchor" id="a4d00737f890e3080a8915e23668c2fe0"></a><!-- doxytag: member="ao68000::read_modify_write_flag" ref="a4d00737f890e3080a8915e23668c2fe0" args="wire" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
562
        </tr>
563
      </table>
564
</div>
565
<div class="memdoc">
566
 
567
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00449">449</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
568
 
569
</div>
570
</div>
571
<a class="anchor" id="a341be6a91dd12d14293eaa53c7c254d2"></a><!-- doxytag: member="ao68000::data_read" ref="a341be6a91dd12d14293eaa53c7c254d2" args="wire[31:0]" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a341be6a91dd12d14293eaa53c7c254d2">data_read</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
577
        </tr>
578
      </table>
579
</div>
580
<div class="memdoc">
581
 
582
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00450">450</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
583
 
584
</div>
585
</div>
586
<a class="anchor" id="ac7098386bafc8ad2194743a7ebbc3928"></a><!-- doxytag: member="ao68000::data_write" ref="ac7098386bafc8ad2194743a7ebbc3928" args="wire[31:0]" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ac7098386bafc8ad2194743a7ebbc3928">data_write</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
592
        </tr>
593
      </table>
594
</div>
595
<div class="memdoc">
596
 
597
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00451">451</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
598
 
599
</div>
600
</div>
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<a class="anchor" id="a5e28cd1d3701cc3d88dd0df22e697108"></a><!-- doxytag: member="ao68000::pc" ref="a5e28cd1d3701cc3d88dd0df22e697108" args="wire[31:0]" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">pc</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
607
        </tr>
608
      </table>
609
</div>
610
<div class="memdoc">
611
 
612
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00452">452</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
613
 
614
</div>
615
</div>
616
<a class="anchor" id="a7f60c5a54b85d16a5daa159e3f93f3a2"></a><!-- doxytag: member="ao68000::prefetch_ir_valid" ref="a7f60c5a54b85d16a5daa159e3f93f3a2" args="wire" -->
617
<div class="memitem">
618
<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a7f60c5a54b85d16a5daa159e3f93f3a2">prefetch_ir_valid</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
622
        </tr>
623
      </table>
624
</div>
625
<div class="memdoc">
626
 
627
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00453">453</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
628
 
629
</div>
630
</div>
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<a class="anchor" id="a61843aa9b51ba23ec6c8c35892366559"></a><!-- doxytag: member="ao68000::CYC_O" ref="a61843aa9b51ba23ec6c8c35892366559" args="" -->
632
<div class="memitem">
633
<div class="memproto">
634
      <table class="memname">
635
        <tr>
636
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a61843aa9b51ba23ec6c8c35892366559">CYC_O</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
637
        </tr>
638
      </table>
639
</div>
640
<div class="memdoc">
641
 
642
<p><p>WISHBONE Master Cycle Output </p>
643
 </p>
644
 
645
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00410">410</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
646
 
647
</div>
648
</div>
649
<a class="anchor" id="a3403e55545d6a49c4a4fa6f16cfe7126"></a><!-- doxytag: member="ao68000::prefetch_ir" ref="a3403e55545d6a49c4a4fa6f16cfe7126" args="wire[79:0]" -->
650
<div class="memitem">
651
<div class="memproto">
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      <table class="memname">
653
        <tr>
654
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a3403e55545d6a49c4a4fa6f16cfe7126">prefetch_ir</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[79:0]]</code></td>
655
        </tr>
656
      </table>
657
</div>
658
<div class="memdoc">
659
 
660
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00454">454</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
661
 
662
</div>
663
</div>
664
<a class="anchor" id="a63cc96be1f84432ea4b755f14c9801bd"></a><!-- doxytag: member="ao68000::do_reset" ref="a63cc96be1f84432ea4b755f14c9801bd" args="wire" -->
665
<div class="memitem">
666
<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a63cc96be1f84432ea4b755f14c9801bd">do_reset</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
670
        </tr>
671
      </table>
672
</div>
673
<div class="memdoc">
674
 
675
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00455">455</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
676
 
677
</div>
678
</div>
679
<a class="anchor" id="aaa926f4340d9533fa404ed2121e01add"></a><!-- doxytag: member="ao68000::do_read" ref="aaa926f4340d9533fa404ed2121e01add" args="wire" -->
680
<div class="memitem">
681
<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#aaa926f4340d9533fa404ed2121e01add">do_read</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
685
        </tr>
686
      </table>
687
</div>
688
<div class="memdoc">
689
 
690
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00456">456</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
691
 
692
</div>
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</div>
694
<a class="anchor" id="a2fd644eba6903b45558dba81d759d60a"></a><!-- doxytag: member="ao68000::do_write" ref="a2fd644eba6903b45558dba81d759d60a" args="wire" -->
695
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a2fd644eba6903b45558dba81d759d60a">do_write</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
700
        </tr>
701
      </table>
702
</div>
703
<div class="memdoc">
704
 
705
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00457">457</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
706
 
707
</div>
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</div>
709
<a class="anchor" id="a017afb5ca18639747617179cd4b5b9af"></a><!-- doxytag: member="ao68000::do_interrupt" ref="a017afb5ca18639747617179cd4b5b9af" args="wire" -->
710
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a017afb5ca18639747617179cd4b5b9af">do_interrupt</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
715
        </tr>
716
      </table>
717
</div>
718
<div class="memdoc">
719
 
720
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00458">458</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
721
 
722
</div>
723
</div>
724
<a class="anchor" id="a8d22354dba9690de7ed1f40174e7fac5"></a><!-- doxytag: member="ao68000::do_blocked" ref="a8d22354dba9690de7ed1f40174e7fac5" args="wire" -->
725
<div class="memitem">
726
<div class="memproto">
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      <table class="memname">
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        <tr>
729
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a8d22354dba9690de7ed1f40174e7fac5">do_blocked</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
730
        </tr>
731
      </table>
732
</div>
733
<div class="memdoc">
734
 
735
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00459">459</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
736
 
737
</div>
738
</div>
739
<a class="anchor" id="aa9b27c579ff3359c8722f33ddc218606"></a><!-- doxytag: member="ao68000::jmp_address_trap" ref="aa9b27c579ff3359c8722f33ddc218606" args="wire" -->
740
<div class="memitem">
741
<div class="memproto">
742
      <table class="memname">
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        <tr>
744
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#aa9b27c579ff3359c8722f33ddc218606">jmp_address_trap</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
745
        </tr>
746
      </table>
747
</div>
748
<div class="memdoc">
749
 
750
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00460">460</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
751
 
752
</div>
753
</div>
754
<a class="anchor" id="a68c0830ee44827649eeece60ccb007a4"></a><!-- doxytag: member="ao68000::jmp_bus_trap" ref="a68c0830ee44827649eeece60ccb007a4" args="wire" -->
755
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a68c0830ee44827649eeece60ccb007a4">jmp_bus_trap</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
760
        </tr>
761
      </table>
762
</div>
763
<div class="memdoc">
764
 
765
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00461">461</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
766
 
767
</div>
768
</div>
769
<a class="anchor" id="adc838dee1d3e5fb81b69d9cd825e2078"></a><!-- doxytag: member="ao68000::finished" ref="adc838dee1d3e5fb81b69d9cd825e2078" args="wire" -->
770
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#adc838dee1d3e5fb81b69d9cd825e2078">finished</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
775
        </tr>
776
      </table>
777
</div>
778
<div class="memdoc">
779
 
780
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00462">462</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
781
 
782
</div>
783
</div>
784
<a class="anchor" id="ab31d9d61b3fb7b8cf2d2588943144c51"></a><!-- doxytag: member="ao68000::interrupt_trap" ref="ab31d9d61b3fb7b8cf2d2588943144c51" args="wire[7:0]" -->
785
<div class="memitem">
786
<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ab31d9d61b3fb7b8cf2d2588943144c51">interrupt_trap</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[7:0]]</code></td>
790
        </tr>
791
      </table>
792
</div>
793
<div class="memdoc">
794
 
795
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00463">463</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
796
 
797
</div>
798
</div>
799
<a class="anchor" id="a277895ba6004986cf490068945998fd0"></a><!-- doxytag: member="ao68000::ADR_O" ref="a277895ba6004986cf490068945998fd0" args="" -->
800
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a277895ba6004986cf490068945998fd0">ADR_O</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
805
        </tr>
806
      </table>
807
</div>
808
<div class="memdoc">
809
 
810
<p><p>WISHBONE Master Address Output </p>
811
 </p>
812
 
813
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00411">411</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
814
 
815
</div>
816
</div>
817
<a class="anchor" id="a48c24a88040f4bfdc6df4f6d44c74f02"></a><!-- doxytag: member="ao68000::interrupt_mask" ref="a48c24a88040f4bfdc6df4f6d44c74f02" args="wire[2:0]" -->
818
<div class="memitem">
819
<div class="memproto">
820
      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a48c24a88040f4bfdc6df4f6d44c74f02">interrupt_mask</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[2:0]]</code></td>
823
        </tr>
824
      </table>
825
</div>
826
<div class="memdoc">
827
 
828
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00464">464</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
829
 
830
</div>
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</div>
832
<a class="anchor" id="aa64aa2047c9823a2b6354f945b7a1e91"></a><!-- doxytag: member="ao68000::rw_state" ref="aa64aa2047c9823a2b6354f945b7a1e91" args="wire" -->
833
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#aa64aa2047c9823a2b6354f945b7a1e91">rw_state</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
838
        </tr>
839
      </table>
840
</div>
841
<div class="memdoc">
842
 
843
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00465">465</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
844
 
845
</div>
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</div>
847
<a class="anchor" id="ad29c33a9347a9dc0ad7e6a38a9674cea"></a><!-- doxytag: member="ao68000::fc_state" ref="ad29c33a9347a9dc0ad7e6a38a9674cea" args="wire[2:0]" -->
848
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ad29c33a9347a9dc0ad7e6a38a9674cea">fc_state</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[2:0]]</code></td>
853
        </tr>
854
      </table>
855
</div>
856
<div class="memdoc">
857
 
858
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00466">466</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
859
 
860
</div>
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</div>
862
<a class="anchor" id="a2d3d54c5eadf71c6a422a5e9c3c1c0f0"></a><!-- doxytag: member="ao68000::decoder_trap" ref="a2d3d54c5eadf71c6a422a5e9c3c1c0f0" args="wire[7:0]" -->
863
<div class="memitem">
864
<div class="memproto">
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      <table class="memname">
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        <tr>
867
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a2d3d54c5eadf71c6a422a5e9c3c1c0f0">decoder_trap</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[7:0]]</code></td>
868
        </tr>
869
      </table>
870
</div>
871
<div class="memdoc">
872
 
873
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00467">467</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
874
 
875
</div>
876
</div>
877
<a class="anchor" id="a0c5ac49d1bd4f956a99173ba8d76824e"></a><!-- doxytag: member="ao68000::usp" ref="a0c5ac49d1bd4f956a99173ba8d76824e" args="wire[31:0]" -->
878
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a0c5ac49d1bd4f956a99173ba8d76824e">usp</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
883
        </tr>
884
      </table>
885
</div>
886
<div class="memdoc">
887
 
888
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00468">468</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
889
 
890
</div>
891
</div>
892
<a class="anchor" id="a9fbb4d38edd465bd6e91c844baa3cc32"></a><!-- doxytag: member="ao68000::Dn_output" ref="a9fbb4d38edd465bd6e91c844baa3cc32" args="wire[31:0]" -->
893
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a9fbb4d38edd465bd6e91c844baa3cc32">Dn_output</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
898
        </tr>
899
      </table>
900
</div>
901
<div class="memdoc">
902
 
903
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00469">469</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
904
 
905
</div>
906
</div>
907
<a class="anchor" id="a38819ff180e465048ac34fe24c17db2e"></a><!-- doxytag: member="ao68000::An_output" ref="a38819ff180e465048ac34fe24c17db2e" args="wire[31:0]" -->
908
<div class="memitem">
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<div class="memproto">
910
      <table class="memname">
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        <tr>
912
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a38819ff180e465048ac34fe24c17db2e">An_output</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
913
        </tr>
914
      </table>
915
</div>
916
<div class="memdoc">
917
 
918
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00470">470</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
919
 
920
</div>
921
</div>
922
<a class="anchor" id="ae78165f07b720df4d51db101effc08c5"></a><!-- doxytag: member="ao68000::result" ref="ae78165f07b720df4d51db101effc08c5" args="wire[31:0]" -->
923
<div class="memitem">
924
<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ae78165f07b720df4d51db101effc08c5">result</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
928
        </tr>
929
      </table>
930
</div>
931
<div class="memdoc">
932
 
933
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00471">471</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
934
 
935
</div>
936
</div>
937
<a class="anchor" id="ac4bdc1d7a8df2e5b24f92e8c47b87d31"></a><!-- doxytag: member="ao68000::An_address" ref="ac4bdc1d7a8df2e5b24f92e8c47b87d31" args="wire[3:0]" -->
938
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
942
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ac4bdc1d7a8df2e5b24f92e8c47b87d31">An_address</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[3:0]]</code></td>
943
        </tr>
944
      </table>
945
</div>
946
<div class="memdoc">
947
 
948
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00472">472</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
949
 
950
</div>
951
</div>
952
<a class="anchor" id="a314e14c9d14faca666d7282e70aec69e"></a><!-- doxytag: member="ao68000::An_input" ref="a314e14c9d14faca666d7282e70aec69e" args="wire[31:0]" -->
953
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a314e14c9d14faca666d7282e70aec69e">An_input</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
958
        </tr>
959
      </table>
960
</div>
961
<div class="memdoc">
962
 
963
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00473">473</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
964
 
965
</div>
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</div>
967
<a class="anchor" id="a801fbb1ae4c2812332242ce5d746cf36"></a><!-- doxytag: member="ao68000::DAT_O" ref="a801fbb1ae4c2812332242ce5d746cf36" args="" -->
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      <table class="memname">
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        <tr>
972
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a801fbb1ae4c2812332242ce5d746cf36">DAT_O</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
973
        </tr>
974
      </table>
975
</div>
976
<div class="memdoc">
977
 
978
<p><p>WISHBONE Master Data Output </p>
979
 </p>
980
 
981
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00412">412</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
982
 
983
</div>
984
</div>
985
<a class="anchor" id="a8ce376b6468188948a66dd3090b82303"></a><!-- doxytag: member="ao68000::Dn_address" ref="a8ce376b6468188948a66dd3090b82303" args="wire[2:0]" -->
986
<div class="memitem">
987
<div class="memproto">
988
      <table class="memname">
989
        <tr>
990
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a8ce376b6468188948a66dd3090b82303">Dn_address</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[2:0]]</code></td>
991
        </tr>
992
      </table>
993
</div>
994
<div class="memdoc">
995
 
996
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00474">474</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
997
 
998
</div>
999
</div>
1000
<a class="anchor" id="a88e0be4d7a8d7765fd81d2c7ecec034c"></a><!-- doxytag: member="ao68000::ir" ref="a88e0be4d7a8d7765fd81d2c7ecec034c" args="wire[15:0]" -->
1001
<div class="memitem">
1002
<div class="memproto">
1003
      <table class="memname">
1004
        <tr>
1005
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a88e0be4d7a8d7765fd81d2c7ecec034c">ir</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[15:0]]</code></td>
1006
        </tr>
1007
      </table>
1008
</div>
1009
<div class="memdoc">
1010
 
1011
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00475">475</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1012
 
1013
</div>
1014
</div>
1015
<a class="anchor" id="a986f73747582af0c6343b171a856a806"></a><!-- doxytag: member="ao68000::decoder_micropc" ref="a986f73747582af0c6343b171a856a806" args="wire[8:0]" -->
1016
<div class="memitem">
1017
<div class="memproto">
1018
      <table class="memname">
1019
        <tr>
1020
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a986f73747582af0c6343b171a856a806">decoder_micropc</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[8:0]]</code></td>
1021
        </tr>
1022
      </table>
1023
</div>
1024
<div class="memdoc">
1025
 
1026
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00476">476</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1027
 
1028
</div>
1029
</div>
1030
<a class="anchor" id="a33e8b72025c9c3052defc17ffa3b3e0a"></a><!-- doxytag: member="ao68000::special" ref="a33e8b72025c9c3052defc17ffa3b3e0a" args="wire[1:0]" -->
1031
<div class="memitem">
1032
<div class="memproto">
1033
      <table class="memname">
1034
        <tr>
1035
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a33e8b72025c9c3052defc17ffa3b3e0a">special</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[1:0]]</code></td>
1036
        </tr>
1037
      </table>
1038
</div>
1039
<div class="memdoc">
1040
 
1041
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00477">477</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1042
 
1043
</div>
1044
</div>
1045
<a class="anchor" id="ab4eb4a01e79a4b7b88acd4f77c9acba4"></a><!-- doxytag: member="ao68000::load_ea" ref="ab4eb4a01e79a4b7b88acd4f77c9acba4" args="wire[8:0]" -->
1046
<div class="memitem">
1047
<div class="memproto">
1048
      <table class="memname">
1049
        <tr>
1050
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ab4eb4a01e79a4b7b88acd4f77c9acba4">load_ea</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[8:0]]</code></td>
1051
        </tr>
1052
      </table>
1053
</div>
1054
<div class="memdoc">
1055
 
1056
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00478">478</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1057
 
1058
</div>
1059
</div>
1060
<a class="anchor" id="a8c957f96cbcb7b86dc960fbd6dd4d90d"></a><!-- doxytag: member="ao68000::perform_ea_read" ref="a8c957f96cbcb7b86dc960fbd6dd4d90d" args="wire[8:0]" -->
1061
<div class="memitem">
1062
<div class="memproto">
1063
      <table class="memname">
1064
        <tr>
1065
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a8c957f96cbcb7b86dc960fbd6dd4d90d">perform_ea_read</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[8:0]]</code></td>
1066
        </tr>
1067
      </table>
1068
</div>
1069
<div class="memdoc">
1070
 
1071
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00479">479</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1072
 
1073
</div>
1074
</div>
1075
<a class="anchor" id="aa0ab9326a484de5288f111934b0fd85d"></a><!-- doxytag: member="ao68000::perform_ea_write" ref="aa0ab9326a484de5288f111934b0fd85d" args="wire[8:0]" -->
1076
<div class="memitem">
1077
<div class="memproto">
1078
      <table class="memname">
1079
        <tr>
1080
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#aa0ab9326a484de5288f111934b0fd85d">perform_ea_write</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[8:0]]</code></td>
1081
        </tr>
1082
      </table>
1083
</div>
1084
<div class="memdoc">
1085
 
1086
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00480">480</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1087
 
1088
</div>
1089
</div>
1090
<a class="anchor" id="aebdeb28b0ef8caff7489f6ad05500c4c"></a><!-- doxytag: member="ao68000::save_ea" ref="aebdeb28b0ef8caff7489f6ad05500c4c" args="wire[8:0]" -->
1091
<div class="memitem">
1092
<div class="memproto">
1093
      <table class="memname">
1094
        <tr>
1095
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#aebdeb28b0ef8caff7489f6ad05500c4c">save_ea</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[8:0]]</code></td>
1096
        </tr>
1097
      </table>
1098
</div>
1099
<div class="memdoc">
1100
 
1101
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00481">481</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1102
 
1103
</div>
1104
</div>
1105
<a class="anchor" id="ad129761deda6ea56323f464ec70388cd"></a><!-- doxytag: member="ao68000::trace_flag" ref="ad129761deda6ea56323f464ec70388cd" args="wire" -->
1106
<div class="memitem">
1107
<div class="memproto">
1108
      <table class="memname">
1109
        <tr>
1110
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ad129761deda6ea56323f464ec70388cd">trace_flag</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
1111
        </tr>
1112
      </table>
1113
</div>
1114
<div class="memdoc">
1115
 
1116
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00482">482</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1117
 
1118
</div>
1119
</div>
1120
<a class="anchor" id="a4421dfb45f06b1c0b54b098fdc26cb4e"></a><!-- doxytag: member="ao68000::group_0_flag" ref="a4421dfb45f06b1c0b54b098fdc26cb4e" args="wire" -->
1121
<div class="memitem">
1122
<div class="memproto">
1123
      <table class="memname">
1124
        <tr>
1125
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a4421dfb45f06b1c0b54b098fdc26cb4e">group_0_flag</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
1126
        </tr>
1127
      </table>
1128
</div>
1129
<div class="memdoc">
1130
 
1131
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00483">483</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1132
 
1133
</div>
1134
</div>
1135
<a class="anchor" id="abffdd6f5cefb3be32b6db5bfc6b56442"></a><!-- doxytag: member="ao68000::DAT_I" ref="abffdd6f5cefb3be32b6db5bfc6b56442" args="" -->
1136
<div class="memitem">
1137
<div class="memproto">
1138
      <table class="memname">
1139
        <tr>
1140
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#abffdd6f5cefb3be32b6db5bfc6b56442">DAT_I</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
1141
        </tr>
1142
      </table>
1143
</div>
1144
<div class="memdoc">
1145
 
1146
<p><p>WISHBONE Master Data Input </p>
1147
 </p>
1148
 
1149
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00413">413</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1150
 
1151
</div>
1152
</div>
1153
<a class="anchor" id="a8bb2b4e571e011cc39c0d1dd53f02145"></a><!-- doxytag: member="ao68000::stop_flag" ref="a8bb2b4e571e011cc39c0d1dd53f02145" args="wire" -->
1154
<div class="memitem">
1155
<div class="memproto">
1156
      <table class="memname">
1157
        <tr>
1158
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a8bb2b4e571e011cc39c0d1dd53f02145">stop_flag</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
1159
        </tr>
1160
      </table>
1161
</div>
1162
<div class="memdoc">
1163
 
1164
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00484">484</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1165
 
1166
</div>
1167
</div>
1168
<a class="anchor" id="af5e5eee4850873fc07b2bf4f35fa8ea0"></a><!-- doxytag: member="ao68000::micro_pc" ref="af5e5eee4850873fc07b2bf4f35fa8ea0" args="wire[8:0]" -->
1169
<div class="memitem">
1170
<div class="memproto">
1171
      <table class="memname">
1172
        <tr>
1173
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#af5e5eee4850873fc07b2bf4f35fa8ea0">micro_pc</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[8:0]]</code></td>
1174
        </tr>
1175
      </table>
1176
</div>
1177
<div class="memdoc">
1178
 
1179
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00485">485</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1180
 
1181
</div>
1182
</div>
1183
<a class="anchor" id="af1ea9f43861e0bc71f86dbaa9b2d790a"></a><!-- doxytag: member="ao68000::operand1" ref="af1ea9f43861e0bc71f86dbaa9b2d790a" args="wire[31:0]" -->
1184
<div class="memitem">
1185
<div class="memproto">
1186
      <table class="memname">
1187
        <tr>
1188
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#af1ea9f43861e0bc71f86dbaa9b2d790a">operand1</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
1189
        </tr>
1190
      </table>
1191
</div>
1192
<div class="memdoc">
1193
 
1194
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00486">486</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1195
 
1196
</div>
1197
</div>
1198
<a class="anchor" id="a16f6886d59873ced06d573bf9f7df313"></a><!-- doxytag: member="ao68000::operand2" ref="a16f6886d59873ced06d573bf9f7df313" args="wire[31:0]" -->
1199
<div class="memitem">
1200
<div class="memproto">
1201
      <table class="memname">
1202
        <tr>
1203
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a16f6886d59873ced06d573bf9f7df313">operand2</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
1204
        </tr>
1205
      </table>
1206
</div>
1207
<div class="memdoc">
1208
 
1209
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00487">487</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1210
 
1211
</div>
1212
</div>
1213
<a class="anchor" id="a9f1a061dfa48449c594659cc95fe794b"></a><!-- doxytag: member="ao68000::movem_loop" ref="a9f1a061dfa48449c594659cc95fe794b" args="wire[4:0]" -->
1214
<div class="memitem">
1215
<div class="memproto">
1216
      <table class="memname">
1217
        <tr>
1218
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a9f1a061dfa48449c594659cc95fe794b">movem_loop</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[4:0]]</code></td>
1219
        </tr>
1220
      </table>
1221
</div>
1222
<div class="memdoc">
1223
 
1224
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00488">488</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1225
 
1226
</div>
1227
</div>
1228
<a class="anchor" id="a23e8853dcd612e4f322f226cd105e979"></a><!-- doxytag: member="ao68000::movem_reg" ref="a23e8853dcd612e4f322f226cd105e979" args="wire[15:0]" -->
1229
<div class="memitem">
1230
<div class="memproto">
1231
      <table class="memname">
1232
        <tr>
1233
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a23e8853dcd612e4f322f226cd105e979">movem_reg</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[15:0]]</code></td>
1234
        </tr>
1235
      </table>
1236
</div>
1237
<div class="memdoc">
1238
 
1239
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00489">489</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1240
 
1241
</div>
1242
</div>
1243
<a class="anchor" id="a89c9e1f10192e0d67b9b1c905b9b9707"></a><!-- doxytag: member="ao68000::condition" ref="a89c9e1f10192e0d67b9b1c905b9b9707" args="wire" -->
1244
<div class="memitem">
1245
<div class="memproto">
1246
      <table class="memname">
1247
        <tr>
1248
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a89c9e1f10192e0d67b9b1c905b9b9707">condition</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
1249
        </tr>
1250
      </table>
1251
</div>
1252
<div class="memdoc">
1253
 
1254
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00490">490</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1255
 
1256
</div>
1257
</div>
1258
<a class="anchor" id="ab3e5f1ab1be4d9610c68e34565365019"></a><!-- doxytag: member="ao68000::micro_data" ref="ab3e5f1ab1be4d9610c68e34565365019" args="wire[87:0]" -->
1259
<div class="memitem">
1260
<div class="memproto">
1261
      <table class="memname">
1262
        <tr>
1263
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ab3e5f1ab1be4d9610c68e34565365019">micro_data</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[87:0]]</code></td>
1264
        </tr>
1265
      </table>
1266
</div>
1267
<div class="memdoc">
1268
 
1269
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00491">491</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1270
 
1271
</div>
1272
</div>
1273
<a class="anchor" id="ae5e0eb48c45313c4f859af77ec8cdac0"></a><!-- doxytag: member="ao68000::fault_address_state" ref="ae5e0eb48c45313c4f859af77ec8cdac0" args="wire[31:0]" -->
1274
<div class="memitem">
1275
<div class="memproto">
1276
      <table class="memname">
1277
        <tr>
1278
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ae5e0eb48c45313c4f859af77ec8cdac0">fault_address_state</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
1279
        </tr>
1280
      </table>
1281
</div>
1282
<div class="memdoc">
1283
 
1284
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00492">492</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1285
 
1286
</div>
1287
</div>
1288
<a class="anchor" id="ab2e4f443cf62f071af698fb3e623c57c"></a><!-- doxytag: member="ao68000::pc_change" ref="ab2e4f443cf62f071af698fb3e623c57c" args="wire[1:0]" -->
1289
<div class="memitem">
1290
<div class="memproto">
1291
      <table class="memname">
1292
        <tr>
1293
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ab2e4f443cf62f071af698fb3e623c57c">pc_change</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[1:0]]</code></td>
1294
        </tr>
1295
      </table>
1296
</div>
1297
<div class="memdoc">
1298
 
1299
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00493">493</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1300
 
1301
</div>
1302
</div>
1303
<a class="anchor" id="ae636550dd8481fd101623d0c665e894c"></a><!-- doxytag: member="ao68000::SEL_O" ref="ae636550dd8481fd101623d0c665e894c" args="" -->
1304
<div class="memitem">
1305
<div class="memproto">
1306
      <table class="memname">
1307
        <tr>
1308
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ae636550dd8481fd101623d0c665e894c">SEL_O</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
1309
        </tr>
1310
      </table>
1311
</div>
1312
<div class="memdoc">
1313
 
1314
<p><p>WISHBONE Master Byte Select </p>
1315
 </p>
1316
 
1317
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00414">414</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1318
 
1319
</div>
1320
</div>
1321
<a class="anchor" id="a2386c661059b9a24d6a216ab668291e9"></a><!-- doxytag: member="ao68000::prefetch_ir_valid_32" ref="a2386c661059b9a24d6a216ab668291e9" args="wire" -->
1322
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
1326
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a2386c661059b9a24d6a216ab668291e9">prefetch_ir_valid_32</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
1327
        </tr>
1328
      </table>
1329
</div>
1330
<div class="memdoc">
1331
 
1332
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00494">494</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1333
 
1334
</div>
1335
</div>
1336
<a class="anchor" id="ac7a12b8825569a6208688d0de8b91eb4"></a><!-- doxytag: member="ao68000::ea_type" ref="ac7a12b8825569a6208688d0de8b91eb4" args="wire[3:0]" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ac7a12b8825569a6208688d0de8b91eb4">ea_type</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[3:0]]</code></td>
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        </tr>
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      </table>
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</div>
1345
<div class="memdoc">
1346
 
1347
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00495">495</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1348
 
1349
</div>
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</div>
1351
<a class="anchor" id="a37c05e240e16bd7e15f95147f933f4e7"></a><!-- doxytag: member="ao68000::ea_mod" ref="a37c05e240e16bd7e15f95147f933f4e7" args="wire[2:0]" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a37c05e240e16bd7e15f95147f933f4e7">ea_mod</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[2:0]]</code></td>
1357
        </tr>
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      </table>
1359
</div>
1360
<div class="memdoc">
1361
 
1362
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00496">496</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1363
 
1364
</div>
1365
</div>
1366
<a class="anchor" id="a030de97afa9980f4d76f7c6e64419dc2"></a><!-- doxytag: member="ao68000::ea_reg" ref="a030de97afa9980f4d76f7c6e64419dc2" args="wire[2:0]" -->
1367
<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a030de97afa9980f4d76f7c6e64419dc2">ea_reg</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[2:0]]</code></td>
1372
        </tr>
1373
      </table>
1374
</div>
1375
<div class="memdoc">
1376
 
1377
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00497">497</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1378
 
1379
</div>
1380
</div>
1381
<a class="anchor" id="a0e045730861ed97d585a192fcbbfd8a5"></a><!-- doxytag: member="ao68000::STB_O" ref="a0e045730861ed97d585a192fcbbfd8a5" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a0e045730861ed97d585a192fcbbfd8a5">STB_O</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
1387
        </tr>
1388
      </table>
1389
</div>
1390
<div class="memdoc">
1391
 
1392
<p><p>WISHBONE Master Strobe Output </p>
1393
 </p>
1394
 
1395
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00415">415</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1396
 
1397
</div>
1398
</div>
1399
<a class="anchor" id="a6cd0052d2c68597331280fe500366be4"></a><!-- doxytag: member="ao68000::WE_O" ref="a6cd0052d2c68597331280fe500366be4" args="" -->
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<div class="memitem">
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      <table class="memname">
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        <tr>
1404
          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a6cd0052d2c68597331280fe500366be4">WE_O</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
1405
        </tr>
1406
      </table>
1407
</div>
1408
<div class="memdoc">
1409
 
1410
<p><p>WISHBONE Master Write Enable Output </p>
1411
 </p>
1412
 
1413
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00416">416</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1414
 
1415
</div>
1416
</div>
1417
<a class="anchor" id="a818ab80622c2364eb33814a5ef1f33ba"></a><!-- doxytag: member="ao68000::ACK_I" ref="a818ab80622c2364eb33814a5ef1f33ba" args="" -->
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      <table class="memname">
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a818ab80622c2364eb33814a5ef1f33ba">ACK_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
1423
        </tr>
1424
      </table>
1425
</div>
1426
<div class="memdoc">
1427
 
1428
<p><p>WISHBONE Master Acknowledge Input:</p>
1429
<ul>
1430
<li>on normal cycle: acknowledge,</li>
1431
<li>on interrupt acknowledge cycle: external vector provided on DAT_I[7:0]. </li>
1432
</ul>
1433
 </p>
1434
 
1435
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00418">418</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1436
 
1437
</div>
1438
</div>
1439
<a class="anchor" id="a63ee30297781426b4dd11d052490997f"></a><!-- doxytag: member="ao68000::alu" ref="a63ee30297781426b4dd11d052490997f" args="" -->
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<div class="memitem">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a63ee30297781426b4dd11d052490997f">alu</a></span> <b><span class="vhdlchar">alu_m</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
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        </tr>
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      </table>
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</div>
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<div class="memdoc">
1449
 
1450
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00673">673</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
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1452
</div>
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</div>
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<a class="anchor" id="a2c34e1b84d9fe30c49c5c814be3dc392"></a><!-- doxytag: member="ao68000::bus_control" ref="a2c34e1b84d9fe30c49c5c814be3dc392" args="" -->
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a2c34e1b84d9fe30c49c5c814be3dc392">bus_control</a></span> <b><span class="vhdlchar">bus_control_m</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
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        </tr>
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      </table>
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</div>
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<div class="memdoc">
1464
 
1465
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00499">499</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1466
 
1467
</div>
1468
</div>
1469
<a class="anchor" id="a30446f4f602b6185a7ed25e5aa8e470e"></a><!-- doxytag: member="ao68000::condition" ref="a30446f4f602b6185a7ed25e5aa8e470e" args="" -->
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<div class="memitem">
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      <table class="memname">
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a30446f4f602b6185a7ed25e5aa8e470e">condition</a></span> <b><span class="vhdlchar">condition_m</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
1475
        </tr>
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      </table>
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</div>
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<div class="memdoc">
1479
 
1480
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00667">667</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1481
 
1482
</div>
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</div>
1484
<a class="anchor" id="a6f5a57c27d91cf2c4092c71adf13ae81"></a><!-- doxytag: member="ao68000::decoder" ref="a6f5a57c27d91cf2c4092c71adf13ae81" args="" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a6f5a57c27d91cf2c4092c71adf13ae81">decoder</a></span> <b><span class="vhdlchar">decoder_m</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
1490
        </tr>
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      </table>
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</div>
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<div class="memdoc">
1494
 
1495
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00649">649</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1496
 
1497
</div>
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</div>
1499
<a class="anchor" id="ab85a25c3b08b1de81856944a16fafd5d"></a><!-- doxytag: member="ao68000::memory_registers" ref="ab85a25c3b08b1de81856944a16fafd5d" args="" -->
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      <table class="memname">
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ab85a25c3b08b1de81856944a16fafd5d">memory_registers</a></span> <b><span class="vhdlchar">memory_registers_m</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
1505
        </tr>
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      </table>
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</div>
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<div class="memdoc">
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1510
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00632">632</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1511
 
1512
</div>
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</div>
1514
<a class="anchor" id="a753de474d4bdb41b494fed2539290cc4"></a><!-- doxytag: member="ao68000::microcode_branch" ref="a753de474d4bdb41b494fed2539290cc4" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#a753de474d4bdb41b494fed2539290cc4">microcode_branch</a></span> <b><span class="vhdlchar">microcode_branch_m</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
1520
        </tr>
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      </table>
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</div>
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<div class="memdoc">
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1525
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00688">688</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1526
 
1527
</div>
1528
</div>
1529
<a class="anchor" id="ad82deea9ab15d2e02890df123ad51fd9"></a><!-- doxytag: member="ao68000::registers" ref="ad82deea9ab15d2e02890df123ad51fd9" args="" -->
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<div class="memitem">
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      <table class="memname">
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        <tr>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classao68000.html#ad82deea9ab15d2e02890df123ad51fd9">registers</a></span> <b><span class="vhdlchar">registers_m</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
1535
        </tr>
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      </table>
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</div>
1538
<div class="memdoc">
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1540
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00551">551</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
1541
 
1542
</div>
1543
</div>
1544
<hr/>The documentation for this class was generated from the following file:<ul>
1545
<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
1546
</ul>
1547
</div>
1548
<hr class="footer"/><address class="footer"><small>Generated on Sat Dec 11 2010 13:21:13 for ao68000 by&#160;
1549
<a href="http://www.doxygen.org/index.html">
1550
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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</body>
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</html>

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