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alfik |
/*
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* Copyright 2010, Aleksander Osman, alfik@poczta.fm. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification, are
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* permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "ao.h"
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#include "readcpu.h"
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/* changes in WinUAE sources:
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* BCHG,BSET,BCLR,BTST: changes in table68k
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* RTD/illegal command: changes in table68k
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*/
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uae_u32 get_wordi(uaecptr addr);
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uae_u8 *get_real_address(uaecptr addr);
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uae_u32 get_long(uaecptr addr);
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uae_u32 get_word(uaecptr addr);
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uae_u32 get_byte(uaecptr addr);
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void put_byte(uaecptr addr, uae_u32 b);
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void put_word(uaecptr addr, uae_u32 w);
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void put_long(uaecptr addr, uae_u32 l);
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void exception3 (uae_u32 opcode, uaecptr addr, uaecptr fault);
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void exception3i (uae_u32 opcode, uaecptr addr, uaecptr fault);
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void exception3write(uae_u32 opcode, uaecptr addr, uaecptr fault);
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void REGPARAM2 MakeSR (void);
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struct regstruct regs;
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const int areg_byteinc[] = { 1, 1, 1, 1, 1, 1, 1, 2 };
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const int imm8_table[] = { 8, 1, 2, 3, 4, 5, 6, 7 };
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int movem_index1[256];
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int movem_index2[256];
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int movem_next[256];
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struct flag_struct regflags;
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//newcpu.h start
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uaecptr m68k_getpc (void)
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{
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return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
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}
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void m68k_setpc(uaecptr newpc)
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{
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regs.pc_p = regs.pc_oldp = get_real_address (newpc);
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//AOregs.fault_pc = regs.pc = newpc;
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regs.pc = newpc;
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}
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void m68k_do_bsr (uaecptr oldpc, uae_s32 offset, uae_u32 opcode)
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{
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//AO extra
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uaecptr spa = m68k_areg (regs, 7) - 4;
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if (spa & 1) {
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exception3write(opcode, m68k_getpc () + offset, spa);
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return;
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}
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//AO extra end
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m68k_areg (regs, 7) -= 4;
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put_long (m68k_areg (regs, 7), oldpc);
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m68k_incpc (offset);
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}
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void m68k_do_rts (void)
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{
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//AO extra
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uaecptr pca = m68k_areg (regs, 7);
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if (pca & 1) {
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exception3 (0x4e75, m68k_getpc () + 2, pca);
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return;
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}
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uae_s32 pc = get_long (pca);
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m68k_areg (regs, 7) += 4;
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if (pc & 1)
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exception3i(0x4e75, m68k_getpc () + 2, pc);
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else
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m68k_setpc (pc);
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//m68k_setpc (get_long (m68k_areg (regs, 7)));
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//m68k_areg (regs, 7) += 4;
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}
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//newcpu.h end
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//cpu_prefetch.c - start
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uae_u32 get_word_prefetch (int o)
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{
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uae_u32 v = regs.irc;
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regs.irc = get_wordi (m68k_getpc () + o);
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return v;
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}
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uae_u32 get_long_prefetch (int o)
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{
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uae_u32 v = get_word_prefetch (o) << 16;
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v |= get_word_prefetch (o + 2);
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return v;
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}
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//cpu_prefetch.c - end
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void cpureset(void)
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{
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}
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void uae_reset(int hardreset) {
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printf("processor blocked: yes\n");
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}
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void m68k_setstopped(void)
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{
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regs.stopped = 1;
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/* A traced STOP instruction drops through immediately without
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actually stopping. */
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}
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//------------------------------------------------------------------- newcpu.c start
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/* Opcode of faulting instruction */
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static uae_u16 last_op_for_exception_3;
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/* PC at fault time */
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static uaecptr last_addr_for_exception_3;
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/* Address that generated the exception */
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static uaecptr last_fault_for_exception_3;
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/* read (0) or write (1) access */
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static int last_writeaccess_for_exception_3;
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/* instruction (1) or data (0) access */
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static int last_instructionaccess_for_exception_3;
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/* instruction (0) or not instruction (1) */
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static int last_wasgroup0or1_for_exception_3;
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cpuop_func *cpufunctbl[65536];
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/* 68000 slow but compatible. */
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extern const struct cputbl op_smalltbl_11_ff[];
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void Exception (int nr, uaecptr oldpc);
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unsigned long REGPARAM2 op_illg (uae_u32 opcode)
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{
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if ((opcode & 0xF000) == 0xF000) {
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Exception (0xB, 0);
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return 4;
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}
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if ((opcode & 0xF000) == 0xA000) {
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Exception (0xA, 0);
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return 4;
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}
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Exception (4, 0);
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return 4;
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}
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void fill_prefetch_slow (void)
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{
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regs.ir = get_word (m68k_getpc ());
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regs.irc = get_word (m68k_getpc () + 2);
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}
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// exception start
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//was Exception_normal(int nr, uaecptr oldpc)
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void Exception(int nr, uaecptr oldpc)
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{
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// illegal, line 1111, line 1010, privilege, trace
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// left: interrupt
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if(nr == 4 || nr == 0xA || nr == 0xB || nr == 8 || nr == 9) {
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last_wasgroup0or1_for_exception_3 = 1;
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}
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uae_u32 currpc = m68k_getpc (), newpc;
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int sv = regs.s;
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if (nr >= 24 && nr < 24 + 8)
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nr = get_byte(0x00fffff1 | (nr << 1));
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MakeSR();
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if (!regs.s) {
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regs.usp = m68k_areg (regs, 7);
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m68k_areg (regs, 7) = regs.isp;
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regs.s = 1;
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}
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//AO extra
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regs.t1 = 0;
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//AO extra
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if (m68k_areg(regs, 7) & 1) {
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if (nr == 2 || nr == 3)
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m68k_setpc(last_addr_for_exception_3);
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uae_reset(1); /* there is nothing else we can do.. */
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return;
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}
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if (nr == 2 || nr == 3) {
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uae_u16 mode = (sv ? 4 : 0) | (last_instructionaccess_for_exception_3 ? 2 : 1);
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mode |= last_writeaccess_for_exception_3 ? 0 : 16;
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//AO extra
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mode |= last_wasgroup0or1_for_exception_3 ? 8 : 0;
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m68k_areg (regs, 7) -= 14;
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put_word (m68k_areg (regs, 7) + 0, mode);
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put_long (m68k_areg (regs, 7) + 2, last_fault_for_exception_3);
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put_word (m68k_areg (regs, 7) + 6, last_op_for_exception_3);
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put_word (m68k_areg (regs, 7) + 8, regs.sr);
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put_long (m68k_areg (regs, 7) + 10, last_addr_for_exception_3);
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last_wasgroup0or1_for_exception_3 = 1;
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goto kludge_me_do;
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}
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m68k_areg (regs, 7) -= 4;
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put_long (m68k_areg (regs, 7), currpc);
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m68k_areg (regs, 7) -= 2;
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put_word (m68k_areg (regs, 7), regs.sr);
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kludge_me_do:
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newpc = get_long (regs.vbr + 4 * nr);
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if (newpc & 1) {
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if (nr == 2 || nr == 3) {
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//AO extra
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m68k_setpc(last_addr_for_exception_3);
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uae_reset (1); /* there is nothing else we can do.. */
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}
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else
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exception3i(regs.ir, m68k_getpc (), newpc);
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return;
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}
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m68k_setpc (newpc);
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fill_prefetch_slow ();
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| 249 |
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last_wasgroup0or1_for_exception_3 = 0;
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//AOexception_trace (nr);
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| 251 |
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}
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// exception end
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| 255 |
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| 256 |
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//exception3 start
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| 257 |
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| 258 |
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static void exception3f(uae_u32 opcode, uaecptr addr, uaecptr fault, int writeaccess, int instructionaccess)
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| 259 |
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{
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| 260 |
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last_addr_for_exception_3 = addr;
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| 261 |
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last_fault_for_exception_3 = fault;
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| 262 |
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last_op_for_exception_3 = opcode;
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| 263 |
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last_writeaccess_for_exception_3 = writeaccess;
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| 264 |
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last_instructionaccess_for_exception_3 = instructionaccess;
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| 265 |
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Exception(3, fault);
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| 266 |
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}
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| 267 |
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| 268 |
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void exception3 (uae_u32 opcode, uaecptr addr, uaecptr fault)
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| 269 |
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{
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| 270 |
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exception3f(opcode, addr, fault, 0, 0);
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| 271 |
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}
|
| 272 |
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void exception3i (uae_u32 opcode, uaecptr addr, uaecptr fault)
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| 273 |
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{
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| 274 |
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exception3f(opcode, addr, fault, 0, 1);
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| 275 |
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}
|
| 276 |
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void exception3write(uae_u32 opcode, uaecptr addr, uaecptr fault)
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| 277 |
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{
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| 278 |
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exception3f(opcode, addr, fault, 1, 0);
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| 279 |
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}
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| 280 |
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//exception3 end
|
| 281 |
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|
| 282 |
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void REGPARAM2 MakeSR (void)
|
| 283 |
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{
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| 284 |
|
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regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
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| 285 |
|
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| (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
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| 286 |
|
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| (GET_XFLG () << 4) | (GET_NFLG () << 3)
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| 287 |
|
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| (GET_ZFLG () << 2) | (GET_VFLG () << 1)
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| 288 |
|
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| GET_CFLG ());
|
| 289 |
|
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}
|
| 290 |
|
|
|
| 291 |
|
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void REGPARAM2 MakeFromSR (void)
|
| 292 |
|
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{
|
| 293 |
|
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int oldm = regs.m;
|
| 294 |
|
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int olds = regs.s;
|
| 295 |
|
|
|
| 296 |
|
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SET_XFLG ((regs.sr >> 4) & 1);
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| 297 |
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SET_NFLG ((regs.sr >> 3) & 1);
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| 298 |
|
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SET_ZFLG ((regs.sr >> 2) & 1);
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| 299 |
|
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SET_VFLG ((regs.sr >> 1) & 1);
|
| 300 |
|
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SET_CFLG (regs.sr & 1);
|
| 301 |
|
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if (regs.t1 == ((regs.sr >> 15) & 1) &&
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| 302 |
|
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regs.t0 == ((regs.sr >> 14) & 1) &&
|
| 303 |
|
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regs.s == ((regs.sr >> 13) & 1) &&
|
| 304 |
|
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regs.m == ((regs.sr >> 12) & 1) &&
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| 305 |
|
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regs.intmask == ((regs.sr >> 8) & 7))
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| 306 |
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return;
|
| 307 |
|
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regs.t1 = (regs.sr >> 15) & 1;
|
| 308 |
|
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regs.t0 = (regs.sr >> 14) & 1;
|
| 309 |
|
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regs.s = (regs.sr >> 13) & 1;
|
| 310 |
|
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regs.m = (regs.sr >> 12) & 1;
|
| 311 |
|
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regs.intmask = (regs.sr >> 8) & 7;
|
| 312 |
|
|
|
| 313 |
|
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//code fragment for: currprefs.cpu_model < 68020
|
| 314 |
|
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regs.t0 = regs.m = 0;
|
| 315 |
|
|
if (olds != regs.s) {
|
| 316 |
|
|
if (olds) {
|
| 317 |
|
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regs.isp = m68k_areg (regs, 7);
|
| 318 |
|
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m68k_areg (regs, 7) = regs.usp;
|
| 319 |
|
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} else {
|
| 320 |
|
|
regs.usp = m68k_areg (regs, 7);
|
| 321 |
|
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m68k_areg (regs, 7) = regs.isp;
|
| 322 |
|
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}
|
| 323 |
|
|
}
|
| 324 |
|
|
|
| 325 |
|
|
// doint()
|
| 326 |
|
|
|
| 327 |
|
|
// if(regs.t1 || regs.t0)
|
| 328 |
|
|
// set_special (SPCFLAG_TRACE);
|
| 329 |
|
|
// else
|
| 330 |
|
|
/* Keep SPCFLAG_DOTRACE, we still want a trace exception for
|
| 331 |
|
|
SR-modifying instructions (including STOP). */
|
| 332 |
|
|
// unset_special (SPCFLAG_TRACE);
|
| 333 |
|
|
}
|
| 334 |
|
|
|
| 335 |
|
|
uae_u32 REGPARAM3 get_disp_ea_000 (uae_u32 base, uae_u32 dp) REGPARAM
|
| 336 |
|
|
{
|
| 337 |
|
|
int reg = (dp >> 12) & 15;
|
| 338 |
|
|
uae_s32 regd = regs.regs[reg];
|
| 339 |
|
|
|
| 340 |
|
|
if ((dp & 0x800) == 0)
|
| 341 |
|
|
regd = (uae_s32)(uae_s16)regd;
|
| 342 |
|
|
return base + (uae_s8)dp + regd;
|
| 343 |
|
|
}
|
| 344 |
|
|
|
| 345 |
|
|
//------------------------------------------------------------------- newcpu.c end
|
| 346 |
|
|
|
| 347 |
|
|
//------------------------------------------------------------------- test start
|
| 348 |
|
|
|
| 349 |
|
|
char **global_argv;
|
| 350 |
|
|
int global_argc;
|
| 351 |
|
|
|
| 352 |
|
|
unsigned int get_arg(const char *name) {
|
| 353 |
|
|
int i;
|
| 354 |
|
|
char buf[64];
|
| 355 |
|
|
|
| 356 |
|
|
for(i=1; i<global_argc; i++) {
|
| 357 |
|
|
unsigned int ret = snprintf(buf, sizeof(buf), "+%s=%%08x", name);
|
| 358 |
|
|
if(ret != (strlen(name) + 6)) {
|
| 359 |
|
|
printf("Internal error while reading argument: %s\n", name);
|
| 360 |
|
|
exit(-1);
|
| 361 |
|
|
}
|
| 362 |
|
|
|
| 363 |
|
|
unsigned int result;
|
| 364 |
|
|
ret = sscanf(global_argv[i], buf, &result);
|
| 365 |
|
|
if(ret != 1) continue;
|
| 366 |
|
|
else return result;
|
| 367 |
|
|
}
|
| 368 |
|
|
printf("Error reading argument: %s\n", name);
|
| 369 |
|
|
exit(-2);
|
| 370 |
|
|
}
|
| 371 |
|
|
|
| 372 |
|
|
|
| 373 |
|
|
void load_state() {
|
| 374 |
|
|
m68k_dreg(regs, 0) = get_arg("D0");
|
| 375 |
|
|
m68k_dreg(regs, 1) = get_arg("D1");
|
| 376 |
|
|
m68k_dreg(regs, 2) = get_arg("D2");
|
| 377 |
|
|
m68k_dreg(regs, 3) = get_arg("D3");
|
| 378 |
|
|
m68k_dreg(regs, 4) = get_arg("D4");
|
| 379 |
|
|
m68k_dreg(regs, 5) = get_arg("D5");
|
| 380 |
|
|
m68k_dreg(regs, 6) = get_arg("D6");
|
| 381 |
|
|
m68k_dreg(regs, 7) = get_arg("D7");
|
| 382 |
|
|
|
| 383 |
|
|
m68k_setpc(get_arg("PC"));
|
| 384 |
|
|
|
| 385 |
|
|
SET_CFLG(get_arg("C"));
|
| 386 |
|
|
SET_VFLG(get_arg("V"));
|
| 387 |
|
|
SET_ZFLG(get_arg("Z"));
|
| 388 |
|
|
SET_NFLG(get_arg("N"));
|
| 389 |
|
|
SET_XFLG(get_arg("X"));
|
| 390 |
|
|
|
| 391 |
|
|
regs.intmask = get_arg("IPM");
|
| 392 |
|
|
regs.s = get_arg("S");
|
| 393 |
|
|
regs.t1 = get_arg("T");
|
| 394 |
|
|
regs.m = 0;
|
| 395 |
|
|
|
| 396 |
|
|
m68k_areg(regs, 0) = get_arg("A0");
|
| 397 |
|
|
m68k_areg(regs, 1) = get_arg("A1");
|
| 398 |
|
|
m68k_areg(regs, 2) = get_arg("A2");
|
| 399 |
|
|
m68k_areg(regs, 3) = get_arg("A3");
|
| 400 |
|
|
m68k_areg(regs, 4) = get_arg("A4");
|
| 401 |
|
|
m68k_areg(regs, 5) = get_arg("A5");
|
| 402 |
|
|
m68k_areg(regs, 6) = get_arg("A6");
|
| 403 |
|
|
regs.usp = get_arg("USP");
|
| 404 |
|
|
regs.isp = get_arg("SSP");
|
| 405 |
|
|
if(regs.s == 0) m68k_areg(regs, 7) = regs.usp;
|
| 406 |
|
|
else m68k_areg(regs, 7) = regs.isp;
|
| 407 |
|
|
}
|
| 408 |
|
|
|
| 409 |
|
|
void save_state() {
|
| 410 |
|
|
printf("A0: %08x\n", m68k_areg(regs, 0));
|
| 411 |
|
|
printf("A1: %08x\n", m68k_areg(regs, 1));
|
| 412 |
|
|
printf("A2: %08x\n", m68k_areg(regs, 2));
|
| 413 |
|
|
printf("A3: %08x\n", m68k_areg(regs, 3));
|
| 414 |
|
|
printf("A4: %08x\n", m68k_areg(regs, 4));
|
| 415 |
|
|
printf("A5: %08x\n", m68k_areg(regs, 5));
|
| 416 |
|
|
printf("A6: %08x\n", m68k_areg(regs, 6));
|
| 417 |
|
|
printf("SSP: %08x\n", (regs.s == 1)? m68k_areg(regs, 7) : regs.isp);
|
| 418 |
|
|
printf("USP: %08x\n", (regs.s == 0)? m68k_areg(regs, 7) : regs.usp);
|
| 419 |
|
|
|
| 420 |
|
|
printf("D0: %08x\n", m68k_dreg(regs, 0));
|
| 421 |
|
|
printf("D1: %08x\n", m68k_dreg(regs, 1));
|
| 422 |
|
|
printf("D2: %08x\n", m68k_dreg(regs, 2));
|
| 423 |
|
|
printf("D3: %08x\n", m68k_dreg(regs, 3));
|
| 424 |
|
|
printf("D4: %08x\n", m68k_dreg(regs, 4));
|
| 425 |
|
|
printf("D5: %08x\n", m68k_dreg(regs, 5));
|
| 426 |
|
|
printf("D6: %08x\n", m68k_dreg(regs, 6));
|
| 427 |
|
|
printf("D7: %08x\n", m68k_dreg(regs, 7));
|
| 428 |
|
|
|
| 429 |
|
|
printf("PC: %08x\n", m68k_getpc());
|
| 430 |
|
|
|
| 431 |
|
|
printf("C: %d\n", GET_CFLG());
|
| 432 |
|
|
printf("V: %d\n", GET_VFLG());
|
| 433 |
|
|
printf("Z: %d\n", GET_ZFLG());
|
| 434 |
|
|
printf("N: %d\n", GET_NFLG());
|
| 435 |
|
|
printf("X: %d\n", GET_XFLG());
|
| 436 |
|
|
printf("IPM: %d\n", regs.intmask);
|
| 437 |
|
|
printf("S: %d\n", regs.s);
|
| 438 |
|
|
printf("T: %d\n", regs.t1);
|
| 439 |
|
|
}
|
| 440 |
|
|
|
| 441 |
|
|
int get_mem_arg(uae_u32 *vals, int vals_count, uaecptr addr) {
|
| 442 |
|
|
if((vals_count != 1 && vals_count != 2) || vals == NULL) {
|
| 443 |
|
|
printf("Illegal get_mem_arg arguments: %p, %d\n", vals, vals_count);
|
| 444 |
|
|
exit(-1);
|
| 445 |
|
|
}
|
| 446 |
|
|
char buf[1+3+8+1 +1];
|
| 447 |
|
|
if(snprintf(buf, sizeof(buf), "+MEM%08x=", addr>>2) != sizeof(buf)-1) {
|
| 448 |
|
|
printf("Internal error while preparing +MEM argument: %08x (%08x)\n", addr>>2, addr);
|
| 449 |
|
|
exit(-2);
|
| 450 |
|
|
}
|
| 451 |
|
|
uae_u32 temp = 0;
|
| 452 |
|
|
int i;
|
| 453 |
|
|
for(i=0; i<global_argc; i++) {
|
| 454 |
|
|
if(strncmp(global_argv[i], buf, sizeof(buf)-1) == 0) {
|
| 455 |
|
|
if(sscanf(global_argv[i], "+MEM%08x=%x", &temp, &(vals[0])) != 2) {
|
| 456 |
|
|
printf("Error parsing argument: %s\n", global_argv[i]);
|
| 457 |
|
|
exit(-3);
|
| 458 |
|
|
}
|
| 459 |
|
|
else break;
|
| 460 |
|
|
}
|
| 461 |
|
|
}
|
| 462 |
|
|
if(i==global_argc) {
|
| 463 |
|
|
printf("Missing argument: MEM%08x\n", addr>>2);
|
| 464 |
|
|
exit(-4);
|
| 465 |
|
|
}
|
| 466 |
|
|
if(vals_count == 1) return 1;
|
| 467 |
|
|
|
| 468 |
|
|
if(snprintf(buf, sizeof(buf), "+MEM%08x=", (addr>>2)+1) != sizeof(buf)-1) {
|
| 469 |
|
|
printf("Internal error while preparing +MEM argument: %08x (%08x)\n", (addr>>2)+1, addr+4);
|
| 470 |
|
|
exit(-5);
|
| 471 |
|
|
}
|
| 472 |
|
|
|
| 473 |
|
|
for(i=0; i<global_argc; i++) {
|
| 474 |
|
|
if(strncmp(global_argv[i], buf, sizeof(buf)-1) == 0) {
|
| 475 |
|
|
if(sscanf(global_argv[i], "+MEM%08x=%x", &temp, &(vals[1])) != 2) {
|
| 476 |
|
|
printf("Error parsing argument: %s\n", global_argv[i]);
|
| 477 |
|
|
exit(-6);
|
| 478 |
|
|
}
|
| 479 |
|
|
else break;
|
| 480 |
|
|
}
|
| 481 |
|
|
}
|
| 482 |
|
|
if(i==global_argc) return 1;
|
| 483 |
|
|
return 2;
|
| 484 |
|
|
}
|
| 485 |
|
|
|
| 486 |
|
|
//memory.h start
|
| 487 |
|
|
|
| 488 |
|
|
uae_u8 *get_real_address(uaecptr addr)
|
| 489 |
|
|
{
|
| 490 |
|
|
return (uae_u8 *)addr;
|
| 491 |
|
|
}
|
| 492 |
|
|
uae_u32 get_long(uaecptr ptr)
|
| 493 |
|
|
{
|
| 494 |
|
|
printf("memory read: address=%08x, select=%x\n", ptr>>2, 0xf);
|
| 495 |
|
|
|
| 496 |
|
|
uae_u32 vals[2];
|
| 497 |
|
|
int res = get_mem_arg(vals, 2, ptr);
|
| 498 |
|
|
|
| 499 |
|
|
if( (ptr % 4) > 0 && (res == 1) ) {
|
| 500 |
|
|
printf("Missing argument: MEM%08x\n", (ptr>>2)+1);
|
| 501 |
|
|
exit(-1);
|
| 502 |
|
|
}
|
| 503 |
|
|
else if((ptr % 4) == 0) return vals[0];
|
| 504 |
|
|
else if((ptr % 4) == 2) return (vals[0] << 16) | (vals[1] >> 16);
|
| 505 |
|
|
else if((ptr % 2) == 1) {
|
| 506 |
|
|
printf("memory read on odd address: long, ptr=%p\n", ptr);
|
| 507 |
|
|
exit(-1);
|
| 508 |
|
|
//return (vals[0] << 8) | (vals[1] >> 24);
|
| 509 |
|
|
//return 0;
|
| 510 |
|
|
}
|
| 511 |
|
|
}
|
| 512 |
|
|
uae_u32 get_word(uaecptr ptr)
|
| 513 |
|
|
{
|
| 514 |
|
|
printf("memory read: address=%08x, select=%x\n", ptr>>2, 0xf);
|
| 515 |
|
|
|
| 516 |
|
|
uae_u32 vals[2];
|
| 517 |
|
|
int res = get_mem_arg(vals, 2, ptr);
|
| 518 |
|
|
|
| 519 |
|
|
if( (ptr % 4) == 3 && (res == 1) ) {
|
| 520 |
|
|
printf("Missing argument: MEM%08x\n", (ptr>>2)+1);
|
| 521 |
|
|
exit(-1);
|
| 522 |
|
|
}
|
| 523 |
|
|
else if((ptr % 4) == 0) return (vals[0] >> 16) & 0xFFFF;
|
| 524 |
|
|
else if((ptr % 4) == 2) return (vals[0]) & 0xFFFF;
|
| 525 |
|
|
else if((ptr % 2) == 1) {
|
| 526 |
|
|
printf("memory read on odd address: word, ptr=%p\n", ptr);
|
| 527 |
|
|
exit(-1);
|
| 528 |
|
|
//return (vals[0] >> 8) & 0xFFFF;
|
| 529 |
|
|
//return 0;
|
| 530 |
|
|
}
|
| 531 |
|
|
|
| 532 |
|
|
}
|
| 533 |
|
|
uae_u32 get_byte(uaecptr ptr)
|
| 534 |
|
|
{
|
| 535 |
|
|
printf("memory read: address=%08x, select=%x\n", ptr>>2, 0xf);
|
| 536 |
|
|
uae_u32 vals[1];
|
| 537 |
|
|
get_mem_arg(vals, 1, ptr);
|
| 538 |
|
|
|
| 539 |
|
|
if((ptr % 4) == 0) return (vals[0] >> 24) & 0xFF;
|
| 540 |
|
|
else if((ptr % 4) == 1) return (vals[0] >> 16) & 0xFF;
|
| 541 |
|
|
else if((ptr % 4) == 2) return (vals[0] >> 8) & 0xFF;
|
| 542 |
|
|
else if((ptr % 4) == 3) return (vals[0]) & 0xFF;
|
| 543 |
|
|
}
|
| 544 |
|
|
|
| 545 |
|
|
void put_byte(uaecptr ptr, uae_u32 val)
|
| 546 |
|
|
{
|
| 547 |
|
|
if((ptr % 4) == 0) {
|
| 548 |
|
|
printf("memory write address=%08x, select=%x: value=%08x\n", ptr>>2, 0x8, val<<24);
|
| 549 |
|
|
}
|
| 550 |
|
|
else if((ptr % 4) == 1) {
|
| 551 |
|
|
printf("memory write address=%08x, select=%x: value=%08x\n", ptr>>2, 0x4, (val<<16) & 0x00FF0000);
|
| 552 |
|
|
}
|
| 553 |
|
|
else if((ptr % 4) == 2) {
|
| 554 |
|
|
printf("memory write address=%08x, select=%x: value=%08x\n", ptr>>2, 0x2, (val<<8) & 0x0000FF00);
|
| 555 |
|
|
}
|
| 556 |
|
|
else if((ptr % 4) == 3) {
|
| 557 |
|
|
printf("memory write address=%08x, select=%x: value=%08x\n", ptr>>2, 0x1, val & 0xFF);
|
| 558 |
|
|
}
|
| 559 |
|
|
}
|
| 560 |
|
|
void put_word(uaecptr ptr, uae_u32 val)
|
| 561 |
|
|
{
|
| 562 |
|
|
if((ptr % 4) == 0) {
|
| 563 |
|
|
printf("memory write address=%08x, select=%x: value=%08x\n", ptr>>2, 0xc, val<<16);
|
| 564 |
|
|
}
|
| 565 |
|
|
else if((ptr % 4) == 2) {
|
| 566 |
|
|
printf("memory write address=%08x, select=%x: value=%08x\n", ptr>>2, 0x3, val & 0xFFFF);
|
| 567 |
|
|
}
|
| 568 |
|
|
else if((ptr % 2) == 1) {
|
| 569 |
|
|
printf("memory write on odd address: word, ptr=%p, val=%x\n", ptr,val);
|
| 570 |
|
|
exit(-1);
|
| 571 |
|
|
//return;
|
| 572 |
|
|
}
|
| 573 |
|
|
}
|
| 574 |
|
|
void put_long(uaecptr ptr, uae_u32 val)
|
| 575 |
|
|
{
|
| 576 |
|
|
if((ptr % 4) == 0) {
|
| 577 |
|
|
printf("memory write address=%08x, select=%x: value=%08x\n", ptr>>2, 0xf, val);
|
| 578 |
|
|
}
|
| 579 |
|
|
else if((ptr % 4) == 2) {
|
| 580 |
|
|
printf("memory write address=%08x, select=%x: value=%08x\n", ptr>>2, 0x3, val>>16);
|
| 581 |
|
|
printf("memory write address=%08x, select=%x: value=%08x\n", (ptr>>2)+1, 0xc, val<<16);
|
| 582 |
|
|
}
|
| 583 |
|
|
else if((ptr % 2) == 1) {
|
| 584 |
|
|
printf("memory write on odd address: long, ptr=%p, val=%x\n", ptr,val);
|
| 585 |
|
|
exit(-1);
|
| 586 |
|
|
//return;
|
| 587 |
|
|
}
|
| 588 |
|
|
}
|
| 589 |
|
|
uae_u32 get_wordi(uaecptr addr)
|
| 590 |
|
|
{
|
| 591 |
|
|
return get_word(addr);
|
| 592 |
|
|
}
|
| 593 |
|
|
//memory.h end
|
| 594 |
|
|
|
| 595 |
|
|
//------------------------------------------------------------------- test end
|
| 596 |
|
|
|
| 597 |
|
|
static void build_cpufunctbl(void)
|
| 598 |
|
|
{
|
| 599 |
|
|
int i, opcnt;
|
| 600 |
|
|
unsigned long opcode;
|
| 601 |
|
|
const struct cputbl *tbl = 0;
|
| 602 |
|
|
int lvl;
|
| 603 |
|
|
|
| 604 |
|
|
lvl = 0;
|
| 605 |
|
|
tbl = op_smalltbl_11_ff; /* prefetch */
|
| 606 |
|
|
|
| 607 |
|
|
for (opcode = 0; opcode < 65536; opcode++)
|
| 608 |
|
|
cpufunctbl[opcode] = op_illg;
|
| 609 |
|
|
for (i = 0; tbl[i].handler != NULL; i++) {
|
| 610 |
|
|
opcode = tbl[i].opcode;
|
| 611 |
|
|
cpufunctbl[opcode] = tbl[i].handler;
|
| 612 |
|
|
}
|
| 613 |
|
|
|
| 614 |
|
|
opcnt = 0;
|
| 615 |
|
|
for (opcode = 0; opcode < 65536; opcode++) {
|
| 616 |
|
|
cpuop_func *f;
|
| 617 |
|
|
|
| 618 |
|
|
if (table68k[opcode].mnemo == i_ILLG)
|
| 619 |
|
|
continue;
|
| 620 |
|
|
if (table68k[opcode].clev > lvl) {
|
| 621 |
|
|
continue;
|
| 622 |
|
|
}
|
| 623 |
|
|
|
| 624 |
|
|
if (table68k[opcode].handler != -1) {
|
| 625 |
|
|
int idx = table68k[opcode].handler;
|
| 626 |
|
|
f = cpufunctbl[idx];
|
| 627 |
|
|
if (f == op_illg)
|
| 628 |
|
|
abort ();
|
| 629 |
|
|
cpufunctbl[opcode] = f;
|
| 630 |
|
|
opcnt++;
|
| 631 |
|
|
}
|
| 632 |
|
|
}
|
| 633 |
|
|
}
|
| 634 |
|
|
|
| 635 |
|
|
int main(int argc, char **argv) {
|
| 636 |
|
|
global_argv = argv;
|
| 637 |
|
|
global_argc = argc;
|
| 638 |
|
|
|
| 639 |
|
|
//init_m68k()
|
| 640 |
|
|
int i;
|
| 641 |
|
|
|
| 642 |
|
|
for (i = 0 ; i < 256 ; i++) {
|
| 643 |
|
|
int j;
|
| 644 |
|
|
for (j = 0 ; j < 8 ; j++) {
|
| 645 |
|
|
if (i & (1 << j)) break;
|
| 646 |
|
|
}
|
| 647 |
|
|
movem_index1[i] = j;
|
| 648 |
|
|
movem_index2[i] = 7-j;
|
| 649 |
|
|
movem_next[i] = i & (~(1 << j));
|
| 650 |
|
|
}
|
| 651 |
|
|
|
| 652 |
|
|
regs.address_space_mask = 0xffffffff;
|
| 653 |
|
|
|
| 654 |
|
|
read_table68k();
|
| 655 |
|
|
do_merges();
|
| 656 |
|
|
|
| 657 |
|
|
build_cpufunctbl();
|
| 658 |
|
|
|
| 659 |
|
|
//m68k_reset()
|
| 660 |
|
|
regs.spcflags = 0;
|
| 661 |
|
|
m68k_areg (regs, 7) = get_arg("SSP");
|
| 662 |
|
|
m68k_setpc(get_arg("PC"));
|
| 663 |
|
|
regs.s = 1;
|
| 664 |
|
|
regs.m = 0;
|
| 665 |
|
|
regs.stopped = 0;
|
| 666 |
|
|
regs.t1 = 0;
|
| 667 |
|
|
regs.t0 = 0;
|
| 668 |
|
|
SET_ZFLG(0);
|
| 669 |
|
|
SET_XFLG(0);
|
| 670 |
|
|
SET_CFLG(0);
|
| 671 |
|
|
SET_VFLG(0);
|
| 672 |
|
|
SET_NFLG(0);
|
| 673 |
|
|
regs.intmask = 7;
|
| 674 |
|
|
regs.vbr = regs.sfc = regs.dfc = 0;
|
| 675 |
|
|
regs.irc = 0xffff;
|
| 676 |
|
|
|
| 677 |
|
|
regs.pcr = 0;
|
| 678 |
|
|
|
| 679 |
|
|
printf("START TEST\n");
|
| 680 |
|
|
|
| 681 |
|
|
load_state();
|
| 682 |
|
|
|
| 683 |
|
|
MakeSR();
|
| 684 |
|
|
fill_prefetch_slow();
|
| 685 |
|
|
|
| 686 |
|
|
//m68k_go();
|
| 687 |
|
|
//m68k_run_1();
|
| 688 |
|
|
|
| 689 |
|
|
//AO m68k_setpc (regs.pc);
|
| 690 |
|
|
(*cpufunctbl[regs.ir])(regs.ir);
|
| 691 |
|
|
|
| 692 |
|
|
|
| 693 |
|
|
save_state();
|
| 694 |
|
|
|
| 695 |
|
|
return 0;
|
| 696 |
|
|
}
|
| 697 |
|
|
|