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[/] [ao68000/] [trunk/] [tests/] [soc_for_linux_on_terasic_de2_70/] [quartus_project/] [soc_for_linux.qsf] - Blame information for rev 12

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1 12 alfik 
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2009 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors.  Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II
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# Version 9.1 Build 222 10/21/2009 SJ Web Edition
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# Date created = 21:50:15  March 02, 2010
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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#               soc_for_linux_assignment_defaults.qdf
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#    If this file doesn't exist, see file:
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#               assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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#    file is updated automatically by the Quartus II software
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#    and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone II"
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set_global_assignment -name DEVICE EP2C70F896C6
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set_global_assignment -name TOP_LEVEL_ENTITY soc_for_linux
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.1
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:50:15  MARCH 02, 2010"
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set_global_assignment -name LAST_QUARTUS_VERSION 10.1
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set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
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set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 896
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 6
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name ENABLE_CLOCK_LATENCY ON
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
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set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
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set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
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set_location_assignment PIN_R3 -to clk_i
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set_location_assignment PIN_AA23 -to rst_i
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set_location_assignment PIN_T26 -to sd_clk_o
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set_location_assignment PIN_W29 -to sd_dat_io
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set_location_assignment PIN_W28 -to sd_cmd_io
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set_location_assignment PIN_AJ6 -to sd_debug[0]
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set_location_assignment PIN_AK5 -to sd_debug[1]
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set_location_assignment PIN_AJ5 -to sd_debug[2]
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set_location_assignment PIN_AJ4 -to sd_debug[3]
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set_location_assignment PIN_AK3 -to sd_debug[4]
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set_location_assignment PIN_AH4 -to sd_debug[5]
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set_location_assignment PIN_D21 -to uart_rxd
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set_location_assignment PIN_E21 -to uart_txd
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set_location_assignment PIN_G22 -to uart_cts
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set_location_assignment PIN_F23 -to uart_rts
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set_location_assignment PIN_AG8 -to ssram_address[0]
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set_location_assignment PIN_AF8 -to ssram_address[1]
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set_location_assignment PIN_AF14 -to ssram_address[10]
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set_location_assignment PIN_AG14 -to ssram_address[11]
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set_location_assignment PIN_AE15 -to ssram_address[12]
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set_location_assignment PIN_AF15 -to ssram_address[13]
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set_location_assignment PIN_AC16 -to ssram_address[14]
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set_location_assignment PIN_AF20 -to ssram_address[15]
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set_location_assignment PIN_AG20 -to ssram_address[16]
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set_location_assignment PIN_AE11 -to ssram_address[17]
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set_location_assignment PIN_AF11 -to ssram_address[18]
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#set_location_assignment PIN_AG10 -to ssram_address[19]
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set_location_assignment PIN_AH7 -to ssram_address[2]
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#set_location_assignment PIN_AG9 -to ssram_address[20]
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set_location_assignment PIN_AG7 -to ssram_address[3]
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set_location_assignment PIN_AG6 -to ssram_address[4]
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set_location_assignment PIN_AG5 -to ssram_address[5]
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set_location_assignment PIN_AE12 -to ssram_address[6]
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set_location_assignment PIN_AG12 -to ssram_address[7]
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set_location_assignment PIN_AD13 -to ssram_address[8]
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set_location_assignment PIN_AE13 -to ssram_address[9]
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set_location_assignment PIN_AG17 -to ssram_adsc_n
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set_location_assignment PIN_AC18 -to ssram_adsp_n
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set_location_assignment PIN_AD16 -to ssram_advance_n
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set_location_assignment PIN_AC21 -to ssram_byteen0_n
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set_location_assignment PIN_AC20 -to ssram_byteen1_n
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set_location_assignment PIN_AD20 -to ssram_byteen2_n
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set_location_assignment PIN_AH20 -to ssram_byteen3_n
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set_location_assignment PIN_AH19 -to ssram_ce1_n
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set_location_assignment PIN_AG19 -to ssram_ce2
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set_location_assignment PIN_AD22 -to ssram_ce3_n
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set_location_assignment PIN_AD7 -to ssram_clk
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#set_location_assignment PIN_AK9 -to SRAM_DPA[0]
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#set_location_assignment PIN_AJ23 -to SRAM_DPA[1]
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#set_location_assignment PIN_AK20 -to SRAM_DPA[2]
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#set_location_assignment PIN_AJ9 -to SRAM_DPA[3]
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set_location_assignment PIN_AH10 -to ssram_data[0]
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set_location_assignment PIN_AJ10 -to ssram_data[1]
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set_location_assignment PIN_AH17 -to ssram_data[10]
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set_location_assignment PIN_AJ18 -to ssram_data[11]
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set_location_assignment PIN_AH18 -to ssram_data[12]
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set_location_assignment PIN_AK19 -to ssram_data[13]
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set_location_assignment PIN_AJ19 -to ssram_data[14]
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set_location_assignment PIN_AK23 -to ssram_data[15]
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set_location_assignment PIN_AJ20 -to ssram_data[16]
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set_location_assignment PIN_AK21 -to ssram_data[17]
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set_location_assignment PIN_AJ21 -to ssram_data[18]
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set_location_assignment PIN_AK22 -to ssram_data[19]
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set_location_assignment PIN_AK10 -to ssram_data[2]
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set_location_assignment PIN_AJ22 -to ssram_data[20]
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set_location_assignment PIN_AH15 -to ssram_data[21]
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set_location_assignment PIN_AJ15 -to ssram_data[22]
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set_location_assignment PIN_AJ16 -to ssram_data[23]
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set_location_assignment PIN_AK14 -to ssram_data[24]
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set_location_assignment PIN_AJ14 -to ssram_data[25]
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set_location_assignment PIN_AJ13 -to ssram_data[26]
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set_location_assignment PIN_AH13 -to ssram_data[27]
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set_location_assignment PIN_AK12 -to ssram_data[28]
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set_location_assignment PIN_AK7 -to ssram_data[29]
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set_location_assignment PIN_AJ11 -to ssram_data[3]
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set_location_assignment PIN_AJ8 -to ssram_data[30]
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set_location_assignment PIN_AK8 -to ssram_data[31]
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set_location_assignment PIN_AK11 -to ssram_data[4]
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set_location_assignment PIN_AH12 -to ssram_data[5]
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set_location_assignment PIN_AJ12 -to ssram_data[6]
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set_location_assignment PIN_AH16 -to ssram_data[7]
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set_location_assignment PIN_AK17 -to ssram_data[8]
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set_location_assignment PIN_AJ17 -to ssram_data[9]
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set_location_assignment PIN_AG18 -to ssram_globalw_n
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set_location_assignment PIN_AD18 -to ssram_oe_n
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set_location_assignment PIN_AF18 -to ssram_writeen_n
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
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set_location_assignment PIN_AC13 -to pc_debug[0]
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set_location_assignment PIN_AB13 -to pc_debug[1]
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set_location_assignment PIN_AC12 -to pc_debug[2]
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set_location_assignment PIN_AB12 -to pc_debug[3]
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set_location_assignment PIN_AC11 -to pc_debug[4]
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set_location_assignment PIN_AD9 -to pc_debug[5]
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set_location_assignment PIN_AD8 -to pc_debug[6]
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set_location_assignment PIN_AJ7 -to pc_debug[7]
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set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO PATHS AND MINIMUM TPD PATHS"
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set_global_assignment -name FITTER_EFFORT "AUTO FIT"
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set_global_assignment -name SMART_RECOMPILE ON
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set_global_assignment -name SDC_FILE soc_for_linux.sdc
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set_global_assignment -name VERILOG_FILE ao68000.v
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set_global_assignment -name VERILOG_FILE ssram.v
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set_global_assignment -name VERILOG_FILE early_boot.v
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set_global_assignment -name VERILOG_FILE soc_for_linux.v
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set_global_assignment -name VERILOG_FILE sd.v
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set_global_assignment -name VERILOG_FILE serial_txd.v
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set_global_assignment -name VERILOG_FILE timer.v
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top

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