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<h1>cia8520.v</h1> </div>
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<a href="cia8520_8v.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001 <span class="keyword">/* </span>
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<a name="l00002"></a>00002 <span class="keyword"> Copyright 2010, Aleksander Osman, alfik@poczta.fm. All rights reserved.</span>
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<a name="l00003"></a>00003 <span class="keyword"> </span>
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<a name="l00004"></a>00004 <span class="keyword"> Redistribution and use in source and binary forms, with or without modification, are</span>
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<a name="l00005"></a>00005 <span class="keyword"> permitted provided that the following conditions are met:</span>
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| 35 |
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<a name="l00006"></a>00006 <span class="keyword"> </span>
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| 36 |
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<a name="l00007"></a>00007 <span class="keyword"> 1. Redistributions of source code must retain the above copyright notice, this list of</span>
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<a name="l00008"></a>00008 <span class="keyword"> conditions and the following disclaimer.</span>
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| 38 |
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<a name="l00009"></a>00009 <span class="keyword"> </span>
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| 39 |
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<a name="l00010"></a>00010 <span class="keyword"> 2. Redistributions in binary form must reproduce the above copyright notice, this list</span>
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| 40 |
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<a name="l00011"></a>00011 <span class="keyword"> of conditions and the following disclaimer in the documentation and/or other materials</span>
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| 41 |
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<a name="l00012"></a>00012 <span class="keyword"> provided with the distribution.</span>
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| 42 |
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<a name="l00013"></a>00013 <span class="keyword"> </span>
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| 43 |
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<a name="l00014"></a>00014 <span class="keyword"> THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED</span>
|
| 44 |
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<a name="l00015"></a>00015 <span class="keyword"> WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND</span>
|
| 45 |
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<a name="l00016"></a>00016 <span class="keyword"> FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR</span>
|
| 46 |
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<a name="l00017"></a>00017 <span class="keyword"> CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</span>
|
| 47 |
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<a name="l00018"></a>00018 <span class="keyword"> CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR</span>
|
| 48 |
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<a name="l00019"></a>00019 <span class="keyword"> SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON</span>
|
| 49 |
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<a name="l00020"></a>00020 <span class="keyword"> ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING</span>
|
| 50 |
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<a name="l00021"></a>00021 <span class="keyword"> NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF</span>
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| 51 |
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<a name="l00022"></a>00022 <span class="keyword"> ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</span>
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| 52 |
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<a name="l00023"></a>00023 <span class="keyword"> */</span>
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<a name="l00024"></a>00024
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<a name="l00025"></a>00025 <span class="keyword">/*! \file</span>
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| 55 |
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<a name="l00026"></a>00026 <span class="keyword"> \brief Commodore 8520 Complex Interface Adapter implementation.</span>
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| 56 |
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<a name="l00027"></a>00027 <span class="keyword"> */</span>
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<a name="l00028"></a>00028
|
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<a name="l00029"></a>00029 <span class="keyword">/*! \brief \copybrief cia8520.v</span>
|
| 59 |
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<a name="l00030"></a>00030 <span class="keyword">*/</span>
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| 60 |
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<a name="l00031"></a><a class="code" href="classcia8520.html">00031</a> <span class="vhdlkeyword">module</span> <a class="code" href="classcia8520.html">cia8520</a>(
|
| 61 |
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<a name="l00032"></a>00032 <span class="keyword">//% \name Clock and reset
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| 62 |
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</span>
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| 63 |
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<a name="l00033"></a>00033 <span class="keyword">//% @{</span>
|
| 64 |
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<a name="l00034"></a><a class="code" href="classcia8520.html#af7454ea20899e888f30007136ba4fde9">00034</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#af7454ea20899e888f30007136ba4fde9">CLK_I</a>,
|
| 65 |
|
|
<a name="l00035"></a><a class="code" href="classcia8520.html#ae3053a011caf90fa83f79e9f3edc428d">00035</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#ae3053a011caf90fa83f79e9f3edc428d">reset_n</a>,
|
| 66 |
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<a name="l00036"></a>00036 <span class="keyword">//% @}</span>
|
| 67 |
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|
<a name="l00037"></a>00037
|
| 68 |
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<a name="l00038"></a>00038 <span class="keyword">//% \name WISHBONE slave
|
| 69 |
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</span>
|
| 70 |
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<a name="l00039"></a>00039 <span class="keyword">//% @{</span>
|
| 71 |
|
|
<a name="l00040"></a><a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">00040</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a>,
|
| 72 |
|
|
<a name="l00041"></a><a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">00041</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a>,
|
| 73 |
|
|
<a name="l00042"></a><a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">00042</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a>,
|
| 74 |
|
|
<a name="l00043"></a><a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">00043</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a>,
|
| 75 |
|
|
<a name="l00044"></a><a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">00044</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>,
|
| 76 |
|
|
<a name="l00045"></a><a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">00045</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a>,
|
| 77 |
|
|
<a name="l00046"></a><a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">00046</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a>,
|
| 78 |
|
|
<a name="l00047"></a>00047 <span class="keyword">//% @}</span>
|
| 79 |
|
|
<a name="l00048"></a>00048
|
| 80 |
|
|
<a name="l00049"></a>00049 <span class="keyword">//% \name Internal OCS ports
|
| 81 |
|
|
</span>
|
| 82 |
|
|
<a name="l00050"></a>00050 <span class="keyword">//% @{</span>
|
| 83 |
|
|
<a name="l00051"></a><a class="code" href="classcia8520.html#a46b0acf74c4cd2ce0fbd3defc5386136">00051</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#a46b0acf74c4cd2ce0fbd3defc5386136">pulse_709379_hz</a>,
|
| 84 |
|
|
<a name="l00052"></a>00052 <span class="keyword">//% @}</span>
|
| 85 |
|
|
<a name="l00053"></a>00053
|
| 86 |
|
|
<a name="l00054"></a>00054 <span class="keyword">//% \name 8520 synchronous interface
|
| 87 |
|
|
</span>
|
| 88 |
|
|
<a name="l00055"></a>00055 <span class="keyword">//% @{</span>
|
| 89 |
|
|
<a name="l00056"></a><a class="code" href="classcia8520.html#a6170dfb9309559053d3a796539b0836e">00056</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a6170dfb9309559053d3a796539b0836e">pa_o</a>,
|
| 90 |
|
|
<a name="l00057"></a><a class="code" href="classcia8520.html#a13cdeb43c9a7752f29f22b0e91b33017">00057</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a13cdeb43c9a7752f29f22b0e91b33017">pb_o</a>,
|
| 91 |
|
|
<a name="l00058"></a><a class="code" href="classcia8520.html#aaa572548e346e473e4bd0d2a2b81e31b">00058</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#aaa572548e346e473e4bd0d2a2b81e31b">pa_i</a>,
|
| 92 |
|
|
<a name="l00059"></a><a class="code" href="classcia8520.html#a24bf9b866e68ca32fc5594e5b7ea37dd">00059</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a24bf9b866e68ca32fc5594e5b7ea37dd">pb_i</a>,
|
| 93 |
|
|
<a name="l00060"></a>00060
|
| 94 |
|
|
<a name="l00061"></a><a class="code" href="classcia8520.html#a8f14aac8ad64c383dda57b5cfa8d9576">00061</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#a8f14aac8ad64c383dda57b5cfa8d9576">flag_n</a>,
|
| 95 |
|
|
<a name="l00062"></a><a class="code" href="classcia8520.html#af4bd9d1e2af389f8e8129c43c542345a">00062</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#af4bd9d1e2af389f8e8129c43c542345a">pc_n</a>,
|
| 96 |
|
|
<a name="l00063"></a><a class="code" href="classcia8520.html#a2122ea742c7126d13cc5bb9e9d4e95db">00063</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#a2122ea742c7126d13cc5bb9e9d4e95db">tod</a>,
|
| 97 |
|
|
<a name="l00064"></a><a class="code" href="classcia8520.html#aae48637f69b17be5abc54ad39726f86e">00064</a> <span class="vhdlkeyword">output</span> <a class="code" href="classcia8520.html#aae48637f69b17be5abc54ad39726f86e">irq_n</a>,
|
| 98 |
|
|
<a name="l00065"></a>00065
|
| 99 |
|
|
<a name="l00066"></a><a class="code" href="classcia8520.html#a0d394218047f203560d75a3cd380ac3e">00066</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#a0d394218047f203560d75a3cd380ac3e">sp_i</a>,
|
| 100 |
|
|
<a name="l00067"></a><a class="code" href="classcia8520.html#a4f5d392cf19a60f0a9e24b019b2f9c70">00067</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#a4f5d392cf19a60f0a9e24b019b2f9c70">sp_o</a>,
|
| 101 |
|
|
<a name="l00068"></a><a class="code" href="classcia8520.html#ac1ffbdf42f2811fb7c322367ab022bde">00068</a> <span class="vhdlkeyword">input</span> <a class="code" href="classcia8520.html#ac1ffbdf42f2811fb7c322367ab022bde">cnt_i</a>,
|
| 102 |
|
|
<a name="l00069"></a><a class="code" href="classcia8520.html#a3ac9f49f562604b082a4023ec0add13d">00069</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#a3ac9f49f562604b082a4023ec0add13d">cnt_o</a>
|
| 103 |
|
|
<a name="l00070"></a>00070 <span class="keyword">//% @}</span>
|
| 104 |
|
|
<a name="l00071"></a>00071 );
|
| 105 |
|
|
<a name="l00072"></a>00072
|
| 106 |
|
|
<a name="l00073"></a><a class="code" href="classcia8520.html#aea2105909da941728fed899d74afeff0">00073</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#aea2105909da941728fed899d74afeff0">pa_o_reg</a>;
|
| 107 |
|
|
<a name="l00074"></a>00074 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#a6170dfb9309559053d3a796539b0836e">pa_o</a> = (<a class="code" href="classcia8520.html#a513382cca481c8a5618c4c06fc4c20c3">ddra</a> & <a class="code" href="classcia8520.html#aea2105909da941728fed899d74afeff0">pa_o_reg</a>) | (~<a class="code" href="classcia8520.html#a513382cca481c8a5618c4c06fc4c20c3">ddra</a> & <a class="code" href="classcia8520.html#aaa572548e346e473e4bd0d2a2b81e31b">pa_i</a>);
|
| 108 |
|
|
<a name="l00075"></a><a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">00075</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>;
|
| 109 |
|
|
<a name="l00076"></a>00076 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#a13cdeb43c9a7752f29f22b0e91b33017">pb_o</a> = (<a class="code" href="classcia8520.html#a846e07d7fa9306e9167a73d8a279f1c4">ddrb</a> & <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>) | (~<a class="code" href="classcia8520.html#a846e07d7fa9306e9167a73d8a279f1c4">ddrb</a> & <a class="code" href="classcia8520.html#a24bf9b866e68ca32fc5594e5b7ea37dd">pb_i</a>);
|
| 110 |
|
|
<a name="l00077"></a>00077
|
| 111 |
|
|
<a name="l00078"></a>00078 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#aae48637f69b17be5abc54ad39726f86e">irq_n</a> = ~<a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">5</span>];
|
| 112 |
|
|
<a name="l00079"></a>00079
|
| 113 |
|
|
<a name="l00080"></a><a class="code" href="classcia8520.html#af360efc39c1560425a58f4344ed90e89">00080</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#af360efc39c1560425a58f4344ed90e89">last_cnt_i</a>;
|
| 114 |
|
|
<a name="l00081"></a>00081
|
| 115 |
|
|
<a name="l00082"></a>00082 <span class="keyword">// 0 = input, 1 = output</span>
|
| 116 |
|
|
<a name="l00083"></a><a class="code" href="classcia8520.html#a513382cca481c8a5618c4c06fc4c20c3">00083</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a513382cca481c8a5618c4c06fc4c20c3">ddra</a>;
|
| 117 |
|
|
<a name="l00084"></a><a class="code" href="classcia8520.html#a846e07d7fa9306e9167a73d8a279f1c4">00084</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a846e07d7fa9306e9167a73d8a279f1c4">ddrb</a>;
|
| 118 |
|
|
<a name="l00085"></a>00085
|
| 119 |
|
|
<a name="l00086"></a><a class="code" href="classcia8520.html#ae178dbc26a2698c23a7605f3d7dffbdb">00086</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#ae178dbc26a2698c23a7605f3d7dffbdb">timera_latch</a>;
|
| 120 |
|
|
<a name="l00087"></a><a class="code" href="classcia8520.html#abd3fbc899b973e478cd7e3df16feb8b7">00087</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#abd3fbc899b973e478cd7e3df16feb8b7">timerb_latch</a>;
|
| 121 |
|
|
<a name="l00088"></a><a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">00088</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>;
|
| 122 |
|
|
<a name="l00089"></a><a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">00089</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>;
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| 123 |
|
|
<a name="l00090"></a><a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">00090</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">23</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a>;
|
| 124 |
|
|
<a name="l00091"></a><a class="code" href="classcia8520.html#ab6c6b9ff872e5af9ecf775df56d03f83">00091</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">23</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#ab6c6b9ff872e5af9ecf775df56d03f83">tod_latch</a>;
|
| 125 |
|
|
<a name="l00092"></a><a class="code" href="classcia8520.html#a3eb6a5baa87f3a197a5cb1a9a3699a07">00092</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#a3eb6a5baa87f3a197a5cb1a9a3699a07">tod_write_stop</a>;
|
| 126 |
|
|
<a name="l00093"></a><a class="code" href="classcia8520.html#a018c4773d815ddc972652c4da9601f50">00093</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#a018c4773d815ddc972652c4da9601f50">tod_read_latch</a>;
|
| 127 |
|
|
<a name="l00094"></a><a class="code" href="classcia8520.html#adcd479acfe899597982f270df4ad81b5">00094</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">23</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#adcd479acfe899597982f270df4ad81b5">tod_alarm</a>;
|
| 128 |
|
|
<a name="l00095"></a>00095
|
| 129 |
|
|
<a name="l00096"></a><a class="code" href="classcia8520.html#a143b97fea35027f71aef60115f2fc961">00096</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#a143b97fea35027f71aef60115f2fc961">serial_irq</a>;
|
| 130 |
|
|
<a name="l00097"></a><a class="code" href="classcia8520.html#ac8d128e7618225ec328efa8a11fb9141">00097</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#ac8d128e7618225ec328efa8a11fb9141">serial_latch</a>;
|
| 131 |
|
|
<a name="l00098"></a><a class="code" href="classcia8520.html#ab4f567929d2e1ae0310c2d455dabb98b">00098</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#ab4f567929d2e1ae0310c2d455dabb98b">serial_latched</a>;
|
| 132 |
|
|
<a name="l00099"></a><a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">00099</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a>;
|
| 133 |
|
|
<a name="l00100"></a><a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">00100</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a>;
|
| 134 |
|
|
<a name="l00101"></a>00101
|
| 135 |
|
|
<a name="l00102"></a><a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">00102</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a>;
|
| 136 |
|
|
<a name="l00103"></a><a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">00103</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>;
|
| 137 |
|
|
<a name="l00104"></a>00104
|
| 138 |
|
|
<a name="l00105"></a><a class="code" href="classcia8520.html#afc9338335b96773f2049399a04255529">00105</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcia8520.html#afc9338335b96773f2049399a04255529">icr_data_read</a>;
|
| 139 |
|
|
<a name="l00106"></a>00106 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#afc9338335b96773f2049399a04255529">icr_data_read</a> = (<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd13</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
|
| 140 |
|
|
<a name="l00107"></a>00107
|
| 141 |
|
|
<a name="l00108"></a>00108 <span class="keyword">// from datasheet:</span>
|
| 142 |
|
|
<a name="l00109"></a>00109 <span class="keyword">// write high && one-shot && stopped(?) ----> timer <= latch; initiate counting regardless start; start <= 1'b1(?)</span>
|
| 143 |
|
|
<a name="l00110"></a>00110 <span class="keyword">// write high && stopped ----> timer <= latch;</span>
|
| 144 |
|
|
<a name="l00111"></a>00111 <span class="keyword">// write high && running ----> latch</span>
|
| 145 |
|
|
<a name="l00112"></a>00112
|
| 146 |
|
|
<a name="l00113"></a>00113 <span class="keyword">// Timer A</span>
|
| 147 |
|
|
<a name="l00114"></a><a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">00114</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">timera</a>;
|
| 148 |
|
|
<a name="l00115"></a><a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">00115</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a>;
|
| 149 |
|
|
<a name="l00116"></a>00116
|
| 150 |
|
|
<a name="l00117"></a><a class="code" href="classcia8520.html#abedeaa7155bf5185420b5dd4606982bc">00117</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcia8520.html#abedeaa7155bf5185420b5dd4606982bc">timera_force_load</a>;
|
| 151 |
|
|
<a name="l00118"></a>00118 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#abedeaa7155bf5185420b5dd4606982bc">timera_force_load</a> =
|
| 152 |
|
|
<a name="l00119"></a>00119 (<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd14</span> && <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a> == <span class="vhdllogic">1'b1</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
|
| 153 |
|
|
<a name="l00120"></a>00120
|
| 154 |
|
|
<a name="l00121"></a><a class="code" href="classcia8520.html#a8fa6fd5e096036071cf0899aed4da3d3">00121</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcia8520.html#a8fa6fd5e096036071cf0899aed4da3d3">timera_loadhigh_when_stopped</a>;
|
| 155 |
|
|
<a name="l00122"></a>00122 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#a8fa6fd5e096036071cf0899aed4da3d3">timera_loadhigh_when_stopped</a> =
|
| 156 |
|
|
<a name="l00123"></a>00123 (<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd5</span> && <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a> == <span class="vhdllogic">1'b1</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
|
| 157 |
|
|
<a name="l00124"></a>00124
|
| 158 |
|
|
<a name="l00125"></a><a class="code" href="classcia8520.html#af390e1e0016a3461c18b6912b7d76439">00125</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcia8520.html#af390e1e0016a3461c18b6912b7d76439">timera_tick</a>;
|
| 159 |
|
|
<a name="l00126"></a>00126 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#af390e1e0016a3461c18b6912b7d76439">timera_tick</a> =
|
| 160 |
|
|
<a name="l00127"></a>00127 (<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> &&
|
| 161 |
|
|
<a name="l00128"></a>00128 (
|
| 162 |
|
|
<a name="l00129"></a>00129 (<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a46b0acf74c4cd2ce0fbd3defc5386136">pulse_709379_hz</a> == <span class="vhdllogic">1'b1</span>) ||
|
| 163 |
|
|
<a name="l00130"></a>00130 (<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#af360efc39c1560425a58f4344ed90e89">last_cnt_i</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#ac1ffbdf42f2811fb7c322367ab022bde">cnt_i</a> == <span class="vhdllogic">1'b1</span>)
|
| 164 |
|
|
<a name="l00131"></a>00131 )
|
| 165 |
|
|
<a name="l00132"></a>00132 ) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
|
| 166 |
|
|
<a name="l00133"></a>00133
|
| 167 |
|
|
<a name="l00134"></a>00134 <span class="keyword">// Timer B</span>
|
| 168 |
|
|
<a name="l00135"></a><a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">00135</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">timerb</a>;
|
| 169 |
|
|
<a name="l00136"></a><a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">00136</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">underflowb</a>;
|
| 170 |
|
|
<a name="l00137"></a>00137
|
| 171 |
|
|
<a name="l00138"></a><a class="code" href="classcia8520.html#a1babb675cbb1c4dcb6727ff1f200f664">00138</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcia8520.html#a1babb675cbb1c4dcb6727ff1f200f664">timerb_force_load</a>;
|
| 172 |
|
|
<a name="l00139"></a>00139 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#a1babb675cbb1c4dcb6727ff1f200f664">timerb_force_load</a> =
|
| 173 |
|
|
<a name="l00140"></a>00140 (<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd15</span> && <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a> == <span class="vhdllogic">1'b1</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
|
| 174 |
|
|
<a name="l00141"></a>00141
|
| 175 |
|
|
<a name="l00142"></a><a class="code" href="classcia8520.html#a90ac5696f1dc1b4f2efa145ec93b1abf">00142</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcia8520.html#a90ac5696f1dc1b4f2efa145ec93b1abf">timerb_loadhigh_when_stopped</a>;
|
| 176 |
|
|
<a name="l00143"></a>00143 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#a90ac5696f1dc1b4f2efa145ec93b1abf">timerb_loadhigh_when_stopped</a> =
|
| 177 |
|
|
<a name="l00144"></a>00144 (<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd7</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a> == <span class="vhdllogic">1'b1</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
|
| 178 |
|
|
<a name="l00145"></a>00145
|
| 179 |
|
|
<a name="l00146"></a><a class="code" href="classcia8520.html#a1f811c521a8b8c0598ba7819910b06f0">00146</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcia8520.html#a1f811c521a8b8c0598ba7819910b06f0">timerb_tick</a>;
|
| 180 |
|
|
<a name="l00147"></a>00147 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#a1f811c521a8b8c0598ba7819910b06f0">timerb_tick</a> =
|
| 181 |
|
|
<a name="l00148"></a>00148 (<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> &&
|
| 182 |
|
|
<a name="l00149"></a>00149 (
|
| 183 |
|
|
<a name="l00150"></a>00150 (<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">2'b00</span> && <a class="code" href="classcia8520.html#a46b0acf74c4cd2ce0fbd3defc5386136">pulse_709379_hz</a> == <span class="vhdllogic">1'b1</span>) ||
|
| 184 |
|
|
<a name="l00151"></a>00151 (<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">2'b01</span> && <a class="code" href="classcia8520.html#af360efc39c1560425a58f4344ed90e89">last_cnt_i</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#ac1ffbdf42f2811fb7c322367ab022bde">cnt_i</a> == <span class="vhdllogic">1'b1</span>) ||
|
| 185 |
|
|
<a name="l00152"></a>00152 (<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">2'b10</span> && <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> == <span class="vhdllogic">1'b1</span>) ||
|
| 186 |
|
|
<a name="l00153"></a>00153 (<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#ac1ffbdf42f2811fb7c322367ab022bde">cnt_i</a> == <span class="vhdllogic">1'b1</span>)
|
| 187 |
|
|
<a name="l00154"></a>00154 )
|
| 188 |
|
|
<a name="l00155"></a>00155 ) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
|
| 189 |
|
|
<a name="l00156"></a>00156
|
| 190 |
|
|
<a name="l00157"></a><a class="code" href="classcia8520.html#a6a3c75ee0ddd8106ef64b3854c049c94">00157</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcia8520.html#a6a3c75ee0ddd8106ef64b3854c049c94">alarm</a>;
|
| 191 |
|
|
<a name="l00158"></a>00158 <span class="vhdlkeyword">assign</span> <a class="code" href="classcia8520.html#a6a3c75ee0ddd8106ef64b3854c049c94">alarm</a> = (<a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a> == <a class="code" href="classcia8520.html#adcd479acfe899597982f270df4ad81b5">tod_alarm</a>);
|
| 192 |
|
|
<a name="l00159"></a>00159
|
| 193 |
|
|
<a name="l00160"></a><a class="code" href="classcia8520.html#a7c5ddb750df70240a01268359b39bcff">00160</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classcia8520.html#af7454ea20899e888f30007136ba4fde9">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classcia8520.html#ae3053a011caf90fa83f79e9f3edc428d">reset_n</a>) <span class="vhdlkeyword">begin</span>
|
| 194 |
|
|
<a name="l00161"></a>00161 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ae3053a011caf90fa83f79e9f3edc428d">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
| 195 |
|
|
<a name="l00162"></a>00162 <a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
| 196 |
|
|
<a name="l00163"></a>00163 <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <span class="vhdllogic">8'd0</span>;
|
| 197 |
|
|
<a name="l00164"></a>00164
|
| 198 |
|
|
<a name="l00165"></a>00165 <a class="code" href="classcia8520.html#aea2105909da941728fed899d74afeff0">pa_o_reg</a> <= <span class="vhdllogic">8'd0</span>;
|
| 199 |
|
|
<a name="l00166"></a>00166 <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a> <= <span class="vhdllogic">8'd0</span>;
|
| 200 |
|
|
<a name="l00167"></a>00167 <a class="code" href="classcia8520.html#a513382cca481c8a5618c4c06fc4c20c3">ddra</a> <= <span class="vhdllogic">8'd0</span>;
|
| 201 |
|
|
<a name="l00168"></a>00168 <a class="code" href="classcia8520.html#a846e07d7fa9306e9167a73d8a279f1c4">ddrb</a> <= <span class="vhdllogic">8'd0</span>;
|
| 202 |
|
|
<a name="l00169"></a>00169
|
| 203 |
|
|
<a name="l00170"></a>00170 <a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">timera</a> <= <span class="vhdllogic">16'd0</span>;
|
| 204 |
|
|
<a name="l00171"></a>00171 <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> <= <span class="vhdllogic">1'b0</span>;
|
| 205 |
|
|
<a name="l00172"></a>00172 <a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">timerb</a> <= <span class="vhdllogic">16'd0</span>;
|
| 206 |
|
|
<a name="l00173"></a>00173 <a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">underflowb</a> <= <span class="vhdllogic">1'b0</span>;
|
| 207 |
|
|
<a name="l00174"></a>00174
|
| 208 |
|
|
<a name="l00175"></a>00175 <a class="code" href="classcia8520.html#ae178dbc26a2698c23a7605f3d7dffbdb">timera_latch</a> <= <span class="vhdllogic">16'hFFFF</span>;
|
| 209 |
|
|
<a name="l00176"></a>00176 <a class="code" href="classcia8520.html#abd3fbc899b973e478cd7e3df16feb8b7">timerb_latch</a> <= <span class="vhdllogic">16'hFFFF</span>;
|
| 210 |
|
|
<a name="l00177"></a>00177 <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a> <= <span class="vhdllogic">6'd0</span>;
|
| 211 |
|
|
<a name="l00178"></a>00178 <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a> <= <span class="vhdllogic">7'd0</span>;
|
| 212 |
|
|
<a name="l00179"></a>00179
|
| 213 |
|
|
<a name="l00180"></a>00180 <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a> <= <span class="vhdllogic">24'd0</span>;
|
| 214 |
|
|
<a name="l00181"></a>00181 <a class="code" href="classcia8520.html#ab6c6b9ff872e5af9ecf775df56d03f83">tod_latch</a> <= <span class="vhdllogic">24'd0</span>;
|
| 215 |
|
|
<a name="l00182"></a>00182 <a class="code" href="classcia8520.html#a3eb6a5baa87f3a197a5cb1a9a3699a07">tod_write_stop</a> <= <span class="vhdllogic">1'b1</span>;
|
| 216 |
|
|
<a name="l00183"></a>00183 <a class="code" href="classcia8520.html#a018c4773d815ddc972652c4da9601f50">tod_read_latch</a> <= <span class="vhdllogic">1'b0</span>;
|
| 217 |
|
|
<a name="l00184"></a>00184 <a class="code" href="classcia8520.html#adcd479acfe899597982f270df4ad81b5">tod_alarm</a> <= <span class="vhdllogic">24'd0</span>;
|
| 218 |
|
|
<a name="l00185"></a>00185
|
| 219 |
|
|
<a name="l00186"></a>00186 <a class="code" href="classcia8520.html#af4bd9d1e2af389f8e8129c43c542345a">pc_n</a> <= <span class="vhdllogic">1'b1</span>;
|
| 220 |
|
|
<a name="l00187"></a>00187
|
| 221 |
|
|
<a name="l00188"></a>00188 <a class="code" href="classcia8520.html#a4f5d392cf19a60f0a9e24b019b2f9c70">sp_o</a> <= <span class="vhdllogic">1'b1</span>;
|
| 222 |
|
|
<a name="l00189"></a>00189 <a class="code" href="classcia8520.html#a3ac9f49f562604b082a4023ec0add13d">cnt_o</a> <= <span class="vhdllogic">1'b1</span>;
|
| 223 |
|
|
<a name="l00190"></a>00190 <a class="code" href="classcia8520.html#a143b97fea35027f71aef60115f2fc961">serial_irq</a> <= <span class="vhdllogic">1'b0</span>;
|
| 224 |
|
|
<a name="l00191"></a>00191 <a class="code" href="classcia8520.html#ac8d128e7618225ec328efa8a11fb9141">serial_latch</a> <= <span class="vhdllogic">8'd0</span>;
|
| 225 |
|
|
<a name="l00192"></a>00192 <a class="code" href="classcia8520.html#ab4f567929d2e1ae0310c2d455dabb98b">serial_latched</a> <= <span class="vhdllogic">1'b0</span>;
|
| 226 |
|
|
<a name="l00193"></a>00193 <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a> <= <span class="vhdllogic">8'd0</span>;
|
| 227 |
|
|
<a name="l00194"></a>00194 <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <span class="vhdllogic">5'd0</span>;
|
| 228 |
|
|
<a name="l00195"></a>00195
|
| 229 |
|
|
<a name="l00196"></a>00196 <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a> <= <span class="vhdllogic">6'd0</span>;
|
| 230 |
|
|
<a name="l00197"></a>00197 <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a> <= <span class="vhdllogic">6'd0</span>;
|
| 231 |
|
|
<a name="l00198"></a>00198 <span class="vhdlkeyword">end</span>
|
| 232 |
|
|
<a name="l00199"></a>00199 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
| 233 |
|
|
<a name="l00200"></a>00200 <a class="code" href="classcia8520.html#af360efc39c1560425a58f4344ed90e89">last_cnt_i</a> <= <a class="code" href="classcia8520.html#ac1ffbdf42f2811fb7c322367ab022bde">cnt_i</a>;
|
| 234 |
|
|
<a name="l00201"></a>00201
|
| 235 |
|
|
<a name="l00202"></a>00202 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
| 236 |
|
|
<a name="l00203"></a>00203 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
| 237 |
|
|
<a name="l00204"></a>00204
|
| 238 |
|
|
<a name="l00205"></a>00205 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a2122ea742c7126d13cc5bb9e9d4e95db">tod</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a3eb6a5baa87f3a197a5cb1a9a3699a07">tod_write_stop</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a> <= <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a> + <span class="vhdllogic">24'd1</span>;
|
| 239 |
|
|
<a name="l00206"></a>00206
|
| 240 |
|
|
<a name="l00207"></a>00207 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#af4bd9d1e2af389f8e8129c43c542345a">pc_n</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classcia8520.html#af4bd9d1e2af389f8e8129c43c542345a">pc_n</a> <= <span class="vhdllogic">1'b1</span>;
|
| 241 |
|
|
<a name="l00208"></a>00208 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd1</span> && <a class="code" href="classcia8520.html#a3e103bae86a70c174dc2f5ebf63438a4">ACK_O</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#af4bd9d1e2af389f8e8129c43c542345a">pc_n</a> <= <span class="vhdllogic">1'b0</span>;
|
| 242 |
|
|
<a name="l00209"></a>00209
|
| 243 |
|
|
<a name="l00210"></a>00210 <span class="keyword">// interrupt data</span>
|
| 244 |
|
|
<a name="l00211"></a>00211 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b1</span>; <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#afc9338335b96773f2049399a04255529">icr_data_read</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b0</span>;
|
| 245 |
|
|
<a name="l00212"></a>00212 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">underflowb</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b1</span>; <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#afc9338335b96773f2049399a04255529">icr_data_read</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>;
|
| 246 |
|
|
<a name="l00213"></a>00213 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a6a3c75ee0ddd8106ef64b3854c049c94">alarm</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">2</span>] <= <span class="vhdllogic">1'b1</span>; <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#afc9338335b96773f2049399a04255529">icr_data_read</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">2</span>] <= <span class="vhdllogic">1'b0</span>;
|
| 247 |
|
|
<a name="l00214"></a>00214 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a143b97fea35027f71aef60115f2fc961">serial_irq</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">3</span>] <= <span class="vhdllogic">1'b1</span>; <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#afc9338335b96773f2049399a04255529">icr_data_read</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">3</span>] <= <span class="vhdllogic">1'b0</span>;
|
| 248 |
|
|
<a name="l00215"></a>00215 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a8f14aac8ad64c383dda57b5cfa8d9576">flag_n</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">4</span>] <= <span class="vhdllogic">1'b1</span>; <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#afc9338335b96773f2049399a04255529">icr_data_read</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">4</span>] <= <span class="vhdllogic">1'b0</span>;
|
| 249 |
|
|
<a name="l00216"></a>00216
|
| 250 |
|
|
<a name="l00217"></a>00217 <span class="vhdlkeyword">if</span>( (<a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) ||
|
| 251 |
|
|
<a name="l00218"></a>00218 (<a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">underflowb</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) ||
|
| 252 |
|
|
<a name="l00219"></a>00219 (<a class="code" href="classcia8520.html#a6a3c75ee0ddd8106ef64b3854c049c94">alarm</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) ||
|
| 253 |
|
|
<a name="l00220"></a>00220 (<a class="code" href="classcia8520.html#a143b97fea35027f71aef60115f2fc961">serial_irq</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1'b1</span>) ||
|
| 254 |
|
|
<a name="l00221"></a>00221 (<a class="code" href="classcia8520.html#a8f14aac8ad64c383dda57b5cfa8d9576">flag_n</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1'b1</span>)
|
| 255 |
|
|
<a name="l00222"></a>00222 ) <span class="vhdlkeyword">begin</span>
|
| 256 |
|
|
<a name="l00223"></a>00223 <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">5</span>] <= <span class="vhdllogic">1'b1</span>;
|
| 257 |
|
|
<a name="l00224"></a>00224 <span class="vhdlkeyword">end</span>
|
| 258 |
|
|
<a name="l00225"></a>00225 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#afc9338335b96773f2049399a04255529">icr_data_read</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">5</span>] <= <span class="vhdllogic">1'b0</span>;
|
| 259 |
|
|
<a name="l00226"></a>00226
|
| 260 |
|
|
<a name="l00227"></a>00227
|
| 261 |
|
|
<a name="l00228"></a>00228 <span class="keyword">//******** SERIAL</span>
|
| 262 |
|
|
<a name="l00229"></a>00229 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a143b97fea35027f71aef60115f2fc961">serial_irq</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a143b97fea35027f71aef60115f2fc961">serial_irq</a> <= <span class="vhdllogic">1'b0</span>;
|
| 263 |
|
|
<a name="l00230"></a>00230
|
| 264 |
|
|
<a name="l00231"></a>00231 <span class="keyword">// serial output</span>
|
| 265 |
|
|
<a name="l00232"></a>00232 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">5</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
| 266 |
|
|
<a name="l00233"></a>00233 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> == <span class="vhdllogic">5'd0</span> && <a class="code" href="classcia8520.html#ab4f567929d2e1ae0310c2d455dabb98b">serial_latched</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
| 267 |
|
|
<a name="l00234"></a>00234 <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a> <= <a class="code" href="classcia8520.html#ac8d128e7618225ec328efa8a11fb9141">serial_latch</a>;
|
| 268 |
|
|
<a name="l00235"></a>00235 <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <span class="vhdllogic">5'd1</span>;
|
| 269 |
|
|
<a name="l00236"></a>00236 <a class="code" href="classcia8520.html#ab4f567929d2e1ae0310c2d455dabb98b">serial_latched</a> <= <span class="vhdllogic">1'b0</span>;
|
| 270 |
|
|
<a name="l00237"></a>00237 <span class="vhdlkeyword">end</span>
|
| 271 |
|
|
<a name="l00238"></a>00238 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> > <span class="vhdllogic">5'd0</span> && <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
| 272 |
|
|
<a name="l00239"></a>00239 <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> + <span class="vhdllogic">5'd1</span>;
|
| 273 |
|
|
<a name="l00240"></a>00240 <a class="code" href="classcia8520.html#a3ac9f49f562604b082a4023ec0add13d">cnt_o</a> <= <span class="vhdllogic">1'b0</span>;
|
| 274 |
|
|
<a name="l00241"></a>00241 <a class="code" href="classcia8520.html#a4f5d392cf19a60f0a9e24b019b2f9c70">sp_o</a> <= <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a>[<span class="vhdllogic">7</span>];
|
| 275 |
|
|
<a name="l00242"></a>00242 <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a> <= { <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span> };
|
| 276 |
|
|
<a name="l00243"></a>00243 <span class="vhdlkeyword">end</span>
|
| 277 |
|
|
<a name="l00244"></a>00244 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> > <span class="vhdllogic">5'd0</span> && <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
| 278 |
|
|
<a name="l00245"></a>00245 <a class="code" href="classcia8520.html#a3ac9f49f562604b082a4023ec0add13d">cnt_o</a> <= <span class="vhdllogic">1'b1</span>;
|
| 279 |
|
|
<a name="l00246"></a>00246 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> == <span class="vhdllogic">5'd16</span>) <span class="vhdlkeyword">begin</span>
|
| 280 |
|
|
<a name="l00247"></a>00247 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab4f567929d2e1ae0310c2d455dabb98b">serial_latched</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
| 281 |
|
|
<a name="l00248"></a>00248 <a class="code" href="classcia8520.html#a143b97fea35027f71aef60115f2fc961">serial_irq</a> <= <span class="vhdllogic">1'b1</span>;
|
| 282 |
|
|
<a name="l00249"></a>00249 <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <span class="vhdllogic">5'd0</span>;
|
| 283 |
|
|
<a name="l00250"></a>00250 <span class="vhdlkeyword">end</span>
|
| 284 |
|
|
<a name="l00251"></a>00251 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
| 285 |
|
|
<a name="l00252"></a>00252 <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a> <= <a class="code" href="classcia8520.html#ac8d128e7618225ec328efa8a11fb9141">serial_latch</a>;
|
| 286 |
|
|
<a name="l00253"></a>00253 <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <span class="vhdllogic">5'd1</span>;
|
| 287 |
|
|
<a name="l00254"></a>00254 <a class="code" href="classcia8520.html#ab4f567929d2e1ae0310c2d455dabb98b">serial_latched</a> <= <span class="vhdllogic">1'b0</span>;
|
| 288 |
|
|
<a name="l00255"></a>00255 <span class="vhdlkeyword">end</span>
|
| 289 |
|
|
<a name="l00256"></a>00256 <span class="vhdlkeyword">end</span>
|
| 290 |
|
|
<a name="l00257"></a>00257 <span class="vhdlkeyword">else</span> <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> + <span class="vhdllogic">5'd1</span>;
|
| 291 |
|
|
<a name="l00258"></a>00258 <span class="vhdlkeyword">end</span>
|
| 292 |
|
|
<a name="l00259"></a>00259 <span class="vhdlkeyword">end</span>
|
| 293 |
|
|
<a name="l00260"></a>00260 <span class="keyword">// serial input</span>
|
| 294 |
|
|
<a name="l00261"></a>00261 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
| 295 |
|
|
<a name="l00262"></a>00262 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#af360efc39c1560425a58f4344ed90e89">last_cnt_i</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#ac1ffbdf42f2811fb7c322367ab022bde">cnt_i</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
| 296 |
|
|
<a name="l00263"></a>00263 <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a> <= { <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>], <a class="code" href="classcia8520.html#a0d394218047f203560d75a3cd380ac3e">sp_i</a> };
|
| 297 |
|
|
<a name="l00264"></a>00264
|
| 298 |
|
|
<a name="l00265"></a>00265 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> == <span class="vhdllogic">5'd7</span>) <span class="vhdlkeyword">begin</span>
|
| 299 |
|
|
<a name="l00266"></a>00266 <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <span class="vhdllogic">5'd0</span>;
|
| 300 |
|
|
<a name="l00267"></a>00267 <a class="code" href="classcia8520.html#ac8d128e7618225ec328efa8a11fb9141">serial_latch</a> <= { <a class="code" href="classcia8520.html#ae7e916c6f97de60289bd3db08a46ecd8">serial_shift</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>], <a class="code" href="classcia8520.html#a0d394218047f203560d75a3cd380ac3e">sp_i</a> };
|
| 301 |
|
|
<a name="l00268"></a>00268 <a class="code" href="classcia8520.html#a143b97fea35027f71aef60115f2fc961">serial_irq</a> <= <span class="vhdllogic">1'b1</span>;
|
| 302 |
|
|
<a name="l00269"></a>00269 <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <span class="vhdllogic">5'd0</span>;
|
| 303 |
|
|
<a name="l00270"></a>00270 <span class="vhdlkeyword">end</span>
|
| 304 |
|
|
<a name="l00271"></a>00271 <span class="vhdlkeyword">else</span> <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> + <span class="vhdllogic">5'd1</span>;
|
| 305 |
|
|
<a name="l00272"></a>00272 <span class="vhdlkeyword">end</span>
|
| 306 |
|
|
<a name="l00273"></a>00273 <span class="vhdlkeyword">end</span>
|
| 307 |
|
|
<a name="l00274"></a>00274
|
| 308 |
|
|
<a name="l00275"></a>00275 <span class="keyword">// Timer A</span>
|
| 309 |
|
|
<a name="l00276"></a>00276 <span class="keyword">// PBON==on, OUTMODE==toggle, START==on</span>
|
| 310 |
|
|
<a name="l00277"></a>00277 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>[<span class="vhdllogic">6</span>] <= <span class="vhdllogic">1'b1</span>;
|
| 311 |
|
|
<a name="l00278"></a>00278 <span class="keyword">// PBON==on, OUTMODE==pulse</span>
|
| 312 |
|
|
<a name="l00279"></a>00279 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b0</span>) <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>[<span class="vhdllogic">6</span>] <= <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a>;
|
| 313 |
|
|
<a name="l00280"></a>00280
|
| 314 |
|
|
<a name="l00281"></a>00281 <span class="keyword">// START==on, RUNMODE==single-shot, underflowa</span>
|
| 315 |
|
|
<a name="l00282"></a>00282 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b0</span>;
|
| 316 |
|
|
<a name="l00283"></a>00283
|
| 317 |
|
|
<a name="l00284"></a>00284 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> <= <span class="vhdllogic">1'b0</span>;
|
| 318 |
|
|
<a name="l00285"></a>00285
|
| 319 |
|
|
<a name="l00286"></a>00286 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#abedeaa7155bf5185420b5dd4606982bc">timera_force_load</a> == <span class="vhdllogic">1'b1</span> || <a class="code" href="classcia8520.html#a8fa6fd5e096036071cf0899aed4da3d3">timera_loadhigh_when_stopped</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">timera</a> <= <a class="code" href="classcia8520.html#ae178dbc26a2698c23a7605f3d7dffbdb">timera_latch</a>;
|
| 320 |
|
|
<a name="l00287"></a>00287 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#af390e1e0016a3461c18b6912b7d76439">timera_tick</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">timera</a> == <span class="vhdllogic">16'd1</span>) <span class="vhdlkeyword">begin</span>
|
| 321 |
|
|
<a name="l00288"></a>00288 <a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">timera</a> <= <a class="code" href="classcia8520.html#ae178dbc26a2698c23a7605f3d7dffbdb">timera_latch</a>;
|
| 322 |
|
|
<a name="l00289"></a>00289 <a class="code" href="classcia8520.html#a4e249d8ebfbf83bef204cf254f05eb89">underflowa</a> <= <span class="vhdllogic">1'b1</span>;
|
| 323 |
|
|
<a name="l00290"></a>00290 <span class="vhdlkeyword">end</span>
|
| 324 |
|
|
<a name="l00291"></a>00291 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#af390e1e0016a3461c18b6912b7d76439">timera_tick</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">timera</a> <= <a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">timera</a> - <span class="vhdllogic">16'd1</span>;
|
| 325 |
|
|
<a name="l00292"></a>00292
|
| 326 |
|
|
<a name="l00293"></a>00293
|
| 327 |
|
|
<a name="l00294"></a>00294 <span class="keyword">// Timer B</span>
|
| 328 |
|
|
<a name="l00295"></a>00295 <span class="keyword">// PBON==on, OUTMODE==toggle, START==on</span>
|
| 329 |
|
|
<a name="l00296"></a>00296 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>[<span class="vhdllogic">7</span>] <= <span class="vhdllogic">1'b1</span>;
|
| 330 |
|
|
<a name="l00297"></a>00297 <span class="keyword">// PBON==on, OUTMODE==pulse</span>
|
| 331 |
|
|
<a name="l00298"></a>00298 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b0</span>) <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>[<span class="vhdllogic">7</span>] <= <a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">underflowb</a>;
|
| 332 |
|
|
<a name="l00299"></a>00299
|
| 333 |
|
|
<a name="l00300"></a>00300 <span class="keyword">// START==on, RUNMODE==single-shot, underflowa</span>
|
| 334 |
|
|
<a name="l00301"></a>00301 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">underflowb</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b0</span>;
|
| 335 |
|
|
<a name="l00302"></a>00302
|
| 336 |
|
|
<a name="l00303"></a>00303 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">underflowb</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">underflowb</a> <= <span class="vhdllogic">1'b0</span>;
|
| 337 |
|
|
<a name="l00304"></a>00304
|
| 338 |
|
|
<a name="l00305"></a>00305 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a1babb675cbb1c4dcb6727ff1f200f664">timerb_force_load</a> == <span class="vhdllogic">1'b1</span> || <a class="code" href="classcia8520.html#a90ac5696f1dc1b4f2efa145ec93b1abf">timerb_loadhigh_when_stopped</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">timerb</a> <= <a class="code" href="classcia8520.html#abd3fbc899b973e478cd7e3df16feb8b7">timerb_latch</a>;
|
| 339 |
|
|
<a name="l00306"></a>00306 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a1f811c521a8b8c0598ba7819910b06f0">timerb_tick</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">timerb</a> == <span class="vhdllogic">16'd1</span>) <span class="vhdlkeyword">begin</span>
|
| 340 |
|
|
<a name="l00307"></a>00307 <a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">timerb</a> <= <a class="code" href="classcia8520.html#abd3fbc899b973e478cd7e3df16feb8b7">timerb_latch</a>;
|
| 341 |
|
|
<a name="l00308"></a>00308 <a class="code" href="classcia8520.html#a08f82276ab9a14c28a3653885242a19f">underflowb</a> <= <span class="vhdllogic">1'b1</span>;
|
| 342 |
|
|
<a name="l00309"></a>00309 <span class="vhdlkeyword">end</span>
|
| 343 |
|
|
<a name="l00310"></a>00310 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a1f811c521a8b8c0598ba7819910b06f0">timerb_tick</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">timerb</a> <= <a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">timerb</a> - <span class="vhdllogic">16'd1</span>;
|
| 344 |
|
|
<a name="l00311"></a>00311
|
| 345 |
|
|
<a name="l00312"></a>00312 <span class="keyword">// Port Register A write</span>
|
| 346 |
|
|
<a name="l00313"></a>00313 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd0</span>) <a class="code" href="classcia8520.html#aea2105909da941728fed899d74afeff0">pa_o_reg</a> <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 347 |
|
|
<a name="l00314"></a>00314 <span class="keyword">// Port Register A read</span>
|
| 348 |
|
|
<a name="l00315"></a>00315 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd0</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= (<a class="code" href="classcia8520.html#a513382cca481c8a5618c4c06fc4c20c3">ddra</a> & <a class="code" href="classcia8520.html#aea2105909da941728fed899d74afeff0">pa_o_reg</a>) | (~<a class="code" href="classcia8520.html#a513382cca481c8a5618c4c06fc4c20c3">ddra</a> & <a class="code" href="classcia8520.html#aaa572548e346e473e4bd0d2a2b81e31b">pa_i</a>);
|
| 349 |
|
|
<a name="l00316"></a>00316 <span class="keyword">// Port Register B write</span>
|
| 350 |
|
|
<a name="l00317"></a>00317 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd1</span>) <span class="vhdlkeyword">begin</span>
|
| 351 |
|
|
<a name="l00318"></a>00318 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>) <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a> <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 352 |
|
|
<a name="l00319"></a>00319 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>) {<a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>[<span class="vhdllogic">7</span>],<a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>]} <= {<a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">7</span>],<a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>]};
|
| 353 |
|
|
<a name="l00320"></a>00320 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>];
|
| 354 |
|
|
<a name="l00321"></a>00321 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>];
|
| 355 |
|
|
<a name="l00322"></a>00322 <span class="vhdlkeyword">end</span>
|
| 356 |
|
|
<a name="l00323"></a>00323 <span class="keyword">// Port Register B read</span>
|
| 357 |
|
|
<a name="l00324"></a>00324 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd1</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= (<a class="code" href="classcia8520.html#a846e07d7fa9306e9167a73d8a279f1c4">ddrb</a> & <a class="code" href="classcia8520.html#a58d2d914f09a63cccd748a7ada145e4d">pb_o_reg</a>) | (~<a class="code" href="classcia8520.html#a846e07d7fa9306e9167a73d8a279f1c4">ddrb</a> & <a class="code" href="classcia8520.html#a24bf9b866e68ca32fc5594e5b7ea37dd">pb_i</a>);
|
| 358 |
|
|
<a name="l00325"></a>00325 <span class="keyword">// Data Direction Register A write</span>
|
| 359 |
|
|
<a name="l00326"></a>00326 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd2</span>) <a class="code" href="classcia8520.html#a513382cca481c8a5618c4c06fc4c20c3">ddra</a> <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 360 |
|
|
<a name="l00327"></a>00327 <span class="keyword">// Data Direction Register A read</span>
|
| 361 |
|
|
<a name="l00328"></a>00328 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd2</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#a513382cca481c8a5618c4c06fc4c20c3">ddra</a>;
|
| 362 |
|
|
<a name="l00329"></a>00329 <span class="keyword">// Data Direction Register B write</span>
|
| 363 |
|
|
<a name="l00330"></a>00330 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd3</span>) <a class="code" href="classcia8520.html#a846e07d7fa9306e9167a73d8a279f1c4">ddrb</a> <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 364 |
|
|
<a name="l00331"></a>00331 <span class="keyword">// Data Direction Register B read</span>
|
| 365 |
|
|
<a name="l00332"></a>00332 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd3</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#a846e07d7fa9306e9167a73d8a279f1c4">ddrb</a>;
|
| 366 |
|
|
<a name="l00333"></a>00333
|
| 367 |
|
|
<a name="l00334"></a>00334 <span class="keyword">// Timer A Low byte write</span>
|
| 368 |
|
|
<a name="l00335"></a>00335 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd4</span>) <a class="code" href="classcia8520.html#ae178dbc26a2698c23a7605f3d7dffbdb">timera_latch</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 369 |
|
|
<a name="l00336"></a>00336 <span class="keyword">// Timer A Low byte read</span>
|
| 370 |
|
|
<a name="l00337"></a>00337 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd4</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">timera</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
|
| 371 |
|
|
<a name="l00338"></a>00338 <span class="keyword">// Timer A High byte write</span>
|
| 372 |
|
|
<a name="l00339"></a>00339 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd5</span>) <span class="vhdlkeyword">begin</span>
|
| 373 |
|
|
<a name="l00340"></a>00340 <a class="code" href="classcia8520.html#ae178dbc26a2698c23a7605f3d7dffbdb">timera_latch</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 374 |
|
|
<a name="l00341"></a>00341 <span class="keyword">// START==off, RUNMODE==single-shot</span>
|
| 375 |
|
|
<a name="l00342"></a>00342 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b1</span>;
|
| 376 |
|
|
<a name="l00343"></a>00343 <span class="vhdlkeyword">end</span>
|
| 377 |
|
|
<a name="l00344"></a>00344 <span class="keyword">// Timer A High byte read</span>
|
| 378 |
|
|
<a name="l00345"></a>00345 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd5</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#ada8973a933711aef9cf4f7fee672fe29">timera</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
|
| 379 |
|
|
<a name="l00346"></a>00346
|
| 380 |
|
|
<a name="l00347"></a>00347 <span class="keyword">// Timer B Low byte write</span>
|
| 381 |
|
|
<a name="l00348"></a>00348 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd6</span>) <a class="code" href="classcia8520.html#abd3fbc899b973e478cd7e3df16feb8b7">timerb_latch</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 382 |
|
|
<a name="l00349"></a>00349 <span class="keyword">// Timer B Low byte read</span>
|
| 383 |
|
|
<a name="l00350"></a>00350 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd6</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">timerb</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
|
| 384 |
|
|
<a name="l00351"></a>00351 <span class="keyword">// Timer B High byte write</span>
|
| 385 |
|
|
<a name="l00352"></a>00352 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd7</span>) <span class="vhdlkeyword">begin</span>
|
| 386 |
|
|
<a name="l00353"></a>00353 <a class="code" href="classcia8520.html#abd3fbc899b973e478cd7e3df16feb8b7">timerb_latch</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 387 |
|
|
<a name="l00354"></a>00354 <span class="keyword">// START==off, RUNMODE==single-shot</span>
|
| 388 |
|
|
<a name="l00355"></a>00355 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b1</span>;
|
| 389 |
|
|
<a name="l00356"></a>00356 <span class="vhdlkeyword">end</span>
|
| 390 |
|
|
<a name="l00357"></a>00357 <span class="keyword">// Timer B High byte read</span>
|
| 391 |
|
|
<a name="l00358"></a>00358 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd7</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#ad48421b9e581a71d16c98108b08f6342">timerb</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
|
| 392 |
|
|
<a name="l00359"></a>00359
|
| 393 |
|
|
<a name="l00360"></a>00360 <span class="keyword">// TOD/ALARM low byte write</span>
|
| 394 |
|
|
<a name="l00361"></a>00361 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd8</span>) <span class="vhdlkeyword">begin</span>
|
| 395 |
|
|
<a name="l00362"></a>00362 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
| 396 |
|
|
<a name="l00363"></a>00363 <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 397 |
|
|
<a name="l00364"></a>00364 <a class="code" href="classcia8520.html#a3eb6a5baa87f3a197a5cb1a9a3699a07">tod_write_stop</a> <= <span class="vhdllogic">1'b0</span>;
|
| 398 |
|
|
<a name="l00365"></a>00365 <span class="vhdlkeyword">end</span>
|
| 399 |
|
|
<a name="l00366"></a>00366 <span class="vhdlkeyword">else</span> <a class="code" href="classcia8520.html#adcd479acfe899597982f270df4ad81b5">tod_alarm</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 400 |
|
|
<a name="l00367"></a>00367 <span class="vhdlkeyword">end</span>
|
| 401 |
|
|
<a name="l00368"></a>00368 <span class="keyword">// TOD low byte read</span>
|
| 402 |
|
|
<a name="l00369"></a>00369 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd8</span>) <span class="vhdlkeyword">begin</span>
|
| 403 |
|
|
<a name="l00370"></a>00370 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a018c4773d815ddc972652c4da9601f50">tod_read_latch</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
|
| 404 |
|
|
<a name="l00371"></a>00371 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
| 405 |
|
|
<a name="l00372"></a>00372 <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#ab6c6b9ff872e5af9ecf775df56d03f83">tod_latch</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
|
| 406 |
|
|
<a name="l00373"></a>00373 <a class="code" href="classcia8520.html#a018c4773d815ddc972652c4da9601f50">tod_read_latch</a> <= <span class="vhdllogic">1'b0</span>;
|
| 407 |
|
|
<a name="l00374"></a>00374 <span class="vhdlkeyword">end</span>
|
| 408 |
|
|
<a name="l00375"></a>00375 <span class="vhdlkeyword">end</span>
|
| 409 |
|
|
<a name="l00376"></a>00376 <span class="keyword">// TOD/ALARM mid byte write</span>
|
| 410 |
|
|
<a name="l00377"></a>00377 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd9</span>) <span class="vhdlkeyword">begin</span>
|
| 411 |
|
|
<a name="l00378"></a>00378 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
| 412 |
|
|
<a name="l00379"></a>00379 <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 413 |
|
|
<a name="l00380"></a>00380 <span class="vhdlkeyword">end</span>
|
| 414 |
|
|
<a name="l00381"></a>00381 <span class="vhdlkeyword">else</span> <a class="code" href="classcia8520.html#adcd479acfe899597982f270df4ad81b5">tod_alarm</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 415 |
|
|
<a name="l00382"></a>00382 <span class="vhdlkeyword">end</span>
|
| 416 |
|
|
<a name="l00383"></a>00383 <span class="keyword">// TOD mid byte read</span>
|
| 417 |
|
|
<a name="l00384"></a>00384 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd9</span>) <span class="vhdlkeyword">begin</span>
|
| 418 |
|
|
<a name="l00385"></a>00385 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a018c4773d815ddc972652c4da9601f50">tod_read_latch</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
|
| 419 |
|
|
<a name="l00386"></a>00386 <span class="vhdlkeyword">else</span> <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#ab6c6b9ff872e5af9ecf775df56d03f83">tod_latch</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
|
| 420 |
|
|
<a name="l00387"></a>00387 <span class="vhdlkeyword">end</span>
|
| 421 |
|
|
<a name="l00388"></a>00388 <span class="keyword">// TOD/ALARM high byte write</span>
|
| 422 |
|
|
<a name="l00389"></a>00389 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd10</span>) <span class="vhdlkeyword">begin</span>
|
| 423 |
|
|
<a name="l00390"></a>00390 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
| 424 |
|
|
<a name="l00391"></a>00391 <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 425 |
|
|
<a name="l00392"></a>00392 <a class="code" href="classcia8520.html#a3eb6a5baa87f3a197a5cb1a9a3699a07">tod_write_stop</a> <= <span class="vhdllogic">1'b1</span>;
|
| 426 |
|
|
<a name="l00393"></a>00393 <span class="vhdlkeyword">end</span>
|
| 427 |
|
|
<a name="l00394"></a>00394 <span class="vhdlkeyword">else</span> <a class="code" href="classcia8520.html#adcd479acfe899597982f270df4ad81b5">tod_alarm</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 428 |
|
|
<a name="l00395"></a>00395 <span class="vhdlkeyword">end</span>
|
| 429 |
|
|
<a name="l00396"></a>00396 <span class="keyword">// TOD high byte read</span>
|
| 430 |
|
|
<a name="l00397"></a>00397 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd10</span>) <span class="vhdlkeyword">begin</span>
|
| 431 |
|
|
<a name="l00398"></a>00398 <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>];
|
| 432 |
|
|
<a name="l00399"></a>00399 <a class="code" href="classcia8520.html#ab6c6b9ff872e5af9ecf775df56d03f83">tod_latch</a> <= <a class="code" href="classcia8520.html#a944c8e8722357c8ee997aa3ca4f3b510">tod_counter</a>;
|
| 433 |
|
|
<a name="l00400"></a>00400 <a class="code" href="classcia8520.html#a018c4773d815ddc972652c4da9601f50">tod_read_latch</a> <= <span class="vhdllogic">1'b1</span>;
|
| 434 |
|
|
<a name="l00401"></a>00401 <span class="vhdlkeyword">end</span>
|
| 435 |
|
|
<a name="l00402"></a>00402 <span class="keyword">// empty register write</span>
|
| 436 |
|
|
<a name="l00403"></a>00403 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd11</span>) <span class="vhdlkeyword">begin</span>
|
| 437 |
|
|
<a name="l00404"></a>00404 <span class="vhdlkeyword">end</span>
|
| 438 |
|
|
<a name="l00405"></a>00405 <span class="keyword">// empty register read</span>
|
| 439 |
|
|
<a name="l00406"></a>00406 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd11</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <span class="vhdllogic">8'd0</span>;
|
| 440 |
|
|
<a name="l00407"></a>00407 <span class="keyword">// Serial Data Register write</span>
|
| 441 |
|
|
<a name="l00408"></a>00408 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd12</span>) <span class="vhdlkeyword">begin</span>
|
| 442 |
|
|
<a name="l00409"></a>00409 <a class="code" href="classcia8520.html#ac8d128e7618225ec328efa8a11fb9141">serial_latch</a> <= <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>;
|
| 443 |
|
|
<a name="l00410"></a>00410 <a class="code" href="classcia8520.html#ab4f567929d2e1ae0310c2d455dabb98b">serial_latched</a> <= <span class="vhdllogic">1'b1</span>;
|
| 444 |
|
|
<a name="l00411"></a>00411 <span class="vhdlkeyword">end</span>
|
| 445 |
|
|
<a name="l00412"></a>00412 <span class="keyword">// Serial Data Register read</span>
|
| 446 |
|
|
<a name="l00413"></a>00413 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd12</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= <a class="code" href="classcia8520.html#ac8d128e7618225ec328efa8a11fb9141">serial_latch</a>;
|
| 447 |
|
|
<a name="l00414"></a>00414 <span class="keyword">// Interrupt Control Register write</span>
|
| 448 |
|
|
<a name="l00415"></a>00415 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd13</span>) <span class="vhdlkeyword">begin</span>
|
| 449 |
|
|
<a name="l00416"></a>00416 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a> <= <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a> | <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>];
|
| 450 |
|
|
<a name="l00417"></a>00417 <span class="vhdlkeyword">else</span> <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a> <= <a class="code" href="classcia8520.html#a65d1b3454257645e76ed32867816a973">icr_mask</a> & (~<a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>]);
|
| 451 |
|
|
<a name="l00418"></a>00418 <span class="vhdlkeyword">end</span>
|
| 452 |
|
|
<a name="l00419"></a>00419 <span class="keyword">// Interrupt Control Register read</span>
|
| 453 |
|
|
<a name="l00420"></a>00420 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd13</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= { <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">5</span>], <span class="vhdllogic">2'b0</span>, <a class="code" href="classcia8520.html#a46657a6abfe37aaf512235a2bba74b2c">icr_data</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
|
| 454 |
|
|
<a name="l00421"></a>00421
|
| 455 |
|
|
<a name="l00422"></a>00422 <span class="keyword">// Control Register A write</span>
|
| 456 |
|
|
<a name="l00423"></a>00423 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd14</span>) <span class="vhdlkeyword">begin</span>
|
| 457 |
|
|
<a name="l00424"></a>00424 <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a> <= { <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">5</span>], <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] };
|
| 458 |
|
|
<a name="l00425"></a>00425
|
| 459 |
|
|
<a name="l00426"></a>00426 <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">5</span>] != <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">6</span>]) <span class="vhdlkeyword">begin</span>
|
| 460 |
|
|
<a name="l00427"></a>00427 <a class="code" href="classcia8520.html#ab4f567929d2e1ae0310c2d455dabb98b">serial_latched</a> <= <span class="vhdllogic">1'b0</span>;
|
| 461 |
|
|
<a name="l00428"></a>00428 <a class="code" href="classcia8520.html#ae49a41d301a085fc0ab1711e7c53f9e4">serial_counter</a> <= <span class="vhdllogic">5'd0</span>;
|
| 462 |
|
|
<a name="l00429"></a>00429
|
| 463 |
|
|
<a name="l00430"></a>00430 <a class="code" href="classcia8520.html#a3ac9f49f562604b082a4023ec0add13d">cnt_o</a> <= <span class="vhdllogic">1'b1</span>;
|
| 464 |
|
|
<a name="l00431"></a>00431 <a class="code" href="classcia8520.html#a4f5d392cf19a60f0a9e24b019b2f9c70">sp_o</a> <= (<a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b0</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
|
| 465 |
|
|
<a name="l00432"></a>00432 <span class="vhdlkeyword">end</span>
|
| 466 |
|
|
<a name="l00433"></a>00433 <span class="vhdlkeyword">end</span>
|
| 467 |
|
|
<a name="l00434"></a>00434 <span class="keyword">// Control Register A read</span>
|
| 468 |
|
|
<a name="l00435"></a>00435 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd14</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= { <span class="vhdllogic">1'b0</span>, <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">4</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classcia8520.html#a29b61e4de0b5173e5cb981ddafb53520">cra</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] };
|
| 469 |
|
|
<a name="l00436"></a>00436 <span class="keyword">// Control Register B write</span>
|
| 470 |
|
|
<a name="l00437"></a>00437 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd15</span>) <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a> <= { <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">5</span>], <a class="code" href="classcia8520.html#a498e0a7d3556697f2e64c422e002ec63">DAT_I</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] };
|
| 471 |
|
|
<a name="l00438"></a>00438 <span class="keyword">// Control Register B read</span>
|
| 472 |
|
|
<a name="l00439"></a>00439 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classcia8520.html#ab8eb2ffa770fd5ef1b8e5b3fee0c14c8">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a487a6c21786fdd7c088fd03f26243089">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classcia8520.html#a5df15d7312a6e8708bfa7fb9a05869b5">WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classcia8520.html#a800b1014ad22379fa8361f2ed46cd1c4">ADR_I</a> == <span class="vhdllogic">4'd15</span>) <a class="code" href="classcia8520.html#abf757a9279afcc5b87520ac1d753ea20">DAT_O</a> <= { <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">4</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classcia8520.html#a9610c862cf661f47439da35752ec16b2">crb</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] };
|
| 473 |
|
|
<a name="l00440"></a>00440 <span class="vhdlkeyword">end</span>
|
| 474 |
|
|
<a name="l00441"></a>00441 <span class="vhdlkeyword">end</span>
|
| 475 |
|
|
<a name="l00442"></a>00442
|
| 476 |
|
|
<a name="l00443"></a>00443 <span class="vhdlkeyword">endmodule</span>
|
| 477 |
|
|
<a name="l00444"></a>00444
|
| 478 |
|
|
</pre></div></div>
|
| 479 |
|
|
</div>
|
| 480 |
|
|
<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:18 for aoOCS by 
|
| 481 |
|
|
<a href="http://www.doxygen.org/index.html">
|
| 482 |
|
|
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
|
| 483 |
|
|
</body>
|
| 484 |
|
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</html>
|
