OpenCores
URL https://opencores.org/ocsvn/aoocs/aoocs/trunk

Subversion Repositories aoocs

[/] [aoocs/] [trunk/] [doc/] [doxygen/] [html/] [classdrv__vga-members.html] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 alfik 
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
2 
<html xmlns="http://www.w3.org/1999/xhtml">
3 
<head>
4 
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
5 
<title>aoOCS: Member List</title>
6 
<link href="tabs.css" rel="stylesheet" type="text/css"/>
7 
<link href="doxygen.css" rel="stylesheet" type="text/css"/>
8 
</head>
9 
<body>
10 
<!-- Generated by Doxygen 1.7.2 -->
11 
<div class="navigation" id="top">
12 
  <div class="tabs">
13 
    <ul class="tablist">
14 
      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
15 
      <li class="current"><a href="annotated.html"><span>Design&#160;Unit&#160;List</span></a></li>
16 
      <li><a href="files.html"><span>Files</span></a></li>
17 
    </ul>
18 
  </div>
19 
  <div class="tabs2">
20 
    <ul class="tablist">
21 
      <li><a href="annotated.html"><span>Class&#160;List</span></a></li>
22 
      <li><a href="hierarchy.html"><span>Design&#160;Unit&#160;Hierarchy</span></a></li>
23 
      <li><a href="functions.html"><span>Design&#160;Unit&#160;Members</span></a></li>
24 
    </ul>
25 
  </div>
26 
</div>
27 
<div class="header">
28 
  <div class="headertitle">
29 
<h1>drv_vga Member List</h1>  </div>
30 
</div>
31 
<div class="contents">
32 
This is the complete list of members for <a class="el" href="classdrv__vga.html">drv_vga</a>, including all inherited members.<table>
33 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Input]</code></td></tr>
34 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Input]</code></td></tr>
35 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a7c72d1d36e519c384a173325a101c738">management_mode</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Input]</code></td></tr>
36 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#ab7f595d93fa3723c61f056ad13e4b95b">on_screen_display</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Input]</code></td></tr>
37 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a10a45704e7923788c0d10c21c623ac4f">osd_line</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
38 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#aa1cc640088b50fda8dd9a874d1abd909">osd_column</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
39 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a38feb3e41812bbabd4d64c418a6fb622">character</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Input]</code></td></tr>
40 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#ad3b09207753c04efb6a28109361c0848">display_valid</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
41 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#aba05385922a89053d0ea07a6543978c1">burst_read_request</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
42 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#aa909360705ddfb7c3bddc854ddf5245b">burst_read_address</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
43 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a6885e8a9dddd0d46eb48885c1d14104d">burst_read_ready</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Input]</code></td></tr>
44 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#aeccacb0a76a1694e3db88b8757f934d5">burst_read_data</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Input]</code></td></tr>
45 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#ae093cf39ab1b80814194c6eb1ab39c2f">vga_r</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
46 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#af4d7be7b44d78e0185b57899db4649d2">vga_g</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
47 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#acd92e53e6d10225e6d4aa1cc962be209">vga_b</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
48 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#af868e9c418e06b2ff0357f2e846226b3">vga_blank_n</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
49 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a463ddc5575768d453d2231f3dcf26738">vga_sync_n</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
50 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#aa7471e76f774550772ce1b69d44638d1">vga_clock</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
51 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#abb6a6625a5d411c83df0b1d3afa35a7a">vga_hsync</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
52 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a362ab6edf9ff37ff6f51f8c7c42a0ebf">vga_vsync</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Output]</code></td></tr>
53 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a5a908124ef208bf84998f7cde2c452d8">address_a</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
54 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#abada63beb55063be05d88df41af318fa">address_b</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
55 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a30f9820bf1b8cc08e21fa0d7f3a18c6c">q_b</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
56 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a22c0ae2f921e75fcc914231b378a9808">burst_read_prepare</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
57 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#ac648eff1ad8ac1f5e3e7694d7c29fdba">next_line</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
58 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#aa3178dec4eafb3c597849b728bacd928">next_counter</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
59 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a6a5fd8de78bc8bb1bd1431cd860abdf1">three_counter</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
60 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a549d46b8e788387828d20c8079bd43b9">red</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
61 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#ad523316de7108ba00362b2a092bd0d10">green</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
62 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a6eb02b3146858fd49f014815679eaa8d">blue</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
63 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a0bee1fc166ab279e572fe1fe707e3b67">line_counter_for_osd</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
64 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a4290316a2168f5ff072defe602b7287f">column_counter_for_osd</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
65 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#af55ae5aff822796b9173fcaf7c6b19ea">char_saved</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
66 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a0ec503813e34949f7668a98f504761a0">font_line</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
67 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#ae5d246022a400014c7a17bbcd0398db6">font_column</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
68 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a8f0863b6b9622cfa812f1d53ea373b2b">font</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
69 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a6b8ee2d70db3b00e0bd08671cd13b52d">font_pixel</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
70 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a1b5b5b35ae3fdd5eb40af9286ad6dc44">osd_active</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
71 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a69690878d398577f9f7e595378cda729">h_counter</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
72 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a41db336402ed59e650d7287f89e93120">v_counter</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
73 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a9f12b95e1eefddec5a5cffcfb74dedc5">line_counter</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
74 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#aa7e8f2c6185b5ee9f8a11def2f04e192">column_counter</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Signal]</code></td></tr>
75 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a34fbd3b7c69bd1aac8f11bfd9871d808">altsyncram</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Module Instance]</code></td></tr>
76 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a73ed539019cb91cac1dba5720b142a01">altsyncram</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Module Instance]</code></td></tr>
77 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a6b8dbc4a4fa4c34875a910e793a34e51">ALWAYS_78</a>clk_30, reset_n</td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Always Construct]</code></td></tr>
78 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#af98d92d9fb604c7a3090d1dfebb4325b">ALWAYS_79</a>clk_30, reset_n</td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Always Construct]</code></td></tr>
79 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#a0cd5229f9236bafdc60cd75f2836d688">ALWAYS_80</a>clk_30, reset_n</td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Always Construct]</code></td></tr>
80 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#af0c7c40cb7c77b8c759687d6362a7e17">ALWAYS_81</a>clk_30, reset_n</td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Always Construct]</code></td></tr>
81 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#ae70561ced7c536531311b8865aa9ca5f">VGA_VIDEO_BUFFER</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Define]</code></td></tr>
82 
  <tr class="memlist"><td><a class="el" href="classdrv__vga.html#aba4ec979e464a3b40494f4d6aef18710">VGA_VIDEO_BUFFER_DIV_4</a></td><td><a class="el" href="classdrv__vga.html">drv_vga</a></td><td><code> [Define]</code></td></tr>
83 
</table></div>
84 
<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:20 for aoOCS by&#160;
85 
<a href="http://www.doxygen.org/index.html">
86 
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
87 
</body>
88 
</html>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.