OpenCores
URL https://opencores.org/ocsvn/aoocs/aoocs/trunk

Subversion Repositories aoocs

[/] [aoocs/] [trunk/] [doc/] [doxygen/] [html/] [classmemory__registers.html] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 alfik 
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
2 
<html xmlns="http://www.w3.org/1999/xhtml">
3 
<head>
4 
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
5 
<title>aoOCS: memory_registers Module Reference</title>
6 
<link href="tabs.css" rel="stylesheet" type="text/css"/>
7 
<link href="doxygen.css" rel="stylesheet" type="text/css"/>
8 
</head>
9 
<body>
10 
<!-- Generated by Doxygen 1.7.2 -->
11 
<div class="navigation" id="top">
12 
  <div class="tabs">
13 
    <ul class="tablist">
14 
      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
15 
      <li class="current"><a href="annotated.html"><span>Design&#160;Unit&#160;List</span></a></li>
16 
      <li><a href="files.html"><span>Files</span></a></li>
17 
    </ul>
18 
  </div>
19 
  <div class="tabs2">
20 
    <ul class="tablist">
21 
      <li><a href="annotated.html"><span>Class&#160;List</span></a></li>
22 
      <li><a href="hierarchy.html"><span>Design&#160;Unit&#160;Hierarchy</span></a></li>
23 
      <li><a href="functions.html"><span>Design&#160;Unit&#160;Members</span></a></li>
24 
    </ul>
25 
  </div>
26 
</div>
27 
<div class="header">
28 
  <div class="summary">
29 
<a href="#Inputs">Inputs</a> &#124;
30 
<a href="#Outputs">Outputs</a> &#124;
31 
<a href="#Signals">Signals</a> &#124;
32 
<a href="#Module Instances">Module Instances</a> &#124;
33 
<a href="#Always Constructs">Always Constructs</a>  </div>
34 
  <div class="headertitle">
35 
<h1>memory_registers Module Reference</h1>  </div>
36 
</div>
37 
<div class="contents">
38 
<!-- doxytag: class="memory_registers" -->
39 
<p>Contains the microcode ROM and D0-D7, A0-A7 registers.
40 
<a href="#_details">More...</a></p>
41 
<!-- startSectionHeader --><div class="dynheader">
42 
Inheritance diagram for memory_registers:<!-- endSectionHeader --></div>
43 
<!-- startSectionSummary --><!-- endSectionSummary --><!-- startSectionContent --><div class="dyncontent">
44 
 <div class="center">
45 
  <img src="classmemory__registers.png" usemap="#memory_registers_map" alt=""/>
46 
  <map id="memory_registers_map" name="memory_registers_map">
47 
<area href="classao68000.html" alt="ao68000" shape="rect" coords="0,56,112,80"/>
48 
<area href="classaoOCS.html" alt="aoOCS" shape="rect" coords="0,112,112,136"/>
49 
</map>
50 
 </div><!-- endSectionContent --></div>
51 
 
52 
<p><a href="classmemory__registers-members.html">List of all members.</a></p>
53 
<table class="memberdecls">
54 
<tr><td colspan="2"><h2><a name="Always Constructs"></a>
55 
Always Constructs</h2></td></tr>
56 
 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a09281e3224878c570c81844785844fe0">ALWAYS_29</a>&#160;</td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classmemory__registers.html#a30d6f9a116a35132d3ae1ac844480c7f">clock</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classmemory__registers.html#a0070367d69af978092b5cd0b60dec77b">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
57 
<tr><td colspan="2"><h2><a name="Inputs"></a>
58 
Inputs</h2></td></tr>
59 
 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a30d6f9a116a35132d3ae1ac844480c7f">clock</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
60 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a0070367d69af978092b5cd0b60dec77b">reset_n</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
61 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#af3fdc1a826e2d4992fc50550160eed52">An_address</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
62 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a05d2b0cd0706cfcb62674e59ed049b22">An_input</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
63 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#abfa12b67b2dfb6da21584304919f0a15">An_write_enable</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
64 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a55db549a365e2da7b32c589888f22c1f">Dn_address</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
65 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a70e26deed20065da35879d3ce4a7f06e">Dn_input</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
66 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a515d2e4fc82f04802e46d5eae5d0f0f5">Dn_write_enable</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
67 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a7e475d550020f2ef86841dd171ddf94e">Dn_size</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
68 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a242c22630fbc44df8a129350db77b3d0">micro_pc</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
69 
<tr><td colspan="2"><h2><a name="Outputs"></a>
70 
Outputs</h2></td></tr>
71 
 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#afe969a18dcdd487deeedc9f9146ef8c9">An_output</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
72 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a3380b9a07ee51a05b97308d5a7257972">usp</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
73 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a224aca31f9e8189294f9072ee0fc015a">Dn_output</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
74 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a9f8c0a5b5adedad8f2f3f503cb5510f6">micro_data</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">87</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
75 
<tr><td colspan="2"><h2><a name="Module Instances"></a>
76 
Module Instances</h2></td></tr>
77 
 <tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram::an_ram_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>
78 
<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classmemory__registers.html#a5b0f1fb5a259a06899ac6ac3b52835e0">altsyncram::dn_ram_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>
79 
<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classmemory__registers.html#afc54073a43b749eb1f1376c4b31cd1e3">altsyncram::micro_rom_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>
80 
<tr><td colspan="2"><h2><a name="Signals"></a>
81 
Signals</h2></td></tr>
82 
 <tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classmemory__registers.html#acfe7cd131da7ea586dcb50bea9457678">An_ram_write_enable</a> </td></tr>
83 
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classmemory__registers.html#a162864c7253e9c74e47b2822eacde9d4">An_ram_output</a> </td></tr>
84 
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classmemory__registers.html#a3ab032d1bc007200d49892a2ab390732">dn_byteena</a> </td></tr>
85 
</table>
86 
<hr/><a name="_details"></a><h2>Detailed Description</h2>
87 
<p>Contains the microcode ROM and D0-D7, A0-A7 registers. </p>
88 
<p>The <a class="el" href="classmemory__registers.html" title="Contains the microcode ROM and D0-D7, A0-A7 registers.">memory_registers</a> module contains:</p>
89 
<ul>
90 
<li>data and address registers (D0-D7, A0-A7) implemented as an on-chip RAM.</li>
91 
<li>the microcode implemented as an on-chip ROM.</li>
92 
</ul>
93 
<p>Currently this module contains <em>altsyncram</em> instantiations from Altera Megafunction/LPM library. </p>
94 
 
95 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02043">2043</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
96 
<hr/><h2>Member Function Documentation</h2>
97 
<a class="anchor" id="a09281e3224878c570c81844785844fe0"></a><!-- doxytag: member="memory_registers::ALWAYS_29" ref="a09281e3224878c570c81844785844fe0" args="clock, reset_n" -->
98 
<div class="memitem">
99 
<div class="memproto">
100 
      <table class="memname">
101 
        <tr>
102 
          <td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_29          <td></td>
103 
          <td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classmemory__registers.html#a30d6f9a116a35132d3ae1ac844480c7f">clock</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> , </td>
104 
        </tr>
105 
        <tr>
106 
          <td class="paramkey"></td>
107 
          <td></td>
108 
          <td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classmemory__registers.html#a0070367d69af978092b5cd0b60dec77b">reset_n</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> ) </td>
109 
        </tr>
110 
<code> [Always Construct]</code></td>
111 
        </tr>
112 
      </table>
113 
</div>
114 
<div class="memdoc">
115 
 
116 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02076">2076</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
117 
 
118 
</div>
119 
</div>
120 
<hr/><h2>Member Data Documentation</h2>
121 
<a class="anchor" id="a30d6f9a116a35132d3ae1ac844480c7f"></a><!-- doxytag: member="memory_registers::clock" ref="a30d6f9a116a35132d3ae1ac844480c7f" args="" -->
122 
<div class="memitem">
123 
<div class="memproto">
124 
      <table class="memname">
125 
        <tr>
126 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a30d6f9a116a35132d3ae1ac844480c7f">clock</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
127 
        </tr>
128 
      </table>
129 
</div>
130 
<div class="memdoc">
131 
 
132 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02044">2044</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
133 
 
134 
</div>
135 
</div>
136 
<a class="anchor" id="a0070367d69af978092b5cd0b60dec77b"></a><!-- doxytag: member="memory_registers::reset_n" ref="a0070367d69af978092b5cd0b60dec77b" args="" -->
137 
<div class="memitem">
138 
<div class="memproto">
139 
      <table class="memname">
140 
        <tr>
141 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a0070367d69af978092b5cd0b60dec77b">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
142 
        </tr>
143 
      </table>
144 
</div>
145 
<div class="memdoc">
146 
 
147 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02045">2045</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
148 
 
149 
</div>
150 
</div>
151 
<a class="anchor" id="af3fdc1a826e2d4992fc50550160eed52"></a><!-- doxytag: member="memory_registers::An_address" ref="af3fdc1a826e2d4992fc50550160eed52" args="" -->
152 
<div class="memitem">
153 
<div class="memproto">
154 
      <table class="memname">
155 
        <tr>
156 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#af3fdc1a826e2d4992fc50550160eed52">An_address</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
157 
        </tr>
158 
      </table>
159 
</div>
160 
<div class="memdoc">
161 
 
162 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02048">2048</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
163 
 
164 
</div>
165 
</div>
166 
<a class="anchor" id="a05d2b0cd0706cfcb62674e59ed049b22"></a><!-- doxytag: member="memory_registers::An_input" ref="a05d2b0cd0706cfcb62674e59ed049b22" args="" -->
167 
<div class="memitem">
168 
<div class="memproto">
169 
      <table class="memname">
170 
        <tr>
171 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a05d2b0cd0706cfcb62674e59ed049b22">An_input</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
172 
        </tr>
173 
      </table>
174 
</div>
175 
<div class="memdoc">
176 
 
177 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02049">2049</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
178 
 
179 
</div>
180 
</div>
181 
<a class="anchor" id="abfa12b67b2dfb6da21584304919f0a15"></a><!-- doxytag: member="memory_registers::An_write_enable" ref="abfa12b67b2dfb6da21584304919f0a15" args="" -->
182 
<div class="memitem">
183 
<div class="memproto">
184 
      <table class="memname">
185 
        <tr>
186 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#abfa12b67b2dfb6da21584304919f0a15">An_write_enable</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
187 
        </tr>
188 
      </table>
189 
</div>
190 
<div class="memdoc">
191 
 
192 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02050">2050</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
193 
 
194 
</div>
195 
</div>
196 
<a class="anchor" id="afe969a18dcdd487deeedc9f9146ef8c9"></a><!-- doxytag: member="memory_registers::An_output" ref="afe969a18dcdd487deeedc9f9146ef8c9" args="" -->
197 
<div class="memitem">
198 
<div class="memproto">
199 
      <table class="memname">
200 
        <tr>
201 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#afe969a18dcdd487deeedc9f9146ef8c9">An_output</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
202 
        </tr>
203 
      </table>
204 
</div>
205 
<div class="memdoc">
206 
 
207 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02051">2051</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
208 
 
209 
</div>
210 
</div>
211 
<a class="anchor" id="a3380b9a07ee51a05b97308d5a7257972"></a><!-- doxytag: member="memory_registers::usp" ref="a3380b9a07ee51a05b97308d5a7257972" args="" -->
212 
<div class="memitem">
213 
<div class="memproto">
214 
      <table class="memname">
215 
        <tr>
216 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a3380b9a07ee51a05b97308d5a7257972">usp</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
217 
        </tr>
218 
      </table>
219 
</div>
220 
<div class="memdoc">
221 
 
222 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02053">2053</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
223 
 
224 
</div>
225 
</div>
226 
<a class="anchor" id="a55db549a365e2da7b32c589888f22c1f"></a><!-- doxytag: member="memory_registers::Dn_address" ref="a55db549a365e2da7b32c589888f22c1f" args="" -->
227 
<div class="memitem">
228 
<div class="memproto">
229 
      <table class="memname">
230 
        <tr>
231 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a55db549a365e2da7b32c589888f22c1f">Dn_address</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
232 
        </tr>
233 
      </table>
234 
</div>
235 
<div class="memdoc">
236 
 
237 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02055">2055</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
238 
 
239 
</div>
240 
</div>
241 
<a class="anchor" id="a70e26deed20065da35879d3ce4a7f06e"></a><!-- doxytag: member="memory_registers::Dn_input" ref="a70e26deed20065da35879d3ce4a7f06e" args="" -->
242 
<div class="memitem">
243 
<div class="memproto">
244 
      <table class="memname">
245 
        <tr>
246 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a70e26deed20065da35879d3ce4a7f06e">Dn_input</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
247 
        </tr>
248 
      </table>
249 
</div>
250 
<div class="memdoc">
251 
 
252 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02056">2056</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
253 
 
254 
</div>
255 
</div>
256 
<a class="anchor" id="a515d2e4fc82f04802e46d5eae5d0f0f5"></a><!-- doxytag: member="memory_registers::Dn_write_enable" ref="a515d2e4fc82f04802e46d5eae5d0f0f5" args="" -->
257 
<div class="memitem">
258 
<div class="memproto">
259 
      <table class="memname">
260 
        <tr>
261 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a515d2e4fc82f04802e46d5eae5d0f0f5">Dn_write_enable</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
262 
        </tr>
263 
      </table>
264 
</div>
265 
<div class="memdoc">
266 
 
267 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02057">2057</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
268 
 
269 
</div>
270 
</div>
271 
<a class="anchor" id="a7e475d550020f2ef86841dd171ddf94e"></a><!-- doxytag: member="memory_registers::Dn_size" ref="a7e475d550020f2ef86841dd171ddf94e" args="" -->
272 
<div class="memitem">
273 
<div class="memproto">
274 
      <table class="memname">
275 
        <tr>
276 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a7e475d550020f2ef86841dd171ddf94e">Dn_size</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
277 
        </tr>
278 
      </table>
279 
</div>
280 
<div class="memdoc">
281 
 
282 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02059">2059</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
283 
 
284 
</div>
285 
</div>
286 
<a class="anchor" id="a224aca31f9e8189294f9072ee0fc015a"></a><!-- doxytag: member="memory_registers::Dn_output" ref="a224aca31f9e8189294f9072ee0fc015a" args="" -->
287 
<div class="memitem">
288 
<div class="memproto">
289 
      <table class="memname">
290 
        <tr>
291 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a224aca31f9e8189294f9072ee0fc015a">Dn_output</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
292 
        </tr>
293 
      </table>
294 
</div>
295 
<div class="memdoc">
296 
 
297 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02060">2060</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
298 
 
299 
</div>
300 
</div>
301 
<a class="anchor" id="a242c22630fbc44df8a129350db77b3d0"></a><!-- doxytag: member="memory_registers::micro_pc" ref="a242c22630fbc44df8a129350db77b3d0" args="" -->
302 
<div class="memitem">
303 
<div class="memproto">
304 
      <table class="memname">
305 
        <tr>
306 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a242c22630fbc44df8a129350db77b3d0">micro_pc</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
307 
        </tr>
308 
      </table>
309 
</div>
310 
<div class="memdoc">
311 
 
312 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02062">2062</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
313 
 
314 
</div>
315 
</div>
316 
<a class="anchor" id="a9f8c0a5b5adedad8f2f3f503cb5510f6"></a><!-- doxytag: member="memory_registers::micro_data" ref="a9f8c0a5b5adedad8f2f3f503cb5510f6" args="" -->
317 
<div class="memitem">
318 
<div class="memproto">
319 
      <table class="memname">
320 
        <tr>
321 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a9f8c0a5b5adedad8f2f3f503cb5510f6">micro_data</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">87</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
322 
        </tr>
323 
      </table>
324 
</div>
325 
<div class="memdoc">
326 
 
327 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02063">2063</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
328 
 
329 
</div>
330 
</div>
331 
<a class="anchor" id="acfe7cd131da7ea586dcb50bea9457678"></a><!-- doxytag: member="memory_registers::An_ram_write_enable" ref="acfe7cd131da7ea586dcb50bea9457678" args="wire" -->
332 
<div class="memitem">
333 
<div class="memproto">
334 
      <table class="memname">
335 
        <tr>
336 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#acfe7cd131da7ea586dcb50bea9457678">An_ram_write_enable</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
337 
        </tr>
338 
      </table>
339 
</div>
340 
<div class="memdoc">
341 
 
342 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02066">2066</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
343 
 
344 
</div>
345 
</div>
346 
<a class="anchor" id="a162864c7253e9c74e47b2822eacde9d4"></a><!-- doxytag: member="memory_registers::An_ram_output" ref="a162864c7253e9c74e47b2822eacde9d4" args="wire[31:0]" -->
347 
<div class="memitem">
348 
<div class="memproto">
349 
      <table class="memname">
350 
        <tr>
351 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a162864c7253e9c74e47b2822eacde9d4">An_ram_output</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
352 
        </tr>
353 
      </table>
354 
</div>
355 
<div class="memdoc">
356 
 
357 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02068">2068</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
358 
 
359 
</div>
360 
</div>
361 
<a class="anchor" id="a3ab032d1bc007200d49892a2ab390732"></a><!-- doxytag: member="memory_registers::dn_byteena" ref="a3ab032d1bc007200d49892a2ab390732" args="wire[3:0]" -->
362 
<div class="memitem">
363 
<div class="memproto">
364 
      <table class="memname">
365 
        <tr>
366 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a3ab032d1bc007200d49892a2ab390732">dn_byteena</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[3:0]]</code></td>
367 
        </tr>
368 
      </table>
369 
</div>
370 
<div class="memdoc">
371 
 
372 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02071">2071</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
373 
 
374 
</div>
375 
</div>
376 
<a class="anchor" id="a892186b1bfe856b1ddaf1d8b3a448f50"></a><!-- doxytag: member="memory_registers::altsyncram" ref="a892186b1bfe856b1ddaf1d8b3a448f50" args="" -->
377 
<div class="memitem">
378 
<div class="memproto">
379 
      <table class="memname">
380 
        <tr>
381 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a></span> <b><span class="vhdlchar">an_ram_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
382 
        </tr>
383 
      </table>
384 
</div>
385 
<div class="memdoc">
386 
 
387 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02082">2082</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
388 
 
389 
</div>
390 
</div>
391 
<a class="anchor" id="a5b0f1fb5a259a06899ac6ac3b52835e0"></a><!-- doxytag: member="memory_registers::altsyncram" ref="a5b0f1fb5a259a06899ac6ac3b52835e0" args="" -->
392 
<div class="memitem">
393 
<div class="memproto">
394 
      <table class="memname">
395 
        <tr>
396 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a5b0f1fb5a259a06899ac6ac3b52835e0">altsyncram</a></span> <b><span class="vhdlchar">dn_ram_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
397 
        </tr>
398 
      </table>
399 
</div>
400 
<div class="memdoc">
401 
 
402 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02098">2098</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
403 
 
404 
</div>
405 
</div>
406 
<a class="anchor" id="afc54073a43b749eb1f1376c4b31cd1e3"></a><!-- doxytag: member="memory_registers::altsyncram" ref="afc54073a43b749eb1f1376c4b31cd1e3" args="" -->
407 
<div class="memitem">
408 
<div class="memproto">
409 
      <table class="memname">
410 
        <tr>
411 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#afc54073a43b749eb1f1376c4b31cd1e3">altsyncram</a></span> <b><span class="vhdlchar">micro_rom_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
412 
        </tr>
413 
      </table>
414 
</div>
415 
<div class="memdoc">
416 
 
417 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02114">2114</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
418 
 
419 
</div>
420 
</div>
421 
<hr/>The documentation for this class was generated from the following file:<ul>
422 
<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
423 
</ul>
424 
</div>
425 
<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:20 for aoOCS by&#160;
426 
<a href="http://www.doxygen.org/index.html">
427 
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
428 
</body>
429 
</html>

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.