1 |
2 |
alfik |
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
2 |
|
|
<html xmlns="http://www.w3.org/1999/xhtml">
|
3 |
|
|
<head>
|
4 |
|
|
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
5 |
|
|
<title>aoOCS: ocs_control Module Reference</title>
|
6 |
|
|
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
7 |
|
|
<link href="doxygen.css" rel="stylesheet" type="text/css"/>
|
8 |
|
|
</head>
|
9 |
|
|
<body>
|
10 |
|
|
<!-- Generated by Doxygen 1.7.2 -->
|
11 |
|
|
<div class="navigation" id="top">
|
12 |
|
|
<div class="tabs">
|
13 |
|
|
<ul class="tablist">
|
14 |
|
|
<li><a href="index.html"><span>Main Page</span></a></li>
|
15 |
|
|
<li class="current"><a href="annotated.html"><span>Design Unit List</span></a></li>
|
16 |
|
|
<li><a href="files.html"><span>Files</span></a></li>
|
17 |
|
|
</ul>
|
18 |
|
|
</div>
|
19 |
|
|
<div class="tabs2">
|
20 |
|
|
<ul class="tablist">
|
21 |
|
|
<li><a href="annotated.html"><span>Class List</span></a></li>
|
22 |
|
|
<li><a href="hierarchy.html"><span>Design Unit Hierarchy</span></a></li>
|
23 |
|
|
<li><a href="functions.html"><span>Design Unit Members</span></a></li>
|
24 |
|
|
</ul>
|
25 |
|
|
</div>
|
26 |
|
|
</div>
|
27 |
|
|
<div class="header">
|
28 |
|
|
<div class="summary">
|
29 |
|
|
<a href="#Inputs">Inputs</a> |
|
30 |
|
|
<a href="#Outputs">Outputs</a> |
|
31 |
|
|
<a href="#Signals">Signals</a> |
|
32 |
|
|
<a href="#Always Constructs">Always Constructs</a> </div>
|
33 |
|
|
<div class="headertitle">
|
34 |
|
|
<h1>ocs_control Module Reference</h1> </div>
|
35 |
|
|
</div>
|
36 |
|
|
<div class="contents">
|
37 |
|
|
<!-- doxytag: class="ocs_control" -->
|
38 |
|
|
<p><p>OCS system control implementation with WISHBONE slave interface. </p>
|
39 |
|
|
|
40 |
|
|
<a href="#_details">More...</a></p>
|
41 |
|
|
<!-- startSectionHeader --><div class="dynheader">
|
42 |
|
|
Inheritance diagram for ocs_control:<!-- endSectionHeader --></div>
|
43 |
|
|
<!-- startSectionSummary --><!-- endSectionSummary --><!-- startSectionContent --><div class="dyncontent">
|
44 |
|
|
<div class="center">
|
45 |
|
|
<img src="classocs__control.png" usemap="#ocs_control_map" alt=""/>
|
46 |
|
|
<map id="ocs_control_map" name="ocs_control_map">
|
47 |
|
|
<area href="classaoOCS.html" alt="aoOCS" shape="rect" coords="0,56,78,80"/>
|
48 |
|
|
</map>
|
49 |
|
|
</div><!-- endSectionContent --></div>
|
50 |
|
|
|
51 |
|
|
<p><a href="classocs__control-members.html">List of all members.</a></p>
|
52 |
|
|
<table class="memberdecls">
|
53 |
|
|
<tr><td colspan="2"><h2><a name="Always Constructs"></a>
|
54 |
|
|
Always Constructs</h2></td></tr>
|
55 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a941900ef0da9240ac0c4925bcc5c72b0">ALWAYS_40</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
|
56 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a457e5455cd5940e951513a66fcb55270">ALWAYS_41</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
|
57 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a896ae4138df87842bae2e3beddb07953">ALWAYS_42</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
|
58 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a42a3550bb1bca3965ecb62d3653ed6b6">ALWAYS_43</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
|
59 |
|
|
<tr><td colspan="2"><h2><a name="Inputs"></a>
|
60 |
|
|
Inputs</h2></td></tr>
|
61 |
|
|
<tr><td colspan="2"><div class="groupHeader">Clock and reset</div></td></tr>
|
62 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
63 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
64 |
|
|
<tr><td colspan="2"><div class="groupHeader">WISHBONE slave</div></td></tr>
|
65 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a2b96a7c9eef58084d7c25b4cda2c4ed8">CYC_I</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
66 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a26071b95b282cb6ff3aac96128f0737a">STB_I</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
67 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#ac7648944e0726e364b9509f1a0b81c12">WE_I</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
68 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a5287d0f0371bd2793e15feb3e1871bbd">ADR_I</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
69 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a6eb7afa02ef30b83f4553c2710cb219d">SEL_I</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
70 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a8a577d05f486a2b93a18f90ae5a08646">slave_DAT_I</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
71 |
|
|
<tr><td colspan="2"><div class="groupHeader">Not aligned register access on a 32-bit WISHBONE bus</div></td></tr>
|
72 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a0dcd453ed628f5b00f790f2ab89803db">na_int_ena_write</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
73 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#aa45b061fb9026b2d2ea62770ba1516af">na_int_ena</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
74 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#ab60aa15fd32a27bc713a6e03259b8b9c">na_int_ena_sel</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
75 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a8672e719439586f796599c61a9edf765">na_dma_con_write</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
76 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a253a44d8f5bba8b2a5a1988e73059626">na_dma_con</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
77 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#abf6f4b5c6a572ec5a8a35f4d20485566">na_dma_con_sel</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
78 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#aa0f199c211813332f0988a4b8a6a3a02">na_pot0dat</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
79 |
|
|
<tr><td colspan="2"><div class="groupHeader">Internal OCS ports: global registers and blitter signals</div></td></tr>
|
80 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a02b5f619bee718ffca6c320ab96bda12">blitter_busy</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
81 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#aa7ea7fc799ab33140366bd1015496a8d">blitter_zero</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
82 |
|
|
<tr><td colspan="2"><div class="groupHeader">Internal OCS ports: interrupts</div></td></tr>
|
83 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#ae645835ecd291e80d3f61ec700e0ef83">blitter_irq</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
84 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a0c63e4bdbce5abb540b08a7e92f212a6">cia_a_irq</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
85 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#afe3687249cafab6be582a087418a3398">cia_b_irq</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
86 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a16bb90760ecef8bb189641ef3966630d">floppy_syn_irq</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
87 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a09d4c03109cf00edd231085ce18ab92c">floppy_blk_irq</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
88 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a5ec8650f5638dbfa0f0672a36fad69db">serial_rbf_irq</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
89 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a6ed777016a820616ed38f063c8578317">serial_tbe_irq</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
90 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#aec4f636beb542cf2eba96883a664a736">audio_irq</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
91 |
|
|
<tr><td colspan="2"><h2><a name="Outputs"></a>
|
92 |
|
|
Outputs</h2></td></tr>
|
93 |
|
|
<tr><td colspan="2"><div class="groupHeader">WISHBONE slave</div></td></tr>
|
94 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a4c36d95eefa6d567b8b4e8d476cd3a96">slave_DAT_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
95 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a8f9ec718b2729125a55d8befe1f27435">ACK_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
|
96 |
|
|
<tr><td colspan="2"><div class="groupHeader">Not aligned register access on a 32-bit WISHBONE bus</div></td></tr>
|
97 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a0e6ee6c6aa45013963dd74c65dc37bc6">na_pot0dat_read</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
98 |
|
|
<tr><td colspan="2"><div class="groupHeader">Internal OCS ports: beam counters</div></td></tr>
|
99 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#af98b6d9d326d8dd116b3b7969a720247">line_start</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
|
100 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#ada98b4d5917ec047013fdc76570c6a8e">line_pre_start</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
|
101 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a4550e00911796d007466de7625bd0b2a">line_number</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
102 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a91b282041c78283ad2fd1a333cf3fdc4">column_number</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
103 |
|
|
<tr><td colspan="2"><div class="groupHeader">Internal OCS ports: clock pulses for CIA and audio</div></td></tr>
|
104 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a0197eedf5b87ff26b0b2035e18b8c1c1">pulse_709379_hz</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
|
105 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#ac0fa0cd71802281503990be9fd87f900">pulse_color</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
|
106 |
|
|
<tr><td colspan="2"><div class="groupHeader">Internal OCS ports: global registers and blitter signals</div></td></tr>
|
107 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#a2ef3aff81fd20f8ae91d3e66c046fffe">dma_con</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">10</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
108 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#ad1c254c7e4551d7f373b552e40652f5f">adk_con</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">14</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
109 |
|
|
<tr><td colspan="2"><div class="groupHeader">Internal OCS ports: interrupts</div></td></tr>
|
110 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classocs__control.html#aa8d13b23544f041f1f633c8237e0ad03">interrupt</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
|
111 |
|
|
<tr><td colspan="2"><h2><a name="Signals"></a>
|
112 |
|
|
Signals</h2></td></tr>
|
113 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">14</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classocs__control.html#a50bcd8b53c850440d22c18a40f5a3255">new_int_req</a> </td></tr>
|
114 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">14</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classocs__control.html#a3525e0a8a3eada445af773a732dd0469">int_ena</a> </td></tr>
|
115 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">14</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classocs__control.html#a37d5b61b43de582a29e66d99937762db">int_req</a> </td></tr>
|
116 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">10</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classocs__control.html#a30b9ec3d0a2504a8d4ce0c4f38bbe122">column_counter</a> </td></tr>
|
117 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classocs__control.html#a60428caa020a8abe12a58b707c2f4dcc">long_frame</a> </td></tr>
|
118 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classocs__control.html#aa9b59818fff4230873e441c8a2a60849">counter_709379_hz</a> </td></tr>
|
119 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classocs__control.html#a4e8810952f8e3f0d2aaf70f534825718">pulse_counter</a> </td></tr>
|
120 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">10</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classocs__control.html#a26d607f09a884c29628f3d1fb27d2284">counter_cpu</a> </td></tr>
|
121 |
|
|
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classocs__control.html#a8465c5335d8e7bc89684c040e41cbd53">pulse_cpu</a> </td></tr>
|
122 |
|
|
</table>
|
123 |
|
|
<hr/><a name="_details"></a><h2>Detailed Description</h2>
|
124 |
|
|
<p>OCS system control implementation with WISHBONE slave interface. </p>
|
125 |
|
|
<p>List of system control registers: </p>
|
126 |
|
|
<div class="fragment"><pre class="fragment">
|
127 |
|
|
Implemented:
|
128 |
|
|
[DDFSTOP 094 W A Display bitplane data fetch stop
|
129 |
|
|
(horiz. position) write not implemented here]
|
130 |
|
|
DMACON 096 W ADP DMA control write (clear or set) write not implemented here
|
131 |
|
|
|
132 |
|
|
DMACONR *002 R AP DMA control (and blitter status) read
|
133 |
|
|
VPOSR *004 R A( E ) Read vert most signif. bit (and frame flop)
|
134 |
|
|
VHPOSR *006 R A Read vert and horiz. position of beam
|
135 |
|
|
|
136 |
|
|
ADKCON 09E W P Audio, disk, UART control
|
137 |
|
|
|
138 |
|
|
ADKCONR *010 R P Audio, disk control register read
|
139 |
|
|
[POT0DAT *012 R P( E ) Pot counter pair 0 data (vert,horiz) read implemented here]
|
140 |
|
|
|
141 |
|
|
INTENAR *01C R P Interrupt enable bits read
|
142 |
|
|
INTREQR *01E R P Interrupt request bits read
|
143 |
|
|
|
144 |
|
|
[CLXCON 098 W D Collision control write not implemented here]
|
145 |
|
|
INTENA 09A W P Interrupt enable bits (clear or set bits) write not implemented here
|
146 |
|
|
INTREQ 09C W P Interrupt request bits (clear or set bits)
|
147 |
|
|
|
148 |
|
|
Not implemented:
|
149 |
|
|
REFPTR & *028 W A Refresh pointer
|
150 |
|
|
VPOSW *02A W A Write vert most signif. bit (and frame flop)
|
151 |
|
|
VHPOSW *02C W A Write vert and horiz position of beam
|
152 |
|
|
|
153 |
|
|
STREQU & *038 S D Strobe for horiz sync with VB and EQU
|
154 |
|
|
STRVBL & *03A S D Strobe for horiz sync with VB (vert. blank)
|
155 |
|
|
STRHOR & *03C S DP Strobe for horiz sync
|
156 |
|
|
STRLONG & *03E S D( E ) Strobe for identification of long horiz. line.
|
157 |
|
|
|
158 |
|
|
RESERVED 1110X
|
159 |
|
|
RESERVED 1111X
|
160 |
|
|
NO-OP(NULL) 1FE
|
161 |
|
|
</pre></div>
|
162 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00069">69</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
163 |
|
|
<hr/><h2>Member Function Documentation</h2>
|
164 |
|
|
<a class="anchor" id="a941900ef0da9240ac0c4925bcc5c72b0"></a><!-- doxytag: member="ocs_control::ALWAYS_40" ref="a941900ef0da9240ac0c4925bcc5c72b0" args="clk_30, reset_n" -->
|
165 |
|
|
<div class="memitem">
|
166 |
|
|
<div class="memproto">
|
167 |
|
|
<table class="memname">
|
168 |
|
|
<tr>
|
169 |
|
|
<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_40 <td></td>
|
170 |
|
|
<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>
|
171 |
|
|
</tr>
|
172 |
|
|
<tr>
|
173 |
|
|
<td class="paramkey"></td>
|
174 |
|
|
<td></td>
|
175 |
|
|
<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>
|
176 |
|
|
</tr>
|
177 |
|
|
<code> [Always Construct]</code></td>
|
178 |
|
|
</tr>
|
179 |
|
|
</table>
|
180 |
|
|
</div>
|
181 |
|
|
<div class="memdoc">
|
182 |
|
|
|
183 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00182">182</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
184 |
|
|
|
185 |
|
|
</div>
|
186 |
|
|
</div>
|
187 |
|
|
<a class="anchor" id="a457e5455cd5940e951513a66fcb55270"></a><!-- doxytag: member="ocs_control::ALWAYS_41" ref="a457e5455cd5940e951513a66fcb55270" args="clk_30, reset_n" -->
|
188 |
|
|
<div class="memitem">
|
189 |
|
|
<div class="memproto">
|
190 |
|
|
<table class="memname">
|
191 |
|
|
<tr>
|
192 |
|
|
<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_41 <td></td>
|
193 |
|
|
<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>
|
194 |
|
|
</tr>
|
195 |
|
|
<tr>
|
196 |
|
|
<td class="paramkey"></td>
|
197 |
|
|
<td></td>
|
198 |
|
|
<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>
|
199 |
|
|
</tr>
|
200 |
|
|
<code> [Always Construct]</code></td>
|
201 |
|
|
</tr>
|
202 |
|
|
</table>
|
203 |
|
|
</div>
|
204 |
|
|
<div class="memdoc">
|
205 |
|
|
|
206 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00272">272</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
207 |
|
|
|
208 |
|
|
</div>
|
209 |
|
|
</div>
|
210 |
|
|
<a class="anchor" id="a896ae4138df87842bae2e3beddb07953"></a><!-- doxytag: member="ocs_control::ALWAYS_42" ref="a896ae4138df87842bae2e3beddb07953" args="clk_30, reset_n" -->
|
211 |
|
|
<div class="memitem">
|
212 |
|
|
<div class="memproto">
|
213 |
|
|
<table class="memname">
|
214 |
|
|
<tr>
|
215 |
|
|
<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_42 <td></td>
|
216 |
|
|
<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>
|
217 |
|
|
</tr>
|
218 |
|
|
<tr>
|
219 |
|
|
<td class="paramkey"></td>
|
220 |
|
|
<td></td>
|
221 |
|
|
<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>
|
222 |
|
|
</tr>
|
223 |
|
|
<code> [Always Construct]</code></td>
|
224 |
|
|
</tr>
|
225 |
|
|
</table>
|
226 |
|
|
</div>
|
227 |
|
|
<div class="memdoc">
|
228 |
|
|
|
229 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00297">297</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
230 |
|
|
|
231 |
|
|
</div>
|
232 |
|
|
</div>
|
233 |
|
|
<a class="anchor" id="a42a3550bb1bca3965ecb62d3653ed6b6"></a><!-- doxytag: member="ocs_control::ALWAYS_43" ref="a42a3550bb1bca3965ecb62d3653ed6b6" args="clk_30, reset_n" -->
|
234 |
|
|
<div class="memitem">
|
235 |
|
|
<div class="memproto">
|
236 |
|
|
<table class="memname">
|
237 |
|
|
<tr>
|
238 |
|
|
<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_43 <td></td>
|
239 |
|
|
<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>
|
240 |
|
|
</tr>
|
241 |
|
|
<tr>
|
242 |
|
|
<td class="paramkey"></td>
|
243 |
|
|
<td></td>
|
244 |
|
|
<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>
|
245 |
|
|
</tr>
|
246 |
|
|
<code> [Always Construct]</code></td>
|
247 |
|
|
</tr>
|
248 |
|
|
</table>
|
249 |
|
|
</div>
|
250 |
|
|
<div class="memdoc">
|
251 |
|
|
|
252 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00306">306</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
253 |
|
|
|
254 |
|
|
</div>
|
255 |
|
|
</div>
|
256 |
|
|
<hr/><h2>Member Data Documentation</h2>
|
257 |
|
|
<a class="anchor" id="a78eebaf1d7122debfc56eebb02678f7c"></a><!-- doxytag: member="ocs_control::clk_30" ref="a78eebaf1d7122debfc56eebb02678f7c" args="" -->
|
258 |
|
|
<div class="memitem">
|
259 |
|
|
<div class="memproto">
|
260 |
|
|
<table class="memname">
|
261 |
|
|
<tr>
|
262 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a78eebaf1d7122debfc56eebb02678f7c">clk_30</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
263 |
|
|
</tr>
|
264 |
|
|
</table>
|
265 |
|
|
</div>
|
266 |
|
|
<div class="memdoc">
|
267 |
|
|
|
268 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00072">72</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
269 |
|
|
|
270 |
|
|
</div>
|
271 |
|
|
</div>
|
272 |
|
|
<a class="anchor" id="a246ab8bc07755c51fdd905891ec461e7"></a><!-- doxytag: member="ocs_control::reset_n" ref="a246ab8bc07755c51fdd905891ec461e7" args="" -->
|
273 |
|
|
<div class="memitem">
|
274 |
|
|
<div class="memproto">
|
275 |
|
|
<table class="memname">
|
276 |
|
|
<tr>
|
277 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a246ab8bc07755c51fdd905891ec461e7">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
278 |
|
|
</tr>
|
279 |
|
|
</table>
|
280 |
|
|
</div>
|
281 |
|
|
<div class="memdoc">
|
282 |
|
|
|
283 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00073">73</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
284 |
|
|
|
285 |
|
|
</div>
|
286 |
|
|
</div>
|
287 |
|
|
<a class="anchor" id="a2b96a7c9eef58084d7c25b4cda2c4ed8"></a><!-- doxytag: member="ocs_control::CYC_I" ref="a2b96a7c9eef58084d7c25b4cda2c4ed8" args="" -->
|
288 |
|
|
<div class="memitem">
|
289 |
|
|
<div class="memproto">
|
290 |
|
|
<table class="memname">
|
291 |
|
|
<tr>
|
292 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a2b96a7c9eef58084d7c25b4cda2c4ed8">CYC_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
293 |
|
|
</tr>
|
294 |
|
|
</table>
|
295 |
|
|
</div>
|
296 |
|
|
<div class="memdoc">
|
297 |
|
|
|
298 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00078">78</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
299 |
|
|
|
300 |
|
|
</div>
|
301 |
|
|
</div>
|
302 |
|
|
<a class="anchor" id="a26071b95b282cb6ff3aac96128f0737a"></a><!-- doxytag: member="ocs_control::STB_I" ref="a26071b95b282cb6ff3aac96128f0737a" args="" -->
|
303 |
|
|
<div class="memitem">
|
304 |
|
|
<div class="memproto">
|
305 |
|
|
<table class="memname">
|
306 |
|
|
<tr>
|
307 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a26071b95b282cb6ff3aac96128f0737a">STB_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
308 |
|
|
</tr>
|
309 |
|
|
</table>
|
310 |
|
|
</div>
|
311 |
|
|
<div class="memdoc">
|
312 |
|
|
|
313 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00079">79</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
314 |
|
|
|
315 |
|
|
</div>
|
316 |
|
|
</div>
|
317 |
|
|
<a class="anchor" id="ac7648944e0726e364b9509f1a0b81c12"></a><!-- doxytag: member="ocs_control::WE_I" ref="ac7648944e0726e364b9509f1a0b81c12" args="" -->
|
318 |
|
|
<div class="memitem">
|
319 |
|
|
<div class="memproto">
|
320 |
|
|
<table class="memname">
|
321 |
|
|
<tr>
|
322 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#ac7648944e0726e364b9509f1a0b81c12">WE_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
323 |
|
|
</tr>
|
324 |
|
|
</table>
|
325 |
|
|
</div>
|
326 |
|
|
<div class="memdoc">
|
327 |
|
|
|
328 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00080">80</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
329 |
|
|
|
330 |
|
|
</div>
|
331 |
|
|
</div>
|
332 |
|
|
<a class="anchor" id="a5287d0f0371bd2793e15feb3e1871bbd"></a><!-- doxytag: member="ocs_control::ADR_I" ref="a5287d0f0371bd2793e15feb3e1871bbd" args="" -->
|
333 |
|
|
<div class="memitem">
|
334 |
|
|
<div class="memproto">
|
335 |
|
|
<table class="memname">
|
336 |
|
|
<tr>
|
337 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a5287d0f0371bd2793e15feb3e1871bbd">ADR_I</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
338 |
|
|
</tr>
|
339 |
|
|
</table>
|
340 |
|
|
</div>
|
341 |
|
|
<div class="memdoc">
|
342 |
|
|
|
343 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00081">81</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
344 |
|
|
|
345 |
|
|
</div>
|
346 |
|
|
</div>
|
347 |
|
|
<a class="anchor" id="a6eb7afa02ef30b83f4553c2710cb219d"></a><!-- doxytag: member="ocs_control::SEL_I" ref="a6eb7afa02ef30b83f4553c2710cb219d" args="" -->
|
348 |
|
|
<div class="memitem">
|
349 |
|
|
<div class="memproto">
|
350 |
|
|
<table class="memname">
|
351 |
|
|
<tr>
|
352 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a6eb7afa02ef30b83f4553c2710cb219d">SEL_I</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
353 |
|
|
</tr>
|
354 |
|
|
</table>
|
355 |
|
|
</div>
|
356 |
|
|
<div class="memdoc">
|
357 |
|
|
|
358 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00082">82</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
359 |
|
|
|
360 |
|
|
</div>
|
361 |
|
|
</div>
|
362 |
|
|
<a class="anchor" id="a8a577d05f486a2b93a18f90ae5a08646"></a><!-- doxytag: member="ocs_control::slave_DAT_I" ref="a8a577d05f486a2b93a18f90ae5a08646" args="" -->
|
363 |
|
|
<div class="memitem">
|
364 |
|
|
<div class="memproto">
|
365 |
|
|
<table class="memname">
|
366 |
|
|
<tr>
|
367 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a8a577d05f486a2b93a18f90ae5a08646">slave_DAT_I</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
368 |
|
|
</tr>
|
369 |
|
|
</table>
|
370 |
|
|
</div>
|
371 |
|
|
<div class="memdoc">
|
372 |
|
|
|
373 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00083">83</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
374 |
|
|
|
375 |
|
|
</div>
|
376 |
|
|
</div>
|
377 |
|
|
<a class="anchor" id="a4c36d95eefa6d567b8b4e8d476cd3a96"></a><!-- doxytag: member="ocs_control::slave_DAT_O" ref="a4c36d95eefa6d567b8b4e8d476cd3a96" args="" -->
|
378 |
|
|
<div class="memitem">
|
379 |
|
|
<div class="memproto">
|
380 |
|
|
<table class="memname">
|
381 |
|
|
<tr>
|
382 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a4c36d95eefa6d567b8b4e8d476cd3a96">slave_DAT_O</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
383 |
|
|
</tr>
|
384 |
|
|
</table>
|
385 |
|
|
</div>
|
386 |
|
|
<div class="memdoc">
|
387 |
|
|
|
388 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00084">84</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
389 |
|
|
|
390 |
|
|
</div>
|
391 |
|
|
</div>
|
392 |
|
|
<a class="anchor" id="a8f9ec718b2729125a55d8befe1f27435"></a><!-- doxytag: member="ocs_control::ACK_O" ref="a8f9ec718b2729125a55d8befe1f27435" args="" -->
|
393 |
|
|
<div class="memitem">
|
394 |
|
|
<div class="memproto">
|
395 |
|
|
<table class="memname">
|
396 |
|
|
<tr>
|
397 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a8f9ec718b2729125a55d8befe1f27435">ACK_O</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
398 |
|
|
</tr>
|
399 |
|
|
</table>
|
400 |
|
|
</div>
|
401 |
|
|
<div class="memdoc">
|
402 |
|
|
|
403 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00085">85</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
404 |
|
|
|
405 |
|
|
</div>
|
406 |
|
|
</div>
|
407 |
|
|
<a class="anchor" id="a0dcd453ed628f5b00f790f2ab89803db"></a><!-- doxytag: member="ocs_control::na_int_ena_write" ref="a0dcd453ed628f5b00f790f2ab89803db" args="" -->
|
408 |
|
|
<div class="memitem">
|
409 |
|
|
<div class="memproto">
|
410 |
|
|
<table class="memname">
|
411 |
|
|
<tr>
|
412 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a0dcd453ed628f5b00f790f2ab89803db">na_int_ena_write</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
413 |
|
|
</tr>
|
414 |
|
|
</table>
|
415 |
|
|
</div>
|
416 |
|
|
<div class="memdoc">
|
417 |
|
|
|
418 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00091">91</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
419 |
|
|
|
420 |
|
|
</div>
|
421 |
|
|
</div>
|
422 |
|
|
<a class="anchor" id="aa45b061fb9026b2d2ea62770ba1516af"></a><!-- doxytag: member="ocs_control::na_int_ena" ref="aa45b061fb9026b2d2ea62770ba1516af" args="" -->
|
423 |
|
|
<div class="memitem">
|
424 |
|
|
<div class="memproto">
|
425 |
|
|
<table class="memname">
|
426 |
|
|
<tr>
|
427 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#aa45b061fb9026b2d2ea62770ba1516af">na_int_ena</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
428 |
|
|
</tr>
|
429 |
|
|
</table>
|
430 |
|
|
</div>
|
431 |
|
|
<div class="memdoc">
|
432 |
|
|
|
433 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00092">92</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
434 |
|
|
|
435 |
|
|
</div>
|
436 |
|
|
</div>
|
437 |
|
|
<a class="anchor" id="ab60aa15fd32a27bc713a6e03259b8b9c"></a><!-- doxytag: member="ocs_control::na_int_ena_sel" ref="ab60aa15fd32a27bc713a6e03259b8b9c" args="" -->
|
438 |
|
|
<div class="memitem">
|
439 |
|
|
<div class="memproto">
|
440 |
|
|
<table class="memname">
|
441 |
|
|
<tr>
|
442 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#ab60aa15fd32a27bc713a6e03259b8b9c">na_int_ena_sel</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
443 |
|
|
</tr>
|
444 |
|
|
</table>
|
445 |
|
|
</div>
|
446 |
|
|
<div class="memdoc">
|
447 |
|
|
|
448 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00093">93</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
449 |
|
|
|
450 |
|
|
</div>
|
451 |
|
|
</div>
|
452 |
|
|
<a class="anchor" id="a8672e719439586f796599c61a9edf765"></a><!-- doxytag: member="ocs_control::na_dma_con_write" ref="a8672e719439586f796599c61a9edf765" args="" -->
|
453 |
|
|
<div class="memitem">
|
454 |
|
|
<div class="memproto">
|
455 |
|
|
<table class="memname">
|
456 |
|
|
<tr>
|
457 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a8672e719439586f796599c61a9edf765">na_dma_con_write</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
458 |
|
|
</tr>
|
459 |
|
|
</table>
|
460 |
|
|
</div>
|
461 |
|
|
<div class="memdoc">
|
462 |
|
|
|
463 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00095">95</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
464 |
|
|
|
465 |
|
|
</div>
|
466 |
|
|
</div>
|
467 |
|
|
<a class="anchor" id="a253a44d8f5bba8b2a5a1988e73059626"></a><!-- doxytag: member="ocs_control::na_dma_con" ref="a253a44d8f5bba8b2a5a1988e73059626" args="" -->
|
468 |
|
|
<div class="memitem">
|
469 |
|
|
<div class="memproto">
|
470 |
|
|
<table class="memname">
|
471 |
|
|
<tr>
|
472 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a253a44d8f5bba8b2a5a1988e73059626">na_dma_con</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
473 |
|
|
</tr>
|
474 |
|
|
</table>
|
475 |
|
|
</div>
|
476 |
|
|
<div class="memdoc">
|
477 |
|
|
|
478 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00096">96</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
479 |
|
|
|
480 |
|
|
</div>
|
481 |
|
|
</div>
|
482 |
|
|
<a class="anchor" id="abf6f4b5c6a572ec5a8a35f4d20485566"></a><!-- doxytag: member="ocs_control::na_dma_con_sel" ref="abf6f4b5c6a572ec5a8a35f4d20485566" args="" -->
|
483 |
|
|
<div class="memitem">
|
484 |
|
|
<div class="memproto">
|
485 |
|
|
<table class="memname">
|
486 |
|
|
<tr>
|
487 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#abf6f4b5c6a572ec5a8a35f4d20485566">na_dma_con_sel</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
488 |
|
|
</tr>
|
489 |
|
|
</table>
|
490 |
|
|
</div>
|
491 |
|
|
<div class="memdoc">
|
492 |
|
|
|
493 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00097">97</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
494 |
|
|
|
495 |
|
|
</div>
|
496 |
|
|
</div>
|
497 |
|
|
<a class="anchor" id="a0e6ee6c6aa45013963dd74c65dc37bc6"></a><!-- doxytag: member="ocs_control::na_pot0dat_read" ref="a0e6ee6c6aa45013963dd74c65dc37bc6" args="" -->
|
498 |
|
|
<div class="memitem">
|
499 |
|
|
<div class="memproto">
|
500 |
|
|
<table class="memname">
|
501 |
|
|
<tr>
|
502 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a0e6ee6c6aa45013963dd74c65dc37bc6">na_pot0dat_read</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
503 |
|
|
</tr>
|
504 |
|
|
</table>
|
505 |
|
|
</div>
|
506 |
|
|
<div class="memdoc">
|
507 |
|
|
|
508 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00099">99</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
509 |
|
|
|
510 |
|
|
</div>
|
511 |
|
|
</div>
|
512 |
|
|
<a class="anchor" id="aa0f199c211813332f0988a4b8a6a3a02"></a><!-- doxytag: member="ocs_control::na_pot0dat" ref="aa0f199c211813332f0988a4b8a6a3a02" args="" -->
|
513 |
|
|
<div class="memitem">
|
514 |
|
|
<div class="memproto">
|
515 |
|
|
<table class="memname">
|
516 |
|
|
<tr>
|
517 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#aa0f199c211813332f0988a4b8a6a3a02">na_pot0dat</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
518 |
|
|
</tr>
|
519 |
|
|
</table>
|
520 |
|
|
</div>
|
521 |
|
|
<div class="memdoc">
|
522 |
|
|
|
523 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00100">100</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
524 |
|
|
|
525 |
|
|
</div>
|
526 |
|
|
</div>
|
527 |
|
|
<a class="anchor" id="af98b6d9d326d8dd116b3b7969a720247"></a><!-- doxytag: member="ocs_control::line_start" ref="af98b6d9d326d8dd116b3b7969a720247" args="" -->
|
528 |
|
|
<div class="memitem">
|
529 |
|
|
<div class="memproto">
|
530 |
|
|
<table class="memname">
|
531 |
|
|
<tr>
|
532 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#af98b6d9d326d8dd116b3b7969a720247">line_start</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
533 |
|
|
</tr>
|
534 |
|
|
</table>
|
535 |
|
|
</div>
|
536 |
|
|
<div class="memdoc">
|
537 |
|
|
|
538 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00105">105</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
539 |
|
|
|
540 |
|
|
</div>
|
541 |
|
|
</div>
|
542 |
|
|
<a class="anchor" id="ada98b4d5917ec047013fdc76570c6a8e"></a><!-- doxytag: member="ocs_control::line_pre_start" ref="ada98b4d5917ec047013fdc76570c6a8e" args="" -->
|
543 |
|
|
<div class="memitem">
|
544 |
|
|
<div class="memproto">
|
545 |
|
|
<table class="memname">
|
546 |
|
|
<tr>
|
547 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#ada98b4d5917ec047013fdc76570c6a8e">line_pre_start</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
548 |
|
|
</tr>
|
549 |
|
|
</table>
|
550 |
|
|
</div>
|
551 |
|
|
<div class="memdoc">
|
552 |
|
|
|
553 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00106">106</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
554 |
|
|
|
555 |
|
|
</div>
|
556 |
|
|
</div>
|
557 |
|
|
<a class="anchor" id="a4550e00911796d007466de7625bd0b2a"></a><!-- doxytag: member="ocs_control::line_number" ref="a4550e00911796d007466de7625bd0b2a" args="" -->
|
558 |
|
|
<div class="memitem">
|
559 |
|
|
<div class="memproto">
|
560 |
|
|
<table class="memname">
|
561 |
|
|
<tr>
|
562 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a4550e00911796d007466de7625bd0b2a">line_number</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
563 |
|
|
</tr>
|
564 |
|
|
</table>
|
565 |
|
|
</div>
|
566 |
|
|
<div class="memdoc">
|
567 |
|
|
|
568 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00107">107</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
569 |
|
|
|
570 |
|
|
</div>
|
571 |
|
|
</div>
|
572 |
|
|
<a class="anchor" id="a91b282041c78283ad2fd1a333cf3fdc4"></a><!-- doxytag: member="ocs_control::column_number" ref="a91b282041c78283ad2fd1a333cf3fdc4" args="" -->
|
573 |
|
|
<div class="memitem">
|
574 |
|
|
<div class="memproto">
|
575 |
|
|
<table class="memname">
|
576 |
|
|
<tr>
|
577 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a91b282041c78283ad2fd1a333cf3fdc4">column_number</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
578 |
|
|
</tr>
|
579 |
|
|
</table>
|
580 |
|
|
</div>
|
581 |
|
|
<div class="memdoc">
|
582 |
|
|
|
583 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00108">108</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
584 |
|
|
|
585 |
|
|
</div>
|
586 |
|
|
</div>
|
587 |
|
|
<a class="anchor" id="a0197eedf5b87ff26b0b2035e18b8c1c1"></a><!-- doxytag: member="ocs_control::pulse_709379_hz" ref="a0197eedf5b87ff26b0b2035e18b8c1c1" args="" -->
|
588 |
|
|
<div class="memitem">
|
589 |
|
|
<div class="memproto">
|
590 |
|
|
<table class="memname">
|
591 |
|
|
<tr>
|
592 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a0197eedf5b87ff26b0b2035e18b8c1c1">pulse_709379_hz</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
593 |
|
|
</tr>
|
594 |
|
|
</table>
|
595 |
|
|
</div>
|
596 |
|
|
<div class="memdoc">
|
597 |
|
|
|
598 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00113">113</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
599 |
|
|
|
600 |
|
|
</div>
|
601 |
|
|
</div>
|
602 |
|
|
<a class="anchor" id="ac0fa0cd71802281503990be9fd87f900"></a><!-- doxytag: member="ocs_control::pulse_color" ref="ac0fa0cd71802281503990be9fd87f900" args="" -->
|
603 |
|
|
<div class="memitem">
|
604 |
|
|
<div class="memproto">
|
605 |
|
|
<table class="memname">
|
606 |
|
|
<tr>
|
607 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#ac0fa0cd71802281503990be9fd87f900">pulse_color</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
608 |
|
|
</tr>
|
609 |
|
|
</table>
|
610 |
|
|
</div>
|
611 |
|
|
<div class="memdoc">
|
612 |
|
|
|
613 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00114">114</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
614 |
|
|
|
615 |
|
|
</div>
|
616 |
|
|
</div>
|
617 |
|
|
<a class="anchor" id="a2ef3aff81fd20f8ae91d3e66c046fffe"></a><!-- doxytag: member="ocs_control::dma_con" ref="a2ef3aff81fd20f8ae91d3e66c046fffe" args="" -->
|
618 |
|
|
<div class="memitem">
|
619 |
|
|
<div class="memproto">
|
620 |
|
|
<table class="memname">
|
621 |
|
|
<tr>
|
622 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a2ef3aff81fd20f8ae91d3e66c046fffe">dma_con</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">10</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
623 |
|
|
</tr>
|
624 |
|
|
</table>
|
625 |
|
|
</div>
|
626 |
|
|
<div class="memdoc">
|
627 |
|
|
|
628 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00119">119</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
629 |
|
|
|
630 |
|
|
</div>
|
631 |
|
|
</div>
|
632 |
|
|
<a class="anchor" id="ad1c254c7e4551d7f373b552e40652f5f"></a><!-- doxytag: member="ocs_control::adk_con" ref="ad1c254c7e4551d7f373b552e40652f5f" args="" -->
|
633 |
|
|
<div class="memitem">
|
634 |
|
|
<div class="memproto">
|
635 |
|
|
<table class="memname">
|
636 |
|
|
<tr>
|
637 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#ad1c254c7e4551d7f373b552e40652f5f">adk_con</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">14</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
638 |
|
|
</tr>
|
639 |
|
|
</table>
|
640 |
|
|
</div>
|
641 |
|
|
<div class="memdoc">
|
642 |
|
|
|
643 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00120">120</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
644 |
|
|
|
645 |
|
|
</div>
|
646 |
|
|
</div>
|
647 |
|
|
<a class="anchor" id="a02b5f619bee718ffca6c320ab96bda12"></a><!-- doxytag: member="ocs_control::blitter_busy" ref="a02b5f619bee718ffca6c320ab96bda12" args="" -->
|
648 |
|
|
<div class="memitem">
|
649 |
|
|
<div class="memproto">
|
650 |
|
|
<table class="memname">
|
651 |
|
|
<tr>
|
652 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a02b5f619bee718ffca6c320ab96bda12">blitter_busy</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
653 |
|
|
</tr>
|
654 |
|
|
</table>
|
655 |
|
|
</div>
|
656 |
|
|
<div class="memdoc">
|
657 |
|
|
|
658 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00122">122</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
659 |
|
|
|
660 |
|
|
</div>
|
661 |
|
|
</div>
|
662 |
|
|
<a class="anchor" id="aa7ea7fc799ab33140366bd1015496a8d"></a><!-- doxytag: member="ocs_control::blitter_zero" ref="aa7ea7fc799ab33140366bd1015496a8d" args="" -->
|
663 |
|
|
<div class="memitem">
|
664 |
|
|
<div class="memproto">
|
665 |
|
|
<table class="memname">
|
666 |
|
|
<tr>
|
667 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#aa7ea7fc799ab33140366bd1015496a8d">blitter_zero</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
668 |
|
|
</tr>
|
669 |
|
|
</table>
|
670 |
|
|
</div>
|
671 |
|
|
<div class="memdoc">
|
672 |
|
|
|
673 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00123">123</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
674 |
|
|
|
675 |
|
|
</div>
|
676 |
|
|
</div>
|
677 |
|
|
<a class="anchor" id="ae645835ecd291e80d3f61ec700e0ef83"></a><!-- doxytag: member="ocs_control::blitter_irq" ref="ae645835ecd291e80d3f61ec700e0ef83" args="" -->
|
678 |
|
|
<div class="memitem">
|
679 |
|
|
<div class="memproto">
|
680 |
|
|
<table class="memname">
|
681 |
|
|
<tr>
|
682 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#ae645835ecd291e80d3f61ec700e0ef83">blitter_irq</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
683 |
|
|
</tr>
|
684 |
|
|
</table>
|
685 |
|
|
</div>
|
686 |
|
|
<div class="memdoc">
|
687 |
|
|
|
688 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00128">128</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
689 |
|
|
|
690 |
|
|
</div>
|
691 |
|
|
</div>
|
692 |
|
|
<a class="anchor" id="a0c63e4bdbce5abb540b08a7e92f212a6"></a><!-- doxytag: member="ocs_control::cia_a_irq" ref="a0c63e4bdbce5abb540b08a7e92f212a6" args="" -->
|
693 |
|
|
<div class="memitem">
|
694 |
|
|
<div class="memproto">
|
695 |
|
|
<table class="memname">
|
696 |
|
|
<tr>
|
697 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a0c63e4bdbce5abb540b08a7e92f212a6">cia_a_irq</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
698 |
|
|
</tr>
|
699 |
|
|
</table>
|
700 |
|
|
</div>
|
701 |
|
|
<div class="memdoc">
|
702 |
|
|
|
703 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00129">129</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
704 |
|
|
|
705 |
|
|
</div>
|
706 |
|
|
</div>
|
707 |
|
|
<a class="anchor" id="afe3687249cafab6be582a087418a3398"></a><!-- doxytag: member="ocs_control::cia_b_irq" ref="afe3687249cafab6be582a087418a3398" args="" -->
|
708 |
|
|
<div class="memitem">
|
709 |
|
|
<div class="memproto">
|
710 |
|
|
<table class="memname">
|
711 |
|
|
<tr>
|
712 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#afe3687249cafab6be582a087418a3398">cia_b_irq</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
713 |
|
|
</tr>
|
714 |
|
|
</table>
|
715 |
|
|
</div>
|
716 |
|
|
<div class="memdoc">
|
717 |
|
|
|
718 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00130">130</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
719 |
|
|
|
720 |
|
|
</div>
|
721 |
|
|
</div>
|
722 |
|
|
<a class="anchor" id="a16bb90760ecef8bb189641ef3966630d"></a><!-- doxytag: member="ocs_control::floppy_syn_irq" ref="a16bb90760ecef8bb189641ef3966630d" args="" -->
|
723 |
|
|
<div class="memitem">
|
724 |
|
|
<div class="memproto">
|
725 |
|
|
<table class="memname">
|
726 |
|
|
<tr>
|
727 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a16bb90760ecef8bb189641ef3966630d">floppy_syn_irq</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
728 |
|
|
</tr>
|
729 |
|
|
</table>
|
730 |
|
|
</div>
|
731 |
|
|
<div class="memdoc">
|
732 |
|
|
|
733 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00131">131</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
734 |
|
|
|
735 |
|
|
</div>
|
736 |
|
|
</div>
|
737 |
|
|
<a class="anchor" id="a09d4c03109cf00edd231085ce18ab92c"></a><!-- doxytag: member="ocs_control::floppy_blk_irq" ref="a09d4c03109cf00edd231085ce18ab92c" args="" -->
|
738 |
|
|
<div class="memitem">
|
739 |
|
|
<div class="memproto">
|
740 |
|
|
<table class="memname">
|
741 |
|
|
<tr>
|
742 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a09d4c03109cf00edd231085ce18ab92c">floppy_blk_irq</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
743 |
|
|
</tr>
|
744 |
|
|
</table>
|
745 |
|
|
</div>
|
746 |
|
|
<div class="memdoc">
|
747 |
|
|
|
748 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00132">132</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
749 |
|
|
|
750 |
|
|
</div>
|
751 |
|
|
</div>
|
752 |
|
|
<a class="anchor" id="a5ec8650f5638dbfa0f0672a36fad69db"></a><!-- doxytag: member="ocs_control::serial_rbf_irq" ref="a5ec8650f5638dbfa0f0672a36fad69db" args="" -->
|
753 |
|
|
<div class="memitem">
|
754 |
|
|
<div class="memproto">
|
755 |
|
|
<table class="memname">
|
756 |
|
|
<tr>
|
757 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a5ec8650f5638dbfa0f0672a36fad69db">serial_rbf_irq</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
758 |
|
|
</tr>
|
759 |
|
|
</table>
|
760 |
|
|
</div>
|
761 |
|
|
<div class="memdoc">
|
762 |
|
|
|
763 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00133">133</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
764 |
|
|
|
765 |
|
|
</div>
|
766 |
|
|
</div>
|
767 |
|
|
<a class="anchor" id="a6ed777016a820616ed38f063c8578317"></a><!-- doxytag: member="ocs_control::serial_tbe_irq" ref="a6ed777016a820616ed38f063c8578317" args="" -->
|
768 |
|
|
<div class="memitem">
|
769 |
|
|
<div class="memproto">
|
770 |
|
|
<table class="memname">
|
771 |
|
|
<tr>
|
772 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a6ed777016a820616ed38f063c8578317">serial_tbe_irq</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
773 |
|
|
</tr>
|
774 |
|
|
</table>
|
775 |
|
|
</div>
|
776 |
|
|
<div class="memdoc">
|
777 |
|
|
|
778 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00134">134</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
779 |
|
|
|
780 |
|
|
</div>
|
781 |
|
|
</div>
|
782 |
|
|
<a class="anchor" id="aec4f636beb542cf2eba96883a664a736"></a><!-- doxytag: member="ocs_control::audio_irq" ref="aec4f636beb542cf2eba96883a664a736" args="" -->
|
783 |
|
|
<div class="memitem">
|
784 |
|
|
<div class="memproto">
|
785 |
|
|
<table class="memname">
|
786 |
|
|
<tr>
|
787 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#aec4f636beb542cf2eba96883a664a736">audio_irq</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
|
788 |
|
|
</tr>
|
789 |
|
|
</table>
|
790 |
|
|
</div>
|
791 |
|
|
<div class="memdoc">
|
792 |
|
|
|
793 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00135">135</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
794 |
|
|
|
795 |
|
|
</div>
|
796 |
|
|
</div>
|
797 |
|
|
<a class="anchor" id="aa8d13b23544f041f1f633c8237e0ad03"></a><!-- doxytag: member="ocs_control::interrupt" ref="aa8d13b23544f041f1f633c8237e0ad03" args="" -->
|
798 |
|
|
<div class="memitem">
|
799 |
|
|
<div class="memproto">
|
800 |
|
|
<table class="memname">
|
801 |
|
|
<tr>
|
802 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#aa8d13b23544f041f1f633c8237e0ad03">interrupt</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
|
803 |
|
|
</tr>
|
804 |
|
|
</table>
|
805 |
|
|
</div>
|
806 |
|
|
<div class="memdoc">
|
807 |
|
|
|
808 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00137">137</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
809 |
|
|
|
810 |
|
|
</div>
|
811 |
|
|
</div>
|
812 |
|
|
<a class="anchor" id="a50bcd8b53c850440d22c18a40f5a3255"></a><!-- doxytag: member="ocs_control::new_int_req" ref="a50bcd8b53c850440d22c18a40f5a3255" args="wire[14:0]" -->
|
813 |
|
|
<div class="memitem">
|
814 |
|
|
<div class="memproto">
|
815 |
|
|
<table class="memname">
|
816 |
|
|
<tr>
|
817 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a50bcd8b53c850440d22c18a40f5a3255">new_int_req</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[14:0]]</code></td>
|
818 |
|
|
</tr>
|
819 |
|
|
</table>
|
820 |
|
|
</div>
|
821 |
|
|
<div class="memdoc">
|
822 |
|
|
|
823 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00159">159</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
824 |
|
|
|
825 |
|
|
</div>
|
826 |
|
|
</div>
|
827 |
|
|
<a class="anchor" id="a3525e0a8a3eada445af773a732dd0469"></a><!-- doxytag: member="ocs_control::int_ena" ref="a3525e0a8a3eada445af773a732dd0469" args="reg[14:0]" -->
|
828 |
|
|
<div class="memitem">
|
829 |
|
|
<div class="memproto">
|
830 |
|
|
<table class="memname">
|
831 |
|
|
<tr>
|
832 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a3525e0a8a3eada445af773a732dd0469">int_ena</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[14:0]]</code></td>
|
833 |
|
|
</tr>
|
834 |
|
|
</table>
|
835 |
|
|
</div>
|
836 |
|
|
<div class="memdoc">
|
837 |
|
|
|
838 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00175">175</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
839 |
|
|
|
840 |
|
|
</div>
|
841 |
|
|
</div>
|
842 |
|
|
<a class="anchor" id="a37d5b61b43de582a29e66d99937762db"></a><!-- doxytag: member="ocs_control::int_req" ref="a37d5b61b43de582a29e66d99937762db" args="reg[14:0]" -->
|
843 |
|
|
<div class="memitem">
|
844 |
|
|
<div class="memproto">
|
845 |
|
|
<table class="memname">
|
846 |
|
|
<tr>
|
847 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a37d5b61b43de582a29e66d99937762db">int_req</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[14:0]]</code></td>
|
848 |
|
|
</tr>
|
849 |
|
|
</table>
|
850 |
|
|
</div>
|
851 |
|
|
<div class="memdoc">
|
852 |
|
|
|
853 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00176">176</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
854 |
|
|
|
855 |
|
|
</div>
|
856 |
|
|
</div>
|
857 |
|
|
<a class="anchor" id="a30b9ec3d0a2504a8d4ce0c4f38bbe122"></a><!-- doxytag: member="ocs_control::column_counter" ref="a30b9ec3d0a2504a8d4ce0c4f38bbe122" args="reg[10:0]" -->
|
858 |
|
|
<div class="memitem">
|
859 |
|
|
<div class="memproto">
|
860 |
|
|
<table class="memname">
|
861 |
|
|
<tr>
|
862 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a30b9ec3d0a2504a8d4ce0c4f38bbe122">column_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[10:0]]</code></td>
|
863 |
|
|
</tr>
|
864 |
|
|
</table>
|
865 |
|
|
</div>
|
866 |
|
|
<div class="memdoc">
|
867 |
|
|
|
868 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00177">177</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
869 |
|
|
|
870 |
|
|
</div>
|
871 |
|
|
</div>
|
872 |
|
|
<a class="anchor" id="a60428caa020a8abe12a58b707c2f4dcc"></a><!-- doxytag: member="ocs_control::long_frame" ref="a60428caa020a8abe12a58b707c2f4dcc" args="reg" -->
|
873 |
|
|
<div class="memitem">
|
874 |
|
|
<div class="memproto">
|
875 |
|
|
<table class="memname">
|
876 |
|
|
<tr>
|
877 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a60428caa020a8abe12a58b707c2f4dcc">long_frame</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
|
878 |
|
|
</tr>
|
879 |
|
|
</table>
|
880 |
|
|
</div>
|
881 |
|
|
<div class="memdoc">
|
882 |
|
|
|
883 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00178">178</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
884 |
|
|
|
885 |
|
|
</div>
|
886 |
|
|
</div>
|
887 |
|
|
<a class="anchor" id="aa9b59818fff4230873e441c8a2a60849"></a><!-- doxytag: member="ocs_control::counter_709379_hz" ref="aa9b59818fff4230873e441c8a2a60849" args="reg[2:0]" -->
|
888 |
|
|
<div class="memitem">
|
889 |
|
|
<div class="memproto">
|
890 |
|
|
<table class="memname">
|
891 |
|
|
<tr>
|
892 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#aa9b59818fff4230873e441c8a2a60849">counter_709379_hz</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[2:0]]</code></td>
|
893 |
|
|
</tr>
|
894 |
|
|
</table>
|
895 |
|
|
</div>
|
896 |
|
|
<div class="memdoc">
|
897 |
|
|
|
898 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00271">271</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
899 |
|
|
|
900 |
|
|
</div>
|
901 |
|
|
</div>
|
902 |
|
|
<a class="anchor" id="a4e8810952f8e3f0d2aaf70f534825718"></a><!-- doxytag: member="ocs_control::pulse_counter" ref="a4e8810952f8e3f0d2aaf70f534825718" args="reg" -->
|
903 |
|
|
<div class="memitem">
|
904 |
|
|
<div class="memproto">
|
905 |
|
|
<table class="memname">
|
906 |
|
|
<tr>
|
907 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a4e8810952f8e3f0d2aaf70f534825718">pulse_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
|
908 |
|
|
</tr>
|
909 |
|
|
</table>
|
910 |
|
|
</div>
|
911 |
|
|
<div class="memdoc">
|
912 |
|
|
|
913 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00296">296</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
914 |
|
|
|
915 |
|
|
</div>
|
916 |
|
|
</div>
|
917 |
|
|
<a class="anchor" id="a26d607f09a884c29628f3d1fb27d2284"></a><!-- doxytag: member="ocs_control::counter_cpu" ref="a26d607f09a884c29628f3d1fb27d2284" args="reg[10:0]" -->
|
918 |
|
|
<div class="memitem">
|
919 |
|
|
<div class="memproto">
|
920 |
|
|
<table class="memname">
|
921 |
|
|
<tr>
|
922 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a26d607f09a884c29628f3d1fb27d2284">counter_cpu</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[10:0]]</code></td>
|
923 |
|
|
</tr>
|
924 |
|
|
</table>
|
925 |
|
|
</div>
|
926 |
|
|
<div class="memdoc">
|
927 |
|
|
|
928 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00304">304</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
929 |
|
|
|
930 |
|
|
</div>
|
931 |
|
|
</div>
|
932 |
|
|
<a class="anchor" id="a8465c5335d8e7bc89684c040e41cbd53"></a><!-- doxytag: member="ocs_control::pulse_cpu" ref="a8465c5335d8e7bc89684c040e41cbd53" args="reg" -->
|
933 |
|
|
<div class="memitem">
|
934 |
|
|
<div class="memproto">
|
935 |
|
|
<table class="memname">
|
936 |
|
|
<tr>
|
937 |
|
|
<td class="memname"><span class="stringliteral"><a class="el" href="classocs__control.html#a8465c5335d8e7bc89684c040e41cbd53">pulse_cpu</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
|
938 |
|
|
</tr>
|
939 |
|
|
</table>
|
940 |
|
|
</div>
|
941 |
|
|
<div class="memdoc">
|
942 |
|
|
|
943 |
|
|
<p>Definition at line <a class="el" href="ocs__control_8v_source.html#l00305">305</a> of file <a class="el" href="ocs__control_8v_source.html">ocs_control.v</a>.</p>
|
944 |
|
|
|
945 |
|
|
</div>
|
946 |
|
|
</div>
|
947 |
|
|
<hr/>The documentation for this class was generated from the following file:<ul>
|
948 |
|
|
<li><a class="el" href="ocs__control_8v_source.html">ocs_control.v</a></li>
|
949 |
|
|
</ul>
|
950 |
|
|
</div>
|
951 |
|
|
<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:20 for aoOCS by 
|
952 |
|
|
<a href="http://www.doxygen.org/index.html">
|
953 |
|
|
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
|
954 |
|
|
</body>
|
955 |
|
|
</html>
|