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<h1>IO Ports </h1>  </div>
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<h3><a class="el" href="classaoOCS.html" title="aoOCS top-level module for the Terasic DE2-70 board. ">aoOCS</a> top-level IO Ports</h3>
<div class="fragment"><pre class="fragment">
Inputs
    Clock and reset
        clk_50
        reset_ext_n
    DM9000A Ethernet hardware interface
        enet_irq
    Switches and hex leds hardware interface from drv_debug
        debug_sw1_pc
        debug_sw2_adr
        debug_sw3_halt
Inouts
    IS61LPS51236A pipelined SSRAM hardware interface
        ssram_data          [35:0]
    SD bus 1-bit hardware interface
        sd_cmd_io
        sd_dat_io
    PS/2 keyboard hardware interface
        ps2_kbclk
        ps2_kbdat
    PS/2 mouse hardware interface
        ps2_mouseclk
        ps2_mousedat
    WM8731 audio codec hardware interface
        ac_sdat
    DM9000A Ethernet hardware interface
        enet_data           [15:0]
Outputs
    IS61LPS51236A pipelined SSRAM hardware interface
        ssram_address       [18:0]
        ssram_oe_n
        ssram_writeen_n
        ssram_byteen_n      [3:0]
        ssram_clk
        ssram_globalw_n
        ssram_advance_n
        ssram_adsp_n
        ssram_adsc_n
        ssram_ce1_n
        ssram_ce2
        ssram_ce3_n
    SD bus 1-bit hardware interface
        sd_clk_o
    ADV7123 Video DAC hardware interface
        vga_r   [9:0]
        vga_g   [9:0]
        vga_b   [9:0]
        vga_blank_n
        vga_sync_n
        vga_clock
        vga_hsync
        vga_vsync
    WM8731 audio codec hardware interface
        ac_sclk
        ac_xclk
        ac_bclk
        ac_dat
        ac_lr
    DM9000A Ethernet hardware interface
        enet_clk_25
        enet_reset_n
        enet_cs_n
        enet_ior_n
        enet_iow_n
        enet_cmd
    Switches and hex leds hardware interface from drv_debug
        hex0                [7:0]
        hex1                [7:0]
        hex2                [7:0]
        hex3                [7:0]
        hex4                [7:0]
        hex5                [7:0]
        hex6                [7:0]
        hex7                [7:0]
    Leds hardware interface for debug purposes
        debug_sd            [7:0]
        debug_68k_state     [7:0]
        debug_floppy        [7:0]
</pre></div> </div>
<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:19 for aoOCS by&#160;
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1	2	alfik	`<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">`
2			`<html xmlns="http://www.w3.org/1999/xhtml">`
3			`<head>`
4			`<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>`
5			`<title>aoOCS: IO Ports</title>`
6			`<link href="tabs.css" rel="stylesheet" type="text/css"/>`
7			`<link href="doxygen.css" rel="stylesheet" type="text/css"/>`
8			`</head>`
9			`<body>`
10			`<!-- Generated by Doxygen 1.7.2 -->`
11			`<div class="navigation" id="top">`
12			`<div class="tabs">`
13			`<ul class="tablist">`
14			`<li><a href="index.html"><span>Main Page</span></a></li>`
15			`<li><a href="annotated.html"><span>Design Unit List</span></a></li>`
16			`<li><a href="files.html"><span>Files</span></a></li>`
17			`</ul>`
18			`</div>`
19			`<div class="navpath">`
20			`<ul>`
21			`<li><a class="el" href="index.html">index</a> </li>`
22			`</ul>`
23			`</div>`
24			`</div>`
25			`<div class="header">`
26			`<div class="headertitle">`
27			`<h1>IO Ports </h1> </div>`
28			`</div>`
29			`<div class="contents">`
30			`<h3><a class="el" href="classaoOCS.html" title="aoOCS top-level module for the Terasic DE2-70 board. ">aoOCS</a> top-level IO Ports</h3>`
31			`<div class="fragment"><pre class="fragment">`
32			`Inputs`
33			`Clock and reset`
34			`clk_50`
35			`reset_ext_n`
36			`DM9000A Ethernet hardware interface`
37			`enet_irq`
38			`Switches and hex leds hardware interface from drv_debug`
39			`debug_sw1_pc`
40			`debug_sw2_adr`
41			`debug_sw3_halt`
42			`Inouts`
43			`IS61LPS51236A pipelined SSRAM hardware interface`
44			`ssram_data [35:0]`
45			`SD bus 1-bit hardware interface`
46			`sd_cmd_io`
47			`sd_dat_io`
48			`PS/2 keyboard hardware interface`
49			`ps2_kbclk`
50			`ps2_kbdat`
51			`PS/2 mouse hardware interface`
52			`ps2_mouseclk`
53			`ps2_mousedat`
54			`WM8731 audio codec hardware interface`
55			`ac_sdat`
56			`DM9000A Ethernet hardware interface`
57			`enet_data [15:0]`
58			`Outputs`
59			`IS61LPS51236A pipelined SSRAM hardware interface`
60			`ssram_address [18:0]`
61			`ssram_oe_n`
62			`ssram_writeen_n`
63			`ssram_byteen_n [3:0]`
64			`ssram_clk`
65			`ssram_globalw_n`
66			`ssram_advance_n`
67			`ssram_adsp_n`
68			`ssram_adsc_n`
69			`ssram_ce1_n`
70			`ssram_ce2`
71			`ssram_ce3_n`
72			`SD bus 1-bit hardware interface`
73			`sd_clk_o`
74			`ADV7123 Video DAC hardware interface`
75			`vga_r [9:0]`
76			`vga_g [9:0]`
77			`vga_b [9:0]`
78			`vga_blank_n`
79			`vga_sync_n`
80			`vga_clock`
81			`vga_hsync`
82			`vga_vsync`
83			`WM8731 audio codec hardware interface`
84			`ac_sclk`
85			`ac_xclk`
86			`ac_bclk`
87			`ac_dat`
88			`ac_lr`
89			`DM9000A Ethernet hardware interface`
90			`enet_clk_25`
91			`enet_reset_n`
92			`enet_cs_n`
93			`enet_ior_n`
94			`enet_iow_n`
95			`enet_cmd`
96			`Switches and hex leds hardware interface from drv_debug`
97			`hex0 [7:0]`
98			`hex1 [7:0]`
99			`hex2 [7:0]`
100			`hex3 [7:0]`
101			`hex4 [7:0]`
102			`hex5 [7:0]`
103			`hex6 [7:0]`
104			`hex7 [7:0]`
105			`Leds hardware interface for debug purposes`
106			`debug_sd [7:0]`
107			`debug_68k_state [7:0]`
108			`debug_floppy [7:0]`
109			`</pre></div> </div>`
110			`<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:19 for aoOCS by `
111			`<a href="http://www.doxygen.org/index.html">`
112			`<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>`
113			`</body>`
114			`</html>`

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