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alfik |
/*
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TODO:
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- testbench specification
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- on OpenCores page formating: make all
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- WISHBONE datasheet: additional: maximum operand size
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- ao68000: clean Dn, An RAM
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*/
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/*
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Agnus: Address Generator Unit
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- Chip ram arbiter
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- odd clock (?) cycles: custom chips
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- even clock (?) cycles: CPU - 68000 can access memory every second clock cycle
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- color clocks: 280 ns, 281.94, one memory access cycle
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- 2 low resolution pixels 140 ns each
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- 4 high resolution pixels 70 ns each
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- can be synchronized to external source
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- DMA channels
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- copper: co-processor
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- finite state machine
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- executes programmed instruction stream: copper list
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- synchronized with video hardware
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- 3 states: read instruction, execute instruction, wait for beam position
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- reexecution at every new video frame
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- instructions: each four bytes
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- MOVE: write 16-bit value into chipset hardware register
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- WAIT: wait for beam position or blitter operation finish
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- SKIP: skip the following istruction if beam position already reached
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- each GUI screen can have a different resolution
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- S-HAM: sliced-HAM: swith palette on every scanline, improving HAM mode
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- blitter: block image transfer, bit blit
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- memory transfer
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- logic operation unit
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- 3 modes: copy memory block, fill block, line draw
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- copies memory images: BLOBS: blitter objects
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- copy direction: start-end, end-start
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- A,B,C sources -> D destination
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- width: multiple of 16 bits, height: in lines, stride: end of line to next line
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- barrel shift: 0 to 15 bits
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- BLOB: GUI windows
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- lines: Bresenham algorithm, single pixel thick
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- 16-bit repeating pattern
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- fill: each line from right to left
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- set pixel: toggle filling mode
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*/
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/*
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Paula:
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- 4 independant DMA channels
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- 8-bit PCM: signed, linear, two's complement
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- hardware-mixed: two to left, two to right
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- every channel has an independent:
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- 65 level volume
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- frequency: sample rates from 20 kHz to 28867 Hz: time limit for Paula DMA ordered with video timing
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- audio hardware: four states machines: each having eight states
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- frequency or amplitude modulation
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- interrupts
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- floppy disk drive
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- read and write MFM or GCD data
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- DMA or programmed I/O
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- sync-on-word - $4489 for MFM
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- usage:
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- MFM encoding(3-pass) / decoding(1-pass) is usually performed by the blitter
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- usually one track at once, not sector-by-sector
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- serial port
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- programmed I/O only
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- no FIFO buffer
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- all possible bit rates
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- analog joystick
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*/
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/*
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Audio notes:
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- 1 word = 2 samples for every channel - for every line
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- channel 1,2: left; 0,3: right;
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- 8-bit signed samples
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- pointer is word aligned; location and internal pointer, length also copied
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- length: in words
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- volume: 6 bits +1 max: 0-none, 63, 64 max
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- frequency: clock ticks per sample; countdown - when 0 - next sample to DAC; min 123 (PAL), max 65535; when too fast - repeat sample
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- after stop DMA - replay from start location;
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- interrupt after copy of location and length is made - at the beginning
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- modulate higher channel; when on - turn off audio output, even on channel 3; write new value of amplitude or period when countdown
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- volume: 7 bits; period: 16 bits; both: alternating volume, period
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- lowpass filter at 7 kHz; can be disabled; min sampling rate = fmax + 7kHz; 124-256 no aliasing distortion
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- direct mode: 1 word at a time; interrupt after these two samples; last value stays
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*/
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/* video notes:
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640/16=40 fetches, 5 bitplanes x40 = 200 cycles, NTSC: 227.5 total, 226 usable, E0 = 224,
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always: 4 memory refresh, 3 disk DMA, 4 audio DMA = 11 cycles
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sometimes: 16 sprite DMA
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rest: copper, blitter, 68000
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68000 PAL: 7.09379 MHz /PAL standard=7.09375MHz/ = 2 cycles = 281.9367 ns = color cycle
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68000 NTSC: 7.15909 MHz = 2 cycles = 279.3651 ns = color cycle
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PAL 15.625kHz = 64 us = 227.00128 color cycles
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PAL hsync 4.7 us, back 5.65 us, image 52 us, front 1.65 us
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hsync = 16.67 color cycles
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vsync = 25*64 us = 1.6 ms
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NTSC 15.734kHz = 63.5566 us = 227.5038 color cycles
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Displayable: 52 us, Not displayable: 12 us
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Master PAL oscillator: 28.37516 MHz
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PAL colorburst: 4.43361875 MHz = 5/4 * 3.546895 MHz /a500plus_sm/
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7M: 7.09379 MHz - processor
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C1: 3.546895 MHz - color clock
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"Here is the solution I have found based on the ITU-601/656 standards:
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Clock source: 27MHz.
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27,000,000 / 429 x 455 = 28,636,363 (NTSC clock, 0 ppm)
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27,000,000 / 432 x 454 = 28,375,000 (PAL clock, 6 ppm)"
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http://www.opencircuits.com/Minimig_NTSC
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"The PAL TV signal has 283.7516 color subcarrier cycles per scanline, 312.5 scanlines per field,
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and 50 fields per second, so that gives us a color subcarrier frequency of 283.7516 * 312.5 * 50,
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which equals 4433618.75 Hz, or 4.43361875 MHz. But the PAL Atari generates 228 color clocks per
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scanline (the same as the NTSC Atari), and then it converts those 228 color clocks into a PAL signal.
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Note that the PAL Atari's 228 color clocks per scanline are *not* drawn at the NTSC rate
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(which is roughly 3579545 Hz). I'm not sure about the PAL Atari numbers, but I *think* that each of the
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228 color clocks (which are neither NTSC color clocks nor PAL color clocks) have a rate of
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283.7516 * 312.5 * 50 * 4 / 5 (or four-fifths the rate of a PAL color clock), which equals 3546895 Hz, or 3.546895 MHz.
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Assuming the above formula is correct, you can calculate the exact PAL Atari framerate as
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FR = 283.7516 * 312.5 * 50 * 4 / 5 / 228 / SL. So a 312-line frame has a framerate of approximately 49.86076 Hz."
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http://atari2600.org/pipermail/stella/2008-May/020514.html
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Characteristics
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B,G/PAL
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Number of lines per picture (frame): 625
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Field frequency, nominal value (fields/s): 50
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Line frequency (Hz): 15625±0.0001%
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Nominal line period (µs): 64
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Line-blanking interval (µs): 12±0.3
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"Active" scanlines per field : 287.5 (288)
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http://lipas.uwasa.fi/~f76998/video/modes/
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++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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Vertical PAL:
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Vertical blank: 0 - 29 ($1D)
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Displayable no LACE: 312.5 - 29 = 283.5 = 283
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Displayable LACE: 625 - (29*2) = 567
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Limit VSTART: 0-255
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Normal VSTART: 44 ($2C) - PAL+NTSC
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Limit VSTOP /complement MSB/: 128 ($80) to 383-256=127 ($17F,$7F)
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Normal VSTOP: 300-256=44 ($12C,2C) - PAL, $F4 for NTSC
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Horizontal:
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DDF: 4 lowres pixel resolution = 1.0 color clock, recommended 16 pixel resolution, PAL+NTSC;
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DW: always lowres non-interlace, 1 lowres pixel resolution = 0.5 color clock
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HW DDFSTRT limit: 24 ($18)
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HW DDFSTOP limit: 216 ($D8) --> 192 color clocks, for PAL+NTSC; but custom.c says: HARD_DDF_STOP = 0xD4
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25 lowres word/bitmap fetches, 49 hires word/bitmap fetches (on $D8 only one word fetch)
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horizontal blanking limits to 23 lowres words/bitmap = 368 lowres pixels
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Normal lowres DDFSRT: 56 ($38) = $81/2-8.5=$38, below: disables some sprites; DDFSTOP: 208 ($D0)
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Normal hires DDFSRT: 60 ($3C) = $81/2-4.5=$3C; DDFSTOP: 212 ($D4)
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DDFSTOP - DDFSTRT = (8(fetches per word) * (word/bitmap count - 1)) for low resolution
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DDFSTOP - DDFSTRT = (4(fetches per word) * (word/bitmap count - 2)) for high resolution
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160 = 4x40; 640 = 16x40; 160 = 4x(640/16)
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Limit HSTART: 0 to 255; HSTOP: /-256/: 256=0 to 511-256=255
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Normal HSTART: 129 ($81) - PAL+NTSC; HSTOP: 449-256=193 ($1C1,$C1) - PAL+NTSC
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Horizontal blank limit = Displayable: 368 lowres pixels = 23 words/bitmap = 184 color clocks = - PAL+NTSC
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1 word fetch = 1 color clock
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4.5 color clock from first fetch to disply
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VPOSR: identification bits
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http://www.winnicki.net/amiga/memmap/VPOSR.html
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*********
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audio maximum sampling rate: PAL: 28,867 samples/s, 123 ticks/sample
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*/
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/*
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Denise:
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- video: no overlay:
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- lowres: 320x256
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- hires: 640x256
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- interlace: double vertical size
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- wide overscan: no border around graphics
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- can be synchronized to external source: genlock
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- 1-bit output: is Amiga generating backround color or not
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- bitplanes: 1 to 5
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- fetch bits and perform color lookup
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- palette of 4096 colors
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- 6th bitplane for:
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- Extra-Halfbright mode: if pixel set: brightness of regular 32 color pixel is halved
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- Hold and Modify mode, 4096 colors on screen at once, 6-bit pixel: 2-bit control + 4-bit data:
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- set(data - regular color lookup)
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- modify-red, modify-green, modify-blue (data - modify that component, leave rest unchanged)
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- dual-playfield: two playfields with 8 colors each
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- drawn on top of each other
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- independant scrolling
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- backround color of top field displays bottom field
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- 8 sprites on top of graphics
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- detect collision between: sprites, sprites and bachground
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- 3 visible colors and one transparent
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- attached sprites: 2 sprites attached making a single 15 color sprite
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- sub-pixel scrolling
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- mouse and joystick input
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*/
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/* Floppy notes:
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ID shift register:
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1) motor on -> off
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2) SEL* inactive
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3) SEL* inactive -> SEL* active -> read RDY* ->
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MSB first, inversion needed to get $FFFF FFFF Amiga drive ID
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fl_rdy_n: motor full speed - only when fl_mtr_n active OR id mode
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fl_chg_n: inactive when reset or no floppy, active when selected and step
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fl_wpro_n: asserted when selected
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fl_tk0_n: asserted when slected and head over track 0
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fl_index_n: once per revolution, between sectors
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fl_mtr_n: clocked on SEL* inactive -> SEL* active, LED control
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fl_side_n: inactive: side 0, active: side 1
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fl_step_n: selected drive step pulse
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fl_dir: inactive: higher tracks, active: lower tracks, seperate write than fl_step_n
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floppy_syn_irq - always on sync word, independent of adk_con
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floppy_blk_irq - DMA complete
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DMA read and write one track every revolution
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Synchronize CPU with specific data
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Read single bytes
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adk_con
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[14:13] precompensation, not used
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[12] 0 - GCR precompensation, 1 - MFM precompensation, only MFM supported, not used
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[10] 1 - synchronize on DSKSYNC and start DMA - read from next word,
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[9] 1 - synchronize on MSB for GCD, not used
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[8] 1 - 2us for bit of MFM, 0 - 4us for bit of GCD, not used
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dskptr - address, bit 0 always 0
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dsklen
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[15] secondary DMA enable
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[14] DMA write
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second write with [15:14] == 2'b11 starts DMA write to floppy
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single write with [15:14] == 2'b0X resets counter
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253 |
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second write with [15:14] == 2'b10 starts DMA read from floppy
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254 |
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[13:0] number of words move
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255 |
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256 |
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dskbytr
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[15] 1 - byte read ready, cleaned after read
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[14] 1 - DMA is on: in DMACON and DSKLEN
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[13] dsklen[14]
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[12] dsksync match, for at least 2us
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[7:0] read byte
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dsksync - sync word
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transfer: dskptr += 2; size -= 1;
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DMA write: last 3 bits lost
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DMA read: last word may not be read, single byte read: always ok (?), (implemented: always all words read)
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80 cylinders/160 tracks
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Track: gap (nulls) | 11 sectors
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272 |
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Sector MFM encoded:
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odd bits of segment, even bits of segment
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encoding: data -> MFM
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277 |
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1 -> 01
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278 |
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280 |
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MFM sync mark value: $4489
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281 |
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282 |
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checksum: simple XOR
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*/
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284 |
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/* vga_eth_capture notes:
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286 |
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Send UDP packet:
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288 |
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ethernet
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289 |
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dest mac(6), src mac(6), type(2 = 0x0800 IPv4)
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ip
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version,header([1] = 0x45), tos([1] = 0x00), length([2] = 4*5 + 4*2 + len = 990 = 0x03DE)
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id([2] = 0x0000), flags,offset([2] = 0x40, 0x00)
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ttl([1] = 0x0F), protocol([1] = 0x11), header checksum([2] = 0)
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source ip([4])
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dest ip([4])
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udp
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source port([2]), dest port([2])
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length([2] = 8 + len = 970 = 0x03CA), checksum([2] = 0)
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data
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(len = line num(2) + line(640*12/8 = 960) = 962)
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301 |
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--full ethernet packet len = 990 + 14 = 1004 = 0x03EC
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DM9000A control to send:
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305 |
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set IMR(FFh = 0x80)
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306 |
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307 |
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set checksum reg (31h = 0x05)
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308 |
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set early transmit (30h = 0x83) ? threshold 75%
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power-up PHY (1Fh = 0x00)
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312 |
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313 |
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dummy MWCDM ?
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314 |
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315 |
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DO
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316 |
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317 |
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packet I
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318 |
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set MWCMD(F8h = 16-bit data)
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319 |
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320 |
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wait for packet II
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321 |
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read TX(02h bit 0 == 0)
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322 |
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323 |
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set TXPLL(FCh = low byte)
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324 |
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set TXPLH(FDh = high byte)
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325 |
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326 |
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write TX(02h 0x01)
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327 |
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328 |
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packet II
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329 |
|
|
set MWCMD(F8h = 16-bit data)
|
330 |
|
|
|
331 |
|
|
wait for packet I
|
332 |
|
|
read TX(02h bit 0 == 0)
|
333 |
|
|
|
334 |
|
|
set TXPLL(FCh = low byte)
|
335 |
|
|
set TXPLH(FDh = high byte)
|
336 |
|
|
|
337 |
|
|
write TX(02h 0x01)
|
338 |
|
|
|
339 |
|
|
LOOP
|
340 |
|
|
*/
|
341 |
|
|
|
342 |
|
|
/* bus_terminator notes:
|
343 |
|
|
32'h00E80000 --> from PC: 0x00FC503A
|
344 |
|
|
problem: PC: 0x00FCAC04, access: 0 ? -> read from ocs_video -> solved
|
345 |
|
|
problem: PC: 0x00FE9318, access: 0 ?
|
346 |
|
|
32'h00DFF0A4
|
347 |
|
|
32'h00DFF008
|
348 |
|
|
32'h00DFF034
|
349 |
|
|
32'h00DFF014
|
350 |
|
|
32'h00DFF0FC
|
351 |
|
|
32'h00dc003c rtc
|
352 |
|
|
32'h00d8003c rtc ?
|
353 |
|
|
32'hFFFFFFFC at PC: 0x00FF5A10, while LoadWB - also in uae: 0+0xFFFFFFFF -> in 24-bit addressing ok,
|
354 |
|
|
but in 32-bit addressing not ok
|
355 |
|
|
*/
|
356 |
|
|
|
357 |
|
|
/* cia8520 notes:
|
358 |
|
|
- name: 8520(1MHz, A - 2MHz, both used in different Amiga models)
|
359 |
|
|
- clock input: 0.709379 Mhz
|
360 |
|
|
- peripheral interfacing:
|
361 |
|
|
- serial I/O: internal bidirectional 8-bit shift-register
|
362 |
|
|
- input: clocked with external source
|
363 |
|
|
- output: clocked with internal timer
|
364 |
|
|
- interrupt generated when transfer completed
|
365 |
|
|
- parallel I/O: 2x 8-bit, each line: input or output, read always returned current state
|
366 |
|
|
- two control lines: /FLAG, /PAGE coordinated multiple CIA + parallel I/O: for Centronics Port
|
367 |
|
|
- system timers
|
368 |
|
|
- 2 programmable interval timers with submicrosecond precision
|
369 |
|
|
- can take input from external input: CNT
|
370 |
|
|
- each timer has a:
|
371 |
|
|
- 16-bit read-only register: down counter
|
372 |
|
|
- 16-bit write-only latch
|
373 |
|
|
- at underflow: interrupt and/or gated to second I/O port: PB6(timer A),PB7(timer B), overrides direction
|
374 |
|
|
- modes: once, continuous
|
375 |
|
|
- Time-of-Day clock:
|
376 |
|
|
- 1 read/write 24-bit binary counter: read: read stop MSB, read continue LSB, write: stop MSB(?), start LSB
|
377 |
|
|
- after reset: 1:00:00.0 (from 6526)
|
378 |
|
|
- alarm clock: interrupt at given time
|
379 |
|
|
- write only
|
380 |
|
|
- at same address as TOD, selected by control bit
|
381 |
|
|
- output: pulse pin
|
382 |
|
|
- input: edge detection
|
383 |
|
|
- CIA-B: even: 0: floppy control, serial control, some parallel port status
|
384 |
|
|
- CIA-A: odd: 1: parallel port, keyboard, some floppy support, joystick and mouse buttons
|
385 |
|
|
|
386 |
|
|
Diffrences:
|
387 |
|
|
Timer A,B: CNT transitions: not transitions but pulses: as cnt_i == 1'b0
|
388 |
|
|
pc_n == 1'b0 one cycle after port B access, not 3 cycles.
|
389 |
|
|
serial output cnt_o
|
390 |
|
|
*/
|
391 |
|
|
|
392 |
|
|
/*
|
393 |
|
|
Low-Pass filter: LED-filter
|
394 |
|
|
- analog filter
|
395 |
|
|
- external to Paula
|
396 |
|
|
- 12 dB/octet Butterworth low-pass filter at 3.3 kHz
|
397 |
|
|
- applied globally to all 4 channels
|
398 |
|
|
|
399 |
|
|
Static low-pass filter: models before Amiga 1200
|
400 |
|
|
- static "tone knob" type low-pass filter
|
401 |
|
|
- enabled regardless of the optional LED-filter
|
402 |
|
|
- 6 dB/octet low-passfilter with cut-off at 4.5 kHz or 5 kHz
|
403 |
|
|
*/
|
404 |
|
|
|
405 |
|
|
/*
|
406 |
|
|
Gary: A500,A2000,CDTV
|
407 |
|
|
- glue logic for bus control
|
408 |
|
|
- support functions for floppy drive
|
409 |
|
|
*/
|
410 |
|
|
|
411 |
|
|
/* ECS only
|
412 |
|
|
Agnus
|
413 |
|
|
BLTCON0L ~05A W A( E!) Blitter control 0, lower 8 bits (minterms)
|
414 |
|
|
BLTSIZV ~05C W A( E!) Blitter V size (for 15 bit vertical size)
|
415 |
|
|
BLTSIZH ~05E W A( E!) Blitter H size and start (for 11 bit H size)
|
416 |
|
|
SPRHDAT ~078 W A( E!) Ext. logic UHRES sprite pointer and data id
|
417 |
|
|
HTOTAL 1C0 W A( E!) Highest number count, horiz line (VARBEAMEN=1)
|
418 |
|
|
HSSTOP 1C2 W A( E!) Horizontal line position for HSYNC stop
|
419 |
|
|
HBSTRT 1C4 W A( E!) Horizontal line position for HBLANK start
|
420 |
|
|
HBSTOP 1C6 W A( E!) Horizontal line position for HBLANK stop
|
421 |
|
|
VTOTAL 1C8 W A( E!) Highest numbered vertical line (VARBEAMEN=1)
|
422 |
|
|
VSSTOP 1CA W A( E!) Vertical line position for VSYNC stop
|
423 |
|
|
VBSTRT 1CC W A( E!) Vertical line for VBLANK start
|
424 |
|
|
VBSTOP 1CE W A( E!) Vertical line for VBLANK stop
|
425 |
|
|
BEAMCON0 1DC W A( E!) Beam counter control register (SHRES,PAL)
|
426 |
|
|
HSSTRT 1DE W A( E!) Horizontal sync start (VARHSY)
|
427 |
|
|
VSSTRT 1E0 W A( E!) Vertical sync start (VARVSY)
|
428 |
|
|
HCENTER 1E2 W A( E!) Horizontal position for Vsync on interlace
|
429 |
|
|
Denise
|
430 |
|
|
DENISEID ~07C R D( E!) Chip revision level for Denise (video out chip)
|
431 |
|
|
BPLCON3 106 W D( E!) Bitplane control (enhanced features)
|
432 |
|
|
DIWHIGH 1E4 W AD( E!) Display window - upper bits for start, stop
|
433 |
|
|
*/
|
434 |
|
|
|
435 |
|
|
/* From operations:
|
436 |
|
|
* Setting up the core
|
437 |
|
|
*
|
438 |
|
|
* Resetting the core
|
439 |
|
|
*
|
440 |
|
|
* Modes and states
|
441 |
|
|
*/
|