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[/] [apb_mstr/] [trunk/] [src/] [base/] [def_apb_master_static.txt] - Blame information for rev 3
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<##//////////////////////////////////////////////////////////////////
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//// ////
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//// Author: Eyal Hochberg ////
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//// eyal@provartec.com ////
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//// ////
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//// Downloaded from: http://www.opencores.org ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2010 Provartec LTD ////
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//// www.provartec.com ////
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//// info@provartec.com ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation.////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more////
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//// details. http://www.gnu.org/licenses/lgpl.html ////
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//// ////
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//////////////////////////////////////////////////////////////////##>
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INCLUDE def_axi_master.txt
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SWAP.GLOBAL DATA_BITS 32 ##AXI and APB data bits
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SWAP.GLOBAL ID_NUM 1 ##Number of IDs (internal masters)
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SWAP.GLOBAL ID0_VAL ID_BITS'b0000 ##AXI ID0
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GROUP STUB_AXI_A overrides {
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ID ID_BITS output
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ADDR ADDR_BITS output
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LEN LEN_BITS output
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SIZE SIZE_BITS output
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VALID 1 output
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READY 1 input
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}
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