OpenCores
URL https://opencores.org/ocsvn/apbtoaes128/apbtoaes128/trunk

Subversion Repositories apbtoaes128

[/] [apbtoaes128/] [trunk/] [pli/] [aes_bfm_wr.h] - Blame information for rev 15

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 4 redbear
//////////////////////////////////////////////////////////////////
2
////
3
////
4
////    AES CORE BLOCK
5
////
6
////
7
////
8
//// This file is part of the APB to AES128 project
9
////
10
//// http://www.opencores.org/cores/apbtoaes128/
11
////
12
////
13
////
14
//// Description
15
////
16
//// Implementation of APB IP core according to
17
////
18
//// aes128_spec IP core specification document.
19
////
20
////
21
////
22
//// To Do: Things are right here but always all block can suffer changes
23
////
24
////
25
////
26
////
27
////
28
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
29
////
30
///////////////////////////////////////////////////////////////// 
31
////
32
////
33
//// Copyright (C) 2009 Authors and OPENCORES.ORG
34
////
35
////
36
////
37
//// This source file may be used and distributed without
38
////
39
//// restriction provided that this copyright statement is not
40
////
41
//// removed from the file and that any derivative work contains
42
//// the original copyright notice and the associated disclaimer.
43
////
44
////
45
//// This source file is free software; you can redistribute it
46
////
47
//// and/or modify it under the terms of the GNU Lesser General
48
////
49
//// Public License as published by the Free Software Foundation;
50
//// either version 2.1 of the License, or (at your option) any
51
////
52
//// later version.
53
////
54
////
55
////
56
//// This source is distributed in the hope that it will be
57
////
58
//// useful, but WITHOUT ANY WARRANTY; without even the implied
59
////
60
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
61
////
62
//// PURPOSE. See the GNU Lesser General Public License for more
63
//// details.
64
////
65
////
66
////
67
//// You should have received a copy of the GNU Lesser General
68
////
69
//// Public License along with this source; if not, download it
70
////
71
//// from http://www.opencores.org/lgpl.shtml
72
////
73
////
74
///////////////////////////////////////////////////////////////////
75
static int aes_bfm_wr_calltf(char*user_data)
76
{
77
 
78
        vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
79
        vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
80
        vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
81
        vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
82
        vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
83
        vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
84
        vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
85
        vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
86
        vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
87
        vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
88
        vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
89
        vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
90
        vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
91
 
92
        v_wr.format=vpiIntVal;
93
 
94
 
95
        std::random_device rd;
96
        std::uniform_int_distribution<long int> data_in(0,4294967295);
97
 
98
 
99
        v_wr.format=vpiIntVal;
100
        vpi_get_value(PRESETn, &v_wr);
101
 
102
 
103
        if(type_bfm == AES_WR_ONLY && v_wr.value.integer == 1)
104
        {
105
 
106
                //printf("%i\n",STATE);
107
 
108
                switch(STATE)
109
                {
110
 
111
                        case IDLE:
112
 
113
 
114
                                if(PACKETS_GENERATED >= MAX_ITERATIONS)
115
                                {
116
                                        STATE = IDLE;
117
                                        type_bfm = 0;
118
 
119
                                }else
120
                                {
121
                                        STATE = WRITE;
122
 
123 9 redbear
                                        counter = 1;
124 4 redbear
 
125 9 redbear
                                        //v_wr.value.integer = vector_address[0];
126
                                        //vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
127 4 redbear
 
128 9 redbear
                                        //v_wr.value.integer = 4094;
129
                                        //vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
130 4 redbear
 
131
                                        v_wr.value.integer = 1;
132
                                        vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
133
 
134
                                        v_wr.value.integer = 1;
135
                                        vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
136
                                }
137
 
138
 
139
 
140
                        break;
141
 
142
                        case WRITE:
143
 
144
 
145
 
146 9 redbear
                        v_wr.value.integer = 1;
147
                        vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
148 4 redbear
 
149 9 redbear
                        if(counter == 0)
150
                        {
151
                                counter_write++;
152
                                counter++;
153 4 redbear
 
154 9 redbear
                                v_wr.value.integer = 1;
155
                                vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
156 4 redbear
 
157
 
158 9 redbear
                        }else if(counter == 1)
159
                        {
160 4 redbear
 
161
 
162 9 redbear
 
163
                                t_wr.type = vpiScaledRealTime;
164
                                t_wr.real = 0;
165
                                v_wr.format=vpiIntVal;
166
 
167
                                v_wr.value.integer = 0;
168
                                vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
169
 
170
 
171
                                if(counter_write < 9)
172
                                {
173
 
174
                                        v_wr.value.integer = vector_address[counter_write];
175
                                        vpi_put_value(PADDR, &v_wr, &t_wr, vpiTransportDelay);
176
 
177 4 redbear
                                        if(FIPS_ENABLE == FIPS)
178
                                        {
179
 
180
                                                if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
181
                                                {
182
                                                        a = a | KEY_FIPS_NOT_DERIVATED[0];
183
                                                        a = a << 8;
184
                                                        a = a | KEY_FIPS_NOT_DERIVATED[1];
185
                                                        a = a << 8;
186
                                                        a = a | KEY_FIPS_NOT_DERIVATED[2];
187
                                                        a = a << 8;
188
                                                        a = a | KEY_FIPS_NOT_DERIVATED[3];
189
                                                        v_wr.value.integer = a;
190
                                                }
191
 
192
 
193
                                                if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
194
                                                {
195
                                                        b = b | KEY_FIPS_NOT_DERIVATED[4];
196
                                                        b = b << 8;
197
                                                        b = b | KEY_FIPS_NOT_DERIVATED[5];
198
                                                        b = b << 8;
199
                                                        b = b | KEY_FIPS_NOT_DERIVATED[6];
200
                                                        b = b << 8;
201
                                                        b = b | KEY_FIPS_NOT_DERIVATED[7];
202
                                                        v_wr.value.integer = b;
203
                                                }
204
 
205
                                                if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
206 9 redbear
                                                {
207 4 redbear
 
208
                                                        c = c | KEY_FIPS_NOT_DERIVATED[8];
209
                                                        c = c << 8;
210
                                                        c = c | KEY_FIPS_NOT_DERIVATED[9];
211
                                                        c = c << 8;
212
                                                        c = c | KEY_FIPS_NOT_DERIVATED[10];
213
                                                        c = c << 8;
214
                                                        c = c | KEY_FIPS_NOT_DERIVATED[11];
215
                                                        v_wr.value.integer = c;
216
 
217
                                                }
218
 
219
                                                if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
220
                                                {
221
                                                        d = d | KEY_FIPS_NOT_DERIVATED[12];
222
                                                        d = d << 8;
223
                                                        d = d | KEY_FIPS_NOT_DERIVATED[13];
224
                                                        d = d << 8;
225
                                                        d = d | KEY_FIPS_NOT_DERIVATED[14];
226
                                                        d = d << 8;
227
                                                        d = d | KEY_FIPS_NOT_DERIVATED[15];
228
                                                        v_wr.value.integer = d;
229
                                                }
230
 
231
 
232
 
233
                                        }else if(FIPS_ENABLE == RANDOM_DATA)
234
                                        {
235
                                                v_wr.value.integer = data_in(rd);
236 9 redbear
                                        }
237
 
238 4 redbear
                                        vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
239
 
240 9 redbear
 
241 4 redbear
                                        a = 0;
242
                                        b = 0;
243
                                        c = 0;
244
                                        d = 0;
245 9 redbear
 
246
 
247 4 redbear
 
248 9 redbear
                                }else if(counter_write == 9)//ENABLE CR
249
                                {
250 4 redbear
 
251 9 redbear
                                        v_wr.value.integer = vector_address[counter_write];
252
                                        vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
253
 
254
                                        v_wr.value.integer = 4094;
255
                                        vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
256
 
257
                                }else if(counter_write > 9  &&  counter_write < 14) //WRITE DINR
258
                                {
259
 
260
                                        v_wr.value.integer = ADDR_AES_DINR;
261
                                        vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
262
 
263
 
264
                                        if(FIPS_ENABLE == FIPS)
265
                                        {
266
 
267
                                                if(counter_write == 10)
268
                                                {
269
                                                        a = a | TEXT_FIPS_NOT_DERIVATED[0];
270
                                                        a = a << 8;
271
                                                        a = a | TEXT_FIPS_NOT_DERIVATED[1];
272
                                                        a = a << 8;
273
                                                        a = a | TEXT_FIPS_NOT_DERIVATED[2];
274
                                                        a = a << 8;
275
                                                        a = a | TEXT_FIPS_NOT_DERIVATED[3];
276
                                                        v_wr.value.integer = a;
277
 
278
                                                }else if(counter_write == 11)
279
                                                {
280
                                                        b = b | TEXT_FIPS_NOT_DERIVATED[4];
281
                                                        b = b << 8;
282
                                                        b = b | TEXT_FIPS_NOT_DERIVATED[5];
283
                                                        b = b << 8;
284
                                                        b = b | TEXT_FIPS_NOT_DERIVATED[6];
285
                                                        b = b << 8;
286
                                                        b = b | TEXT_FIPS_NOT_DERIVATED[7];
287
                                                        v_wr.value.integer = b;
288
 
289
                                                }else if(counter_write == 12 )
290
                                                {
291
 
292
                                                        c = c | TEXT_FIPS_NOT_DERIVATED[8];
293
                                                        c = c << 8;
294
                                                        c = c | TEXT_FIPS_NOT_DERIVATED[9];
295
                                                        c = c << 8;
296
                                                        c = c | TEXT_FIPS_NOT_DERIVATED[10];
297
                                                        c = c << 8;
298
                                                        c = c | TEXT_FIPS_NOT_DERIVATED[11];
299
                                                        v_wr.value.integer = c;
300
 
301
                                                }else if(counter_write == 13 )
302
                                                {
303
                                                        d = d | TEXT_FIPS_NOT_DERIVATED[12];
304
                                                        d = d << 8;
305
                                                        d = d | TEXT_FIPS_NOT_DERIVATED[13];
306
                                                        d = d << 8;
307
                                                        d = d | TEXT_FIPS_NOT_DERIVATED[14];
308
                                                        d = d << 8;
309
                                                        d = d | TEXT_FIPS_NOT_DERIVATED[15];
310
                                                        v_wr.value.integer = d;
311
 
312
                                                }
313
 
314
 
315
                                        }else if(FIPS_ENABLE == RANDOM_DATA)
316
                                        {
317
                                                v_wr.value.integer = data_in(rd);
318
                                        }
319
 
320
                                        vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
321
 
322
                                        a = 0;
323
                                        b = 0;
324
                                        c = 0;
325
                                        d = 0;
326
 
327
 
328
                                }
329 4 redbear
                                        counter=0;
330
 
331 9 redbear
                        }
332
 
333
 
334
 
335
                                if(counter_write == 14)
336 4 redbear
                                {
337
                                        counter_write = 0;
338 9 redbear
                                        STATE = WAIT;
339 4 redbear
                                }
340
 
341
 
342 9 redbear
 
343 4 redbear
                        break;
344
 
345
                        case WAIT:
346
 
347
                                v_wr.value.integer = 0;
348
                                vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
349
 
350
                                vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
351
 
352
                                vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
353
 
354
                                if(counter_wait == 5)
355
                                {
356
 
357
                                        STATE = READ_RESULTS;
358
                                        counter_wait=0;
359 9 redbear
                                        counter_read = 0;
360
                                        //v_wr.value.integer = ADDR_AES_DOUTR;
361
                                        //vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);        
362 4 redbear
 
363 9 redbear
                                        t_wr.type = vpiScaledRealTime;
364
                                        t_wr.real = 0;
365
                                        v_ecb.value.integer = ADDR_AES_DOUTR;
366
                                        vpi_put_value(PADDR, &v_wr, &t_wr, vpiTransportDelay);
367 4 redbear
 
368 9 redbear
                                        //v_wr.value.integer = 1;
369
                                        //vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);                                      
370
 
371
 
372 4 redbear
                                }else
373
                                {
374
 
375 9 redbear
                                        v_wr.value.integer = 0;
376
                                        vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
377 4 redbear
                                        counter_wait++;
378
 
379
                                }
380
                        break;
381
 
382
                        case READ_RESULTS:
383
 
384
 
385
 
386
                                if(counter == 0)
387
                                {
388
 
389
                                        v_wr.value.integer = 1;
390
                                        vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
391
 
392
                                        counter_read++;
393
                                        counter++;
394
 
395
                                }else if(counter == 1)
396
                                {
397
 
398
                                        v_wr.value.integer = 0;
399
                                        vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
400
 
401 9 redbear
                                        //v_wr.value.integer = 0;
402
                                        //vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
403 4 redbear
 
404 9 redbear
                                        //v_wr.value.integer = 1;
405
                                        //vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
406 4 redbear
 
407
 
408 9 redbear
                                        if(counter_read < 4)
409
                                        {
410
 
411
                                                v_wr.value.integer = ADDR_AES_DOUTR;
412
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
413
 
414
                                        }
415
 
416
 
417
                                        if(counter_read == 4)
418
                                        {
419
 
420
                                                v_wr.value.integer = ADDR_AES_KEYR3;
421
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
422
 
423
                                        }
424
 
425
 
426
                                        if(counter_read == 5)
427
                                        {
428
 
429
                                                v_wr.value.integer = ADDR_AES_KEYR2;
430
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
431
 
432
                                        }
433
 
434
 
435
 
436
                                        if(counter_read == 6)
437
                                        {
438
 
439
                                                v_wr.value.integer = ADDR_AES_KEYR1;
440
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
441
 
442
                                        }
443
 
444
 
445
                                        if(counter_read == 7)
446
                                        {
447
 
448
                                                v_wr.value.integer = ADDR_AES_KEYR0;
449
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
450
 
451
                                        }
452
 
453
 
454
                                        if(counter_read == 8)
455
                                        {
456
 
457
                                                v_wr.value.integer = ADDR_AES_IVR3;
458
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
459
 
460
                                        }
461
 
462
 
463
                                        if(counter_read == 9)
464
                                        {
465
 
466
                                                v_wr.value.integer = ADDR_AES_IVR2;
467
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
468
 
469
                                        }
470
 
471
 
472
 
473
                                        if(counter_read == 10)
474
                                        {
475
 
476
                                                v_wr.value.integer = ADDR_AES_IVR1;
477
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
478
 
479
                                        }
480
 
481
 
482
                                        if(counter_read == 11)
483
                                        {
484
 
485
                                                v_wr.value.integer = ADDR_AES_IVR0;
486
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
487
 
488
                                        }
489
 
490
 
491
 
492 4 redbear
                                        counter=0;
493
 
494 9 redbear
                                        if(counter_read == 12)
495
                                        {
496
                                                STATE = IDLE;
497
                                                counter_read = 0;
498
                                                PACKETS_GENERATED = PACKETS_GENERATED + 1;
499 4 redbear
 
500 9 redbear
                                                //v_wr.value.integer = 0;
501
                                                //vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
502 4 redbear
 
503 9 redbear
                                        }
504 4 redbear
 
505
                                }
506
 
507 9 redbear
 
508
 
509
 
510 4 redbear
                        break;
511
                }
512
 
513
 
514
 
515
        }
516
 
517
 
518
        return 0;
519
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.