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Subversion Repositories apbtoaes128

[/] [apbtoaes128/] [trunk/] [pli/] [random/] [aes_bfm_sufle.h] - Blame information for rev 18

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//////////////////////////////////////////////////////////////////
////
////
////    AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
///////////////////////////////////////////////////////////////// 
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
 
static int aes_bfm_sufle_calltf(char*user_data)
{
 
        vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
        vpiHandle PWDATA  = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
        vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
        vpiHandle PSEL    = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
        vpiHandle PWRITE  = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
        vpiHandle PADDR   = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
        vpiHandle PRDATA  = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
        vpiHandle PREADY  = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
        vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
        vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
        vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
        vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
        vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
        std::random_device rd;
        std::uniform_int_distribution<long int> data_in(0,4294967295);
 
        std::uniform_int_distribution<long int> register_config(0,232);
 
        v_ecb.format=vpiIntVal;
 
        vpi_get_value(PRESETn, &v_ecb);
 
        if(type_bfm == SUFLE_TEST && v_generate.value.integer == 1)
        {
 
                switch(STATE)
                {
 
                         case IDLE:
 
                                if(PACKETS_GENERATED >= MAX_ITERATIONS)
                                {
 
                                        STATE = IDLE;
                                        type_bfm = 0;
 
                                }else
                                {
                                        STATE = WRITE;
 
                                        counter = 0;
 
                                        v_ecb.value.integer = 0;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
                                        v_ecb.value.integer = vector_address[0];
                                        vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        v_ecb.value.integer = 0;
                                        vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
                                        v_ecb.value.integer = 1;
                                        vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
                                        v_ecb.value.integer = 1;
                                        vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
                                }
 
                         break;
                         case WRITE:
 
                                v_ecb.value.integer = 1;
                                vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
                                if(counter == 0)
                                {
                                        counter_write++;
                                        counter++;
 
                                        v_ecb.value.integer = 1;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
                                }else if(counter == 1)
                                {
 
                                        v_ecb.value.integer = 0;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
                                        t_ecb.type = vpiScaledRealTime;
                                        t_ecb.real = 0;
                                        v_ecb.format=vpiIntVal;
 
                                        if(counter_write < 9)
                                        {
                                                v_ecb.value.integer = vector_address[counter_write];
                                                vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
                                                v_ecb.value.integer = data_in(rd);
                                                vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
 
                                        }else if(counter_write == 9)
                                        {
                                                v_wr.value.integer = ADDR_AES_CR;
                                                vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
                                                last_cr = vector_CR[register_config(rd)];
                                                v_wr.value.integer = last_cr;
                                                vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
 
                                        }else if(counter_write > 9  &&  counter_write < 14)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_DINR;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
                                                v_ecb.value.integer = data_in(rd);
                                                vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
                                        }
 
                                        counter=0;
 
 
                                }
 
 
                                if(counter_write == 14)
                                {
                                        counter_write = 0;
                                        STATE = WAIT_SR;
                                }
 
                         break;
                         case WRITE_DINR:
 
 
                                v_ecb.value.integer = ADDR_AES_DINR;
                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
 
                                if(counter == 0)
                                {
 
 
 
                                        counter++;
                                        counter_write++;
 
                                        v_ecb.value.integer = 1;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
                                }else if(counter == 1)
                                {
                                        v_ecb.value.integer = 0;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
                                        v_ecb.value.integer = ADDR_AES_DINR;
                                        vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        v_ecb.value.integer = data_in(rd);
                                        vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
 
                                        counter=0;
                                }
 
                                if(counter_write == 4)
                                {
                                        counter_write = 0;
                                        STATE = WAIT_SR;
                                }
 
 
 
                         break;
                         case WAIT_SR:
 
                                v_ecb.value.integer = ADDR_AES_SR;
                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                v_ecb.value.integer = 0;
                                vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
 
                                if(counter == 0)
                                {
 
                                        counter++;
 
                                        v_ecb.value.integer = 1;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
                                        v_ecb.value.integer = 0;
                                        vpi_get_value(PRDATA,&v_ecb);
 
 
                                        if(v_ecb.value.integer == 1)
                                        {
                                                STATE = READ_DOUTR;
                                        }
 
 
                                }else if(counter == 1)
                                {
                                        v_ecb.value.integer = 0;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
                                        counter=0;
                                }
 
 
                         break;
                         case READ_DOUTR:
 
                                if(counter == 0)
                                {
 
                                        v_ecb.value.integer = 1;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
                                        counter_read++;
                                        counter++;
 
 
 
                                }else if(counter == 1)
                                {
                                        v_ecb.value.integer = 0;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
                                        if(counter_read < 4)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_DOUTR;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        }
 
 
                                        if(counter_read == 4)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_KEYR3;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        }
 
 
                                        if(counter_read == 5)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_KEYR2;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        }
 
 
 
                                        if(counter_read == 6)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_KEYR1;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        }
 
 
                                        if(counter_read == 7)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_KEYR0;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        }
 
 
                                        if(counter_read == 8)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_IVR3;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        }
 
 
                                        if(counter_read == 9)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_IVR2;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        }
 
 
 
                                        if(counter_read == 10)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_IVR1;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        }
 
 
                                        if(counter_read == 11)
                                        {
 
                                                v_ecb.value.integer = ADDR_AES_IVR0;
                                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                        }
 
 
                                        counter = 0;
                                }
 
                                if(counter_read == 12)
                                {
                                        STATE = RESET_SR;
                                        counter_read = 0;
                                }
 
 
                         break;
                         case RESET_SR:
 
                                v_ecb.value.integer = 1;
                                vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
                                v_ecb.value.integer = 1;
                                vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
                                v_ecb.value.integer = 0;
                                vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
                                v_ecb.value.integer = 128 + last_cr;
                                vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
                                if(counter == 0)
                                {
 
                                        counter_write++;
                                        counter++;
 
                                        v_ecb.value.integer = 1;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
                                }else if(counter == 1)
                                {
 
                                        v_ecb.value.integer = 0;
                                        vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
                                        counter=0;
 
                                }
 
                                if(counter_write == 1)
                                {
 
                                        counter_write = 0;
                                        counter=1;
 
                                        if( counter_sufle == MAX_ITERATION_PER_SUFLE)
                                        {
                                                PACKETS_GENERATED = PACKETS_GENERATED + 1;
                                                counter_sufle = 0 ;
                                                STATE =IDLE;
                                        }else
                                        {
                                                counter_sufle++;
                                                STATE =WRITE_DINR;
                                        }
                                }
 
                         break;
 
                }
 
 
        }
 
        return 0;
}

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Subversion Repositories apbtoaes128

[/] [apbtoaes128/] [trunk/] [pli/] [random/] [aes_bfm_sufle.h] - Blame information for rev 18

Line No.	Rev	Author	Line
1	13	redbear	`//////////////////////////////////////////////////////////////////`
2			`////`
3			`////`
4			`//// AES CORE BLOCK`
5			`////`
6			`////`
7			`////`
8			`//// This file is part of the APB to AES128 project`
9			`////`
10			`//// http://www.opencores.org/cores/apbtoaes128/`
11			`////`
12			`////`
13			`////`
14			`//// Description`
15			`////`
16			`//// Implementation of APB IP core according to`
17			`////`
18			`//// aes128_spec IP core specification document.`
19			`////`
20			`////`
21			`////`
22			`//// To Do: Things are right here but always all block can suffer changes`
23			`////`
24			`////`
25			`////`
26			`////`
27			`////`
28			`//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com`
29			`////`
30			`/////////////////////////////////////////////////////////////////`
31			`////`
32			`////`
33			`//// Copyright (C) 2009 Authors and OPENCORES.ORG`
34			`////`
35			`////`
36			`////`
37			`//// This source file may be used and distributed without`
38			`////`
39			`//// restriction provided that this copyright statement is not`
40			`////`
41			`//// removed from the file and that any derivative work contains`
42			`//// the original copyright notice and the associated disclaimer.`
43			`////`
44			`////`
45			`//// This source file is free software; you can redistribute it`
46			`////`
47			`//// and/or modify it under the terms of the GNU Lesser General`
48			`////`
49			`//// Public License as published by the Free Software Foundation;`
50			`//// either version 2.1 of the License, or (at your option) any`
51			`////`
52			`//// later version.`
53			`////`
54			`////`
55			`////`
56			`//// This source is distributed in the hope that it will be`
57			`////`
58			`//// useful, but WITHOUT ANY WARRANTY; without even the implied`
59			`////`
60			`//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR`
61			`////`
62			`//// PURPOSE. See the GNU Lesser General Public License for more`
63			`//// details.`
64			`////`
65			`////`
66			`////`
67			`//// You should have received a copy of the GNU Lesser General`
68			`////`
69			`//// Public License along with this source; if not, download it`
70			`////`
71			`//// from http://www.opencores.org/lgpl.shtml`
72			`////`
73			`////`
74			`///////////////////////////////////////////////////////////////////`
75
76			`static int aes_bfm_sufle_calltf(char*user_data)`
77			`{`
78
79			`vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);`
80	18	redbear	`vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);`
81			`vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);`
82			`vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);`
83			`vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);`
84			`vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);`
85			`vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);`
86			`vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);`
87			`vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);`
88			`vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);`
89			`vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);`
90			`vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);`
91			`vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);`
92	13	redbear
93	18	redbear	`std::random_device rd;`
94			`std::uniform_int_distribution<long int> data_in(0,4294967295);`
95	13	redbear
96	18	redbear	`std::uniform_int_distribution<long int> register_config(0,232);`
97
98			`v_ecb.format=vpiIntVal;`
99
100			`vpi_get_value(PRESETn, &v_ecb);`
101
102	13	redbear	`if(type_bfm == SUFLE_TEST && v_generate.value.integer == 1)`
103			`{`
104
105	18	redbear	`switch(STATE)`
106			`{`
107	13	redbear
108	18	redbear	`case IDLE:`
109
110			`if(PACKETS_GENERATED >= MAX_ITERATIONS)`
111			`{`
112
113			`STATE = IDLE;`
114			`type_bfm = 0;`
115
116			`}else`
117			`{`
118			`STATE = WRITE;`
119
120			`counter = 0;`
121
122			`v_ecb.value.integer = 0;`
123			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
124
125			`v_ecb.value.integer = vector_address[0];`
126			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
127
128			`v_ecb.value.integer = 0;`
129			`vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);`
130
131			`v_ecb.value.integer = 1;`
132			`vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);`
133
134			`v_ecb.value.integer = 1;`
135			`vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);`
136			`}`
137
138			`break;`
139			`case WRITE:`
140
141			`v_ecb.value.integer = 1;`
142			`vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);`
143
144			`if(counter == 0)`
145			`{`
146			`counter_write++;`
147			`counter++;`
148
149			`v_ecb.value.integer = 1;`
150			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
151
152
153			`}else if(counter == 1)`
154			`{`
155
156			`v_ecb.value.integer = 0;`
157			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
158
159			`t_ecb.type = vpiScaledRealTime;`
160			`t_ecb.real = 0;`
161			`v_ecb.format=vpiIntVal;`
162
163			`if(counter_write < 9)`
164			`{`
165			`v_ecb.value.integer = vector_address[counter_write];`
166			`vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);`
167			`v_ecb.value.integer = data_in(rd);`
168			`vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);`
169
170			`}else if(counter_write == 9)`
171			`{`
172			`v_wr.value.integer = ADDR_AES_CR;`
173			`vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);`
174			`last_cr = vector_CR[register_config(rd)];`
175			`v_wr.value.integer = last_cr;`
176			`vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);`
177
178			`}else if(counter_write > 9 && counter_write < 14)`
179			`{`
180
181			`v_ecb.value.integer = ADDR_AES_DINR;`
182			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
183			`v_ecb.value.integer = data_in(rd);`
184			`vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);`
185			`}`
186
187			`counter=0;`
188
189
190			`}`
191
192
193			`if(counter_write == 14)`
194			`{`
195			`counter_write = 0;`
196			`STATE = WAIT_SR;`
197			`}`
198
199			`break;`
200			`case WRITE_DINR:`
201
202
203			`v_ecb.value.integer = ADDR_AES_DINR;`
204			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
205
206
207
208			`if(counter == 0)`
209			`{`
210
211
212
213			`counter++;`
214			`counter_write++;`
215
216			`v_ecb.value.integer = 1;`
217			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
218
219
220			`}else if(counter == 1)`
221			`{`
222			`v_ecb.value.integer = 0;`
223			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
224
225			`v_ecb.value.integer = ADDR_AES_DINR;`
226			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
227
228			`v_ecb.value.integer = data_in(rd);`
229			`vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);`
230
231			`counter=0;`
232			`}`
233
234			`if(counter_write == 4)`
235			`{`
236			`counter_write = 0;`
237			`STATE = WAIT_SR;`
238			`}`
239
240
241
242			`break;`
243			`case WAIT_SR:`
244
245			`v_ecb.value.integer = ADDR_AES_SR;`
246			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
247
248			`v_ecb.value.integer = 0;`
249			`vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);`
250
251
252			`if(counter == 0)`
253			`{`
254
255			`counter++;`
256
257			`v_ecb.value.integer = 1;`
258			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
259
260
261			`v_ecb.value.integer = 0;`
262			`vpi_get_value(PRDATA,&v_ecb);`
263
264
265			`if(v_ecb.value.integer == 1)`
266			`{`
267			`STATE = READ_DOUTR;`
268			`}`
269
270
271			`}else if(counter == 1)`
272			`{`
273			`v_ecb.value.integer = 0;`
274			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
275
276			`counter=0;`
277			`}`
278
279
280			`break;`
281			`case READ_DOUTR:`
282
283			`if(counter == 0)`
284			`{`
285
286			`v_ecb.value.integer = 1;`
287			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
288
289			`counter_read++;`
290			`counter++;`
291
292
293
294			`}else if(counter == 1)`
295			`{`
296			`v_ecb.value.integer = 0;`
297			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
298
299
300			`if(counter_read < 4)`
301			`{`
302
303			`v_ecb.value.integer = ADDR_AES_DOUTR;`
304			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
305
306			`}`
307
308
309			`if(counter_read == 4)`
310			`{`
311
312			`v_ecb.value.integer = ADDR_AES_KEYR3;`
313			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
314
315			`}`
316
317
318			`if(counter_read == 5)`
319			`{`
320
321			`v_ecb.value.integer = ADDR_AES_KEYR2;`
322			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
323
324			`}`
325
326
327
328			`if(counter_read == 6)`
329			`{`
330
331			`v_ecb.value.integer = ADDR_AES_KEYR1;`
332			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
333
334			`}`
335
336
337			`if(counter_read == 7)`
338			`{`
339
340			`v_ecb.value.integer = ADDR_AES_KEYR0;`
341			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
342
343			`}`
344
345
346			`if(counter_read == 8)`
347			`{`
348
349			`v_ecb.value.integer = ADDR_AES_IVR3;`
350			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
351
352			`}`
353
354
355			`if(counter_read == 9)`
356			`{`
357
358			`v_ecb.value.integer = ADDR_AES_IVR2;`
359			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
360
361			`}`
362
363
364
365			`if(counter_read == 10)`
366			`{`
367
368			`v_ecb.value.integer = ADDR_AES_IVR1;`
369			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
370
371			`}`
372
373
374			`if(counter_read == 11)`
375			`{`
376
377			`v_ecb.value.integer = ADDR_AES_IVR0;`
378			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
379
380			`}`
381
382
383			`counter = 0;`
384			`}`
385
386			`if(counter_read == 12)`
387			`{`
388			`STATE = RESET_SR;`
389			`counter_read = 0;`
390			`}`
391
392
393			`break;`
394			`case RESET_SR:`
395
396			`v_ecb.value.integer = 1;`
397			`vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);`
398
399			`v_ecb.value.integer = 1;`
400			`vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);`
401
402			`v_ecb.value.integer = 0;`
403			`vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);`
404
405			`v_ecb.value.integer = 128 + last_cr;`
406			`vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);`
407
408
409			`if(counter == 0)`
410			`{`
411
412			`counter_write++;`
413			`counter++;`
414
415			`v_ecb.value.integer = 1;`
416			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
417
418			`}else if(counter == 1)`
419			`{`
420
421			`v_ecb.value.integer = 0;`
422			`vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);`
423			`counter=0;`
424
425			`}`
426
427			`if(counter_write == 1)`
428			`{`
429
430			`counter_write = 0;`
431			`counter=1;`
432
433			`if( counter_sufle == MAX_ITERATION_PER_SUFLE)`
434			`{`
435			`PACKETS_GENERATED = PACKETS_GENERATED + 1;`
436			`counter_sufle = 0 ;`
437			`STATE =IDLE;`
438			`}else`
439			`{`
440			`counter_sufle++;`
441			`STATE =WRITE_DINR;`
442			`}`
443			`}`
444
445			`break;`
446
447			`}`
448
449
450	13	redbear	`}`
451
452			`return 0;`
453			`}`