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[/] [apbtoaes128/] [trunk/] [rtl/] [control_unit.v] - Blame information for rev 5

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//////////////////////////////////////////////////////////////////
////
////
////    AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////              Julio Cesar 
////
///////////////////////////////////////////////////////////////// 
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
module control_unit
(
        output reg [ 2:0] sbox_sel,
        output reg [ 1:0] rk_sel,
        output reg [ 1:0] key_out_sel,
        output reg [ 1:0] col_sel,
        output reg [ 3:0] key_en,
        output reg [ 3:0] col_en,
        output     [ 3:0] round,
        output reg bypass_rk,
        output reg bypass_key_en,
        output reg key_sel,
        output reg iv_cnt_en,
        output reg iv_cnt_sel,
        output reg key_derivation_en,
        output reg end_comp,
        output key_init,
        output key_gen,
        output mode_ctr,
        output mode_cbc,
        output last_round,
  output encrypt_decrypt,
        input [1:0] operation_mode,
        input [1:0] aes_mode,
        input start,
        input disable_core,
        input clk,
        input rst_n
);
//`include "include/host_interface.vh"
//`include "include/control_unit_params.vh"
 
//=====================================================================================
// Memory Mapped Registers Address
//=====================================================================================
localparam AES_CR    = 4'd00;
localparam AES_SR    = 4'd01;
localparam AES_DINR  = 4'd02;
localparam AES_DOUTR = 4'd03;
localparam AES_KEYR0 = 4'd04;
localparam AES_KEYR1 = 4'd05;
localparam AES_KEYR2 = 4'd06;
localparam AES_KEYR3 = 4'd07;
localparam AES_IVR0  = 4'd08;
localparam AES_IVR1  = 4'd09;
localparam AES_IVR2  = 4'd10;
localparam AES_IVR3  = 4'd11;
 
//=============================================================================
// Operation Modes
//=============================================================================
localparam ENCRYPTION     = 2'b00;
localparam KEY_DERIVATION = 2'b01;
localparam DECRYPTION     = 2'b10;
localparam DECRYP_W_DERIV = 2'b11;
 
//=============================================================================
// AES Modes
//=============================================================================
localparam ECB = 2'b00;
localparam CBC = 2'b01;
localparam CTR = 2'b10;
 
//=============================================================================
// SBOX SEL
//=============================================================================
localparam COL_0 = 3'b000;
localparam COL_1 = 3'b001;
localparam COL_2 = 3'b010;
localparam COL_3 = 3'b011;
localparam G_FUNCTION = 3'b100;
 
//=============================================================================
// RK_SEL
//=============================================================================
localparam COL        = 2'b00;
localparam MIXCOL_IN  = 2'b01;
localparam MIXCOL_OUT = 2'b10;
 
//=============================================================================
// KEY_OUT_SEL
//=============================================================================
localparam KEY_0 = 2'b00;
localparam KEY_1 = 2'b01;
localparam KEY_2 = 2'b10;
localparam KEY_3 = 2'b11;
 
//=============================================================================
// COL_SEL
//=============================================================================
localparam SHIFT_ROWS = 2'b00;
localparam ADD_RK_OUT = 2'b01;
localparam INPUT      = 2'b10;
 
//=============================================================================
// KEY_SEL
//=============================================================================
localparam KEY_HOST = 1'b0;
localparam KEY_OUT  = 1'b1;
 
//=============================================================================
// KEY_EN
//=============================================================================
localparam KEY_DIS  = 4'b0000;
localparam EN_KEY_0 = 4'b0001;
localparam EN_KEY_1 = 4'b0010;
localparam EN_KEY_2 = 4'b0100;
localparam EN_KEY_3 = 4'b1000;
localparam KEY_ALL  = 4'b1111;
 
//=============================================================================
// COL_EN
//=============================================================================
localparam COL_DIS  = 4'b0000;
localparam EN_COL_0 = 4'b0001;
localparam EN_COL_1 = 4'b0010;
localparam EN_COL_2 = 4'b0100;
localparam EN_COL_3 = 4'b1000;
localparam COL_ALL  = 4'b1111;
 
//=============================================================================
// IV_CNT_SEL
//=============================================================================
localparam IV_CNT = 1'b1;
localparam IV_BUS = 1'b0;
 
//=============================================================================
// ENABLES
//=============================================================================
localparam ENABLE = 1'b1;
localparam DISABLE = 1'b0;
 
localparam NUMBER_ROUND      = 4'd10;
localparam NUMBER_ROUND_INC  = 4'd11;
localparam INITIAL_ROUND     = 4'd00;
 
//=============================================================================
// FSM STATES
//=============================================================================
localparam IDLE        = 4'd00;
localparam ROUND0_COL0 = 4'd01;
localparam ROUND0_COL1 = 4'd02;
localparam ROUND0_COL2 = 4'd03;
localparam ROUND0_COL3 = 4'd04;
localparam ROUND_KEY0  = 4'd05;
localparam ROUND_COL0  = 4'd06;
localparam ROUND_COL1  = 4'd07;
localparam ROUND_COL2  = 4'd08;
localparam ROUND_COL3  = 4'd09;
localparam READY       = 4'd10;
localparam GEN_KEY0    = 4'd11;
localparam GEN_KEY1    = 4'd12;
localparam GEN_KEY2    = 4'd13;
localparam GEN_KEY3    = 4'd14;
localparam NOP         = 4'd15;
 
reg [3:0] state, next_state;
reg [3:0] rd_count;
 
reg rd_count_en;
wire op_key_derivation;
wire first_round;
wire [1:0] op_mode;
 
// State Flops Definition
always @(posedge clk, negedge rst_n)
        begin
                if(!rst_n)
                        state <= IDLE;
                else
                        if(disable_core)
                                state <= IDLE;
                        else
                                state <= next_state;
        end
 
assign encrypt_decrypt = (op_mode == ENCRYPTION || op_mode == KEY_DERIVATION ||
                                                                                                                state == GEN_KEY0   ||   state == GEN_KEY1       ||
                                                                                                                state == GEN_KEY2   ||   state == GEN_KEY3       );
 
assign enc_dec = encrypt_decrypt | mode_ctr;
assign key_gen = (state == ROUND_KEY0);
 
assign op_key_derivation = (op_mode == KEY_DERIVATION);
 
assign mode_ctr = (aes_mode == CTR);
assign mode_cbc = (aes_mode == CBC);
 
assign key_init = start;
 
assign op_mode = (mode_ctr) ? ENCRYPTION : operation_mode;
 
// Next State Logic
always @(*)
        begin
                next_state = state;
                case(state)
                        IDLE:
                                begin
                                        if(!start)
                                                next_state = IDLE;
                                        else
                                                case(op_mode)
                                                        ENCRYPTION    : next_state = ROUND0_COL0;
                                                        DECRYPTION    : next_state = ROUND0_COL3;
                                                        KEY_DERIVATION: next_state = GEN_KEY0;
                                                        DECRYP_W_DERIV: next_state = GEN_KEY0;
                                                        default       : next_state = IDLE;
                                                endcase
                                end
                        ROUND0_COL0:
                                begin
                                        next_state = (enc_dec) ? ROUND0_COL1 : ROUND_KEY0;
                                end
                        ROUND0_COL1:
                                begin
                                        next_state = (enc_dec) ? ROUND0_COL2 : ROUND0_COL0;
                                end
                        ROUND0_COL2:
                                begin
                                        next_state = (enc_dec) ? ROUND0_COL3 : ROUND0_COL1;
                                end
                        ROUND0_COL3:
                                begin
                                        next_state = (enc_dec) ? ROUND_KEY0 : ROUND0_COL2;
                                end
                        ROUND_KEY0 :
                                begin
                                        if(!first_round)
                                                begin
                                                        next_state = (last_round) ? READY : NOP;
                                                end
                                        else
                                                begin
                                                        next_state = (enc_dec) ? ROUND_COL0 : ROUND_COL3;
                                                end
                                end
                        NOP        :
                                begin
                                        next_state = (enc_dec) ? ROUND_COL0 : ROUND_COL3;
                                end
                        ROUND_COL0 :
                                begin
                                        next_state = (enc_dec) ? ROUND_COL1 : ROUND_KEY0;
                                end
                        ROUND_COL1 :
                                begin
                                        next_state = (enc_dec) ? ROUND_COL2 : ROUND_COL0;
                                end
                        ROUND_COL2 :
                                begin
                                        next_state = (enc_dec) ? ROUND_COL3 : ROUND_COL1;
                                end
                        ROUND_COL3 :
                                begin
                                        if(last_round && enc_dec)
                                                next_state = READY;
                                        else
                                        next_state = (enc_dec) ? ROUND_KEY0 : ROUND_COL2;
                                end
                        GEN_KEY0   :
                                begin
                                        next_state = GEN_KEY1;
                                end
                        GEN_KEY1   :
                                begin
                                        next_state = GEN_KEY2;
                                end
                        GEN_KEY2   :
                                begin
                                        next_state = GEN_KEY3;
                                end
                        GEN_KEY3   :
                                begin
                                        if(last_round)
                                                next_state = (op_key_derivation) ? READY : ROUND0_COL3;
                                        else
                                                next_state = GEN_KEY0;
                                end
                        READY      :
                                begin
                                        next_state = IDLE;
                                end
                endcase
        end
 
 
// Output Logic
always @(*)
        begin
                sbox_sel = COL_0;
                rk_sel = COL;
                bypass_rk = DISABLE;
                key_out_sel = KEY_0;
                col_sel = INPUT;
                key_sel = KEY_HOST;
                key_en = KEY_DIS;
                col_en = COL_DIS;
                rd_count_en = DISABLE;
                iv_cnt_en = DISABLE;
                iv_cnt_sel = IV_BUS;
                bypass_key_en = DISABLE;
                key_derivation_en = DISABLE;
                end_comp = DISABLE;
                case(state)
                        ROUND0_COL0:
                                begin
                                        sbox_sel = COL_0;
                                        rk_sel   = COL;
                                        bypass_rk = ENABLE;
                                        bypass_key_en = ENABLE;
                                        key_out_sel = KEY_0;
                                        col_sel = (enc_dec) ? ADD_RK_OUT : SHIFT_ROWS;
                                        col_en =  (enc_dec) ? EN_COL_0 : COL_ALL;
                                end
                        ROUND0_COL1:
                                begin
                                        sbox_sel = COL_1;
                                        rk_sel   = COL;
                                        bypass_rk = ENABLE;
                                        bypass_key_en = ENABLE;
                                        key_out_sel = KEY_1;
                                        col_sel = ADD_RK_OUT;
                                        col_en = EN_COL_1;
                                        if(!enc_dec)
                                                begin
                                                        key_sel = KEY_OUT;
                                                        key_en =  EN_KEY_1;
                                                end
                                end
                        ROUND0_COL2:
                                begin
                                        sbox_sel = COL_2;
                                        rk_sel   = COL;
                                        bypass_rk = ENABLE;
                                        bypass_key_en = ENABLE;
                                        key_out_sel = KEY_2;
                                        col_sel = ADD_RK_OUT;
                                        col_en = EN_COL_2;
                                        if(!enc_dec)
                                                begin
                                                        key_sel = KEY_OUT;
                                                        key_en =  EN_KEY_2;
                                                end
                                end
                        ROUND0_COL3:
                                begin
                                        sbox_sel = COL_3;
                                        rk_sel   = COL;
                                        bypass_key_en = ENABLE;
                                        key_out_sel = KEY_3;
                                        col_sel = (enc_dec) ? SHIFT_ROWS : ADD_RK_OUT;
                                        col_en =  (enc_dec) ? COL_ALL : EN_COL_3;
                                        bypass_rk = ENABLE;
                                        if(!enc_dec)
                                                begin
                                                        key_sel = KEY_OUT;
                                                        key_en =  EN_KEY_3;
                                                end
                                end
                        ROUND_KEY0:
                                begin
                                        sbox_sel = G_FUNCTION;
                                        key_sel = KEY_OUT;
                                        key_en = EN_KEY_0;
                                        rd_count_en = ENABLE;
                                end
                        ROUND_COL0:
                                begin
                                        sbox_sel = COL_0;
                                        rk_sel = (last_round) ? MIXCOL_IN : MIXCOL_OUT;
                                        key_out_sel = KEY_0;
                                        key_sel = KEY_OUT;
                                        if(enc_dec)
                                                key_en = EN_KEY_1;
                                        if((mode_cbc && last_round && !enc_dec) || (mode_ctr && last_round))
                                                col_sel = INPUT;
                                        else
                                                begin
                                                        if(!enc_dec)
                                                                col_sel = (last_round) ? ADD_RK_OUT : SHIFT_ROWS;
                                                        else
                                                                col_sel = ADD_RK_OUT;
                                                end
                                        if(enc_dec)
                                                col_en = EN_COL_0;
                                        else
                                                col_en = (last_round) ? EN_COL_0 : COL_ALL;
                                end
                        ROUND_COL1:
                                begin
                                        sbox_sel = COL_1;
                                        rk_sel   = (last_round) ? MIXCOL_IN : MIXCOL_OUT;
                                        key_out_sel = KEY_1;
                                        key_sel = KEY_OUT;
                                        if(enc_dec)
                                                key_en = EN_KEY_2;
                                        else
                                                key_en = EN_KEY_1;
                                        if((mode_cbc && last_round && !enc_dec) || (mode_ctr && last_round))
                                                col_sel = INPUT;
                                        else
                                                col_sel = ADD_RK_OUT;
                                        col_en = EN_COL_1;
                                end
                        ROUND_COL2:
                                begin
                                        sbox_sel = COL_2;
                                        rk_sel   = (last_round) ? MIXCOL_IN : MIXCOL_OUT;
                                        key_out_sel = KEY_2;
                                        key_sel = KEY_OUT;
                                        if(enc_dec)
                                                key_en = EN_KEY_3;
                                        else
                                                key_en = EN_KEY_2;
                                        if((mode_cbc && last_round && !enc_dec) || (mode_ctr && last_round))
                                                col_sel = INPUT;
                                        else
                                                col_sel = ADD_RK_OUT;
                                        col_en = EN_COL_2;
                                end
                        ROUND_COL3:
                                begin
                                        sbox_sel = COL_3;
                                        rk_sel   = (last_round) ? MIXCOL_IN : MIXCOL_OUT;
                                        key_out_sel = KEY_3;
                                        key_sel = KEY_OUT;
                                        if(!enc_dec)
                                                key_en = EN_KEY_3;
                                        if((mode_cbc && last_round && !enc_dec) || (mode_ctr && last_round))
                                                col_sel = INPUT;
                                        else
                                                begin
                                                        if(enc_dec)
                                                                col_sel = (last_round) ? ADD_RK_OUT : SHIFT_ROWS;
                                                        else
                                                                col_sel = ADD_RK_OUT;
                                                end
                                        if(enc_dec)
                                                col_en = (last_round) ? EN_COL_3 : COL_ALL;
                                        else
                                                col_en = EN_COL_3;
                                        if(mode_ctr && last_round)
                                                begin
                                                        iv_cnt_en = ENABLE;
                                                        iv_cnt_sel = IV_CNT;
                                                end
                                end
                        GEN_KEY0:
                                begin
                                        sbox_sel = G_FUNCTION;
                                        rd_count_en = ENABLE;
                                end
                        GEN_KEY1:
                                begin
                                        key_en = EN_KEY_1 | EN_KEY_0; //Enable key 0 AND key 1
                                        key_sel = KEY_OUT;
                                        bypass_key_en = ENABLE;
                                end
                        GEN_KEY2:
                                begin
                                        key_en = EN_KEY_2;
                                        key_sel = KEY_OUT;
                                        bypass_key_en = ENABLE;
                                end
                        GEN_KEY3:
                                begin
                                        key_en = EN_KEY_3;
                                        key_sel = KEY_OUT;
                                        bypass_key_en = ENABLE;
                                end
                        READY:
                                begin
                                        end_comp = ENABLE;
                                        if(op_mode == KEY_DERIVATION)
                                                key_derivation_en = ENABLE;
                                end
                endcase
        end
 
// Round Counter
always @(posedge clk, negedge rst_n)
        begin
                if(!rst_n)
                        rd_count <= INITIAL_ROUND;
                else
                        if(state == IDLE || (state == GEN_KEY3 && last_round))
                                rd_count <= INITIAL_ROUND;
                        else
                                if(rd_count_en)
                                        rd_count <= rd_count + 1'b1;
        end
 
assign round = rd_count;
assign first_round = (rd_count == INITIAL_ROUND);
assign last_round  = (rd_count == NUMBER_ROUND || rd_count == NUMBER_ROUND_INC);
 
endmodule

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[/] [apbtoaes128/] [trunk/] [rtl/] [control_unit.v] - Blame information for rev 5

Line No.	Rev	Author	Line
1	2	redbear	`//////////////////////////////////////////////////////////////////`
2			`////`
3			`////`
4			`//// AES CORE BLOCK`
5			`////`
6			`////`
7			`////`
8	3	redbear	`//// This file is part of the APB to AES128 project`
9	2	redbear	`////`
10	3	redbear	`//// http://www.opencores.org/cores/apbtoaes128/`
11	2	redbear	`////`
12			`////`
13			`////`
14			`//// Description`
15			`////`
16			`//// Implementation of APB IP core according to`
17			`////`
18			`//// aes128_spec IP core specification document.`
19			`////`
20			`////`
21			`////`
22			`//// To Do: Things are right here but always all block can suffer changes`
23			`////`
24			`////`
25			`////`
26			`////`
27			`////`
28			`//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com`
29			`//// Julio Cesar`
30			`////`
31			`/////////////////////////////////////////////////////////////////`
32			`////`
33			`////`
34			`//// Copyright (C) 2009 Authors and OPENCORES.ORG`
35			`////`
36			`////`
37			`////`
38			`//// This source file may be used and distributed without`
39			`////`
40			`//// restriction provided that this copyright statement is not`
41			`////`
42			`//// removed from the file and that any derivative work contains`
43			`//// the original copyright notice and the associated disclaimer.`
44			`////`
45			`////`
46			`//// This source file is free software; you can redistribute it`
47			`////`
48			`//// and/or modify it under the terms of the GNU Lesser General`
49			`////`
50			`//// Public License as published by the Free Software Foundation;`
51			`//// either version 2.1 of the License, or (at your option) any`
52			`////`
53			`//// later version.`
54			`////`
55			`////`
56			`////`
57			`//// This source is distributed in the hope that it will be`
58			`////`
59			`//// useful, but WITHOUT ANY WARRANTY; without even the implied`
60			`////`
61			`//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR`
62			`////`
63			`//// PURPOSE. See the GNU Lesser General Public License for more`
64			`//// details.`
65			`////`
66			`////`
67			`////`
68			`//// You should have received a copy of the GNU Lesser General`
69			`////`
70			`//// Public License along with this source; if not, download it`
71			`////`
72			`//// from http://www.opencores.org/lgpl.shtml`
73			`////`
74			`////`
75			`///////////////////////////////////////////////////////////////////`
76			`module control_unit`
77			`(`
78			`output reg [ 2:0] sbox_sel,`
79			`output reg [ 1:0] rk_sel,`
80			`output reg [ 1:0] key_out_sel,`
81			`output reg [ 1:0] col_sel,`
82			`output reg [ 3:0] key_en,`
83			`output reg [ 3:0] col_en,`
84			`output [ 3:0] round,`
85			`output reg bypass_rk,`
86			`output reg bypass_key_en,`
87			`output reg key_sel,`
88			`output reg iv_cnt_en,`
89			`output reg iv_cnt_sel,`
90			`output reg key_derivation_en,`
91			`output reg end_comp,`
92			`output key_init,`
93			`output key_gen,`
94			`output mode_ctr,`
95			`output mode_cbc,`
96			`output last_round,`
97			`output encrypt_decrypt,`
98			`input [1:0] operation_mode,`
99			`input [1:0] aes_mode,`
100			`input start,`
101			`input disable_core,`
102			`input clk,`
103			`input rst_n`
104			`);`
105			//`include "include/host_interface.vh"
106			//`include "include/control_unit_params.vh"
107
108			`//=====================================================================================`
109			`// Memory Mapped Registers Address`
110			`//=====================================================================================`
111			`localparam AES_CR = 4'd00;`
112			`localparam AES_SR = 4'd01;`
113			`localparam AES_DINR = 4'd02;`
114			`localparam AES_DOUTR = 4'd03;`
115			`localparam AES_KEYR0 = 4'd04;`
116			`localparam AES_KEYR1 = 4'd05;`
117			`localparam AES_KEYR2 = 4'd06;`
118			`localparam AES_KEYR3 = 4'd07;`
119			`localparam AES_IVR0 = 4'd08;`
120			`localparam AES_IVR1 = 4'd09;`
121			`localparam AES_IVR2 = 4'd10;`
122			`localparam AES_IVR3 = 4'd11;`
123
124			`//=============================================================================`
125			`// Operation Modes`
126			`//=============================================================================`
127			`localparam ENCRYPTION = 2'b00;`
128			`localparam KEY_DERIVATION = 2'b01;`
129			`localparam DECRYPTION = 2'b10;`
130			`localparam DECRYP_W_DERIV = 2'b11;`
131
132			`//=============================================================================`
133			`// AES Modes`
134			`//=============================================================================`
135			`localparam ECB = 2'b00;`
136			`localparam CBC = 2'b01;`
137			`localparam CTR = 2'b10;`
138
139			`//=============================================================================`
140			`// SBOX SEL`
141			`//=============================================================================`
142			`localparam COL_0 = 3'b000;`
143			`localparam COL_1 = 3'b001;`
144			`localparam COL_2 = 3'b010;`
145			`localparam COL_3 = 3'b011;`
146			`localparam G_FUNCTION = 3'b100;`
147
148			`//=============================================================================`
149			`// RK_SEL`
150			`//=============================================================================`
151			`localparam COL = 2'b00;`
152			`localparam MIXCOL_IN = 2'b01;`
153			`localparam MIXCOL_OUT = 2'b10;`
154
155			`//=============================================================================`
156			`// KEY_OUT_SEL`
157			`//=============================================================================`
158			`localparam KEY_0 = 2'b00;`
159			`localparam KEY_1 = 2'b01;`
160			`localparam KEY_2 = 2'b10;`
161			`localparam KEY_3 = 2'b11;`
162
163			`//=============================================================================`
164			`// COL_SEL`
165			`//=============================================================================`
166			`localparam SHIFT_ROWS = 2'b00;`
167			`localparam ADD_RK_OUT = 2'b01;`
168			`localparam INPUT = 2'b10;`
169
170			`//=============================================================================`
171			`// KEY_SEL`
172			`//=============================================================================`
173			`localparam KEY_HOST = 1'b0;`
174			`localparam KEY_OUT = 1'b1;`
175
176			`//=============================================================================`
177			`// KEY_EN`
178			`//=============================================================================`
179			`localparam KEY_DIS = 4'b0000;`
180			`localparam EN_KEY_0 = 4'b0001;`
181			`localparam EN_KEY_1 = 4'b0010;`
182			`localparam EN_KEY_2 = 4'b0100;`
183			`localparam EN_KEY_3 = 4'b1000;`
184			`localparam KEY_ALL = 4'b1111;`
185
186			`//=============================================================================`
187			`// COL_EN`
188			`//=============================================================================`
189			`localparam COL_DIS = 4'b0000;`
190			`localparam EN_COL_0 = 4'b0001;`
191			`localparam EN_COL_1 = 4'b0010;`
192			`localparam EN_COL_2 = 4'b0100;`
193			`localparam EN_COL_3 = 4'b1000;`
194			`localparam COL_ALL = 4'b1111;`
195
196			`//=============================================================================`
197			`// IV_CNT_SEL`
198			`//=============================================================================`
199			`localparam IV_CNT = 1'b1;`
200			`localparam IV_BUS = 1'b0;`
201
202			`//=============================================================================`
203			`// ENABLES`
204			`//=============================================================================`
205			`localparam ENABLE = 1'b1;`
206			`localparam DISABLE = 1'b0;`
207
208			`localparam NUMBER_ROUND = 4'd10;`
209			`localparam NUMBER_ROUND_INC = 4'd11;`
210			`localparam INITIAL_ROUND = 4'd00;`
211
212			`//=============================================================================`
213			`// FSM STATES`
214			`//=============================================================================`
215			`localparam IDLE = 4'd00;`
216			`localparam ROUND0_COL0 = 4'd01;`
217			`localparam ROUND0_COL1 = 4'd02;`
218			`localparam ROUND0_COL2 = 4'd03;`
219			`localparam ROUND0_COL3 = 4'd04;`
220			`localparam ROUND_KEY0 = 4'd05;`
221			`localparam ROUND_COL0 = 4'd06;`
222			`localparam ROUND_COL1 = 4'd07;`
223			`localparam ROUND_COL2 = 4'd08;`
224			`localparam ROUND_COL3 = 4'd09;`
225			`localparam READY = 4'd10;`
226			`localparam GEN_KEY0 = 4'd11;`
227			`localparam GEN_KEY1 = 4'd12;`
228			`localparam GEN_KEY2 = 4'd13;`
229			`localparam GEN_KEY3 = 4'd14;`
230			`localparam NOP = 4'd15;`
231
232			`reg [3:0] state, next_state;`
233			`reg [3:0] rd_count;`
234
235			`reg rd_count_en;`
236			`wire op_key_derivation;`
237			`wire first_round;`
238			`wire [1:0] op_mode;`
239
240			`// State Flops Definition`
241			`always @(posedge clk, negedge rst_n)`
242			`begin`
243			`if(!rst_n)`
244			`state <= IDLE;`
245			`else`
246			`if(disable_core)`
247			`state <= IDLE;`
248			`else`
249			`state <= next_state;`
250			`end`
251
252			`assign encrypt_decrypt = (op_mode == ENCRYPTION \|\| op_mode == KEY_DERIVATION \|\|`
253			`state == GEN_KEY0 \|\| state == GEN_KEY1 \|\|`
254			`state == GEN_KEY2 \|\| state == GEN_KEY3 );`
255
256			`assign enc_dec = encrypt_decrypt \| mode_ctr;`
257			`assign key_gen = (state == ROUND_KEY0);`
258
259			`assign op_key_derivation = (op_mode == KEY_DERIVATION);`
260
261			`assign mode_ctr = (aes_mode == CTR);`
262			`assign mode_cbc = (aes_mode == CBC);`
263
264			`assign key_init = start;`
265
266			`assign op_mode = (mode_ctr) ? ENCRYPTION : operation_mode;`
267
268			`// Next State Logic`
269			`always @(*)`
270			`begin`
271			`next_state = state;`
272			`case(state)`
273			`IDLE:`
274			`begin`
275			`if(!start)`
276			`next_state = IDLE;`
277			`else`
278			`case(op_mode)`
279			`ENCRYPTION : next_state = ROUND0_COL0;`
280			`DECRYPTION : next_state = ROUND0_COL3;`
281			`KEY_DERIVATION: next_state = GEN_KEY0;`
282			`DECRYP_W_DERIV: next_state = GEN_KEY0;`
283			`default : next_state = IDLE;`
284			`endcase`
285			`end`
286			`ROUND0_COL0:`
287			`begin`
288			`next_state = (enc_dec) ? ROUND0_COL1 : ROUND_KEY0;`
289			`end`
290			`ROUND0_COL1:`
291			`begin`
292			`next_state = (enc_dec) ? ROUND0_COL2 : ROUND0_COL0;`
293			`end`
294			`ROUND0_COL2:`
295			`begin`
296			`next_state = (enc_dec) ? ROUND0_COL3 : ROUND0_COL1;`
297			`end`
298			`ROUND0_COL3:`
299			`begin`
300			`next_state = (enc_dec) ? ROUND_KEY0 : ROUND0_COL2;`
301			`end`
302			`ROUND_KEY0 :`
303			`begin`
304			`if(!first_round)`
305			`begin`
306			`next_state = (last_round) ? READY : NOP;`
307			`end`
308			`else`
309			`begin`
310			`next_state = (enc_dec) ? ROUND_COL0 : ROUND_COL3;`
311			`end`
312			`end`
313			`NOP :`
314			`begin`
315			`next_state = (enc_dec) ? ROUND_COL0 : ROUND_COL3;`
316			`end`
317			`ROUND_COL0 :`
318			`begin`
319			`next_state = (enc_dec) ? ROUND_COL1 : ROUND_KEY0;`
320			`end`
321			`ROUND_COL1 :`
322			`begin`
323			`next_state = (enc_dec) ? ROUND_COL2 : ROUND_COL0;`
324			`end`
325			`ROUND_COL2 :`
326			`begin`
327			`next_state = (enc_dec) ? ROUND_COL3 : ROUND_COL1;`
328			`end`
329			`ROUND_COL3 :`
330			`begin`
331			`if(last_round && enc_dec)`
332			`next_state = READY;`
333			`else`
334			`next_state = (enc_dec) ? ROUND_KEY0 : ROUND_COL2;`
335			`end`
336			`GEN_KEY0 :`
337			`begin`
338			`next_state = GEN_KEY1;`
339			`end`
340			`GEN_KEY1 :`
341			`begin`
342			`next_state = GEN_KEY2;`
343			`end`
344			`GEN_KEY2 :`
345			`begin`
346			`next_state = GEN_KEY3;`
347			`end`
348			`GEN_KEY3 :`
349			`begin`
350			`if(last_round)`
351			`next_state = (op_key_derivation) ? READY : ROUND0_COL3;`
352			`else`
353			`next_state = GEN_KEY0;`
354			`end`
355			`READY :`
356			`begin`
357			`next_state = IDLE;`
358			`end`
359			`endcase`
360			`end`
361
362
363			`// Output Logic`
364			`always @(*)`
365			`begin`
366			`sbox_sel = COL_0;`
367			`rk_sel = COL;`
368			`bypass_rk = DISABLE;`
369			`key_out_sel = KEY_0;`
370			`col_sel = INPUT;`
371			`key_sel = KEY_HOST;`
372			`key_en = KEY_DIS;`
373			`col_en = COL_DIS;`
374			`rd_count_en = DISABLE;`
375			`iv_cnt_en = DISABLE;`
376			`iv_cnt_sel = IV_BUS;`
377			`bypass_key_en = DISABLE;`
378			`key_derivation_en = DISABLE;`
379			`end_comp = DISABLE;`
380			`case(state)`
381			`ROUND0_COL0:`
382			`begin`
383			`sbox_sel = COL_0;`
384			`rk_sel = COL;`
385			`bypass_rk = ENABLE;`
386			`bypass_key_en = ENABLE;`
387			`key_out_sel = KEY_0;`
388			`col_sel = (enc_dec) ? ADD_RK_OUT : SHIFT_ROWS;`
389			`col_en = (enc_dec) ? EN_COL_0 : COL_ALL;`
390			`end`
391			`ROUND0_COL1:`
392			`begin`
393			`sbox_sel = COL_1;`
394			`rk_sel = COL;`
395			`bypass_rk = ENABLE;`
396			`bypass_key_en = ENABLE;`
397			`key_out_sel = KEY_1;`
398			`col_sel = ADD_RK_OUT;`
399			`col_en = EN_COL_1;`
400			`if(!enc_dec)`
401			`begin`
402			`key_sel = KEY_OUT;`
403			`key_en = EN_KEY_1;`
404			`end`
405			`end`
406			`ROUND0_COL2:`
407			`begin`
408			`sbox_sel = COL_2;`
409			`rk_sel = COL;`
410			`bypass_rk = ENABLE;`
411			`bypass_key_en = ENABLE;`
412			`key_out_sel = KEY_2;`
413			`col_sel = ADD_RK_OUT;`
414			`col_en = EN_COL_2;`
415			`if(!enc_dec)`
416			`begin`
417			`key_sel = KEY_OUT;`
418			`key_en = EN_KEY_2;`
419			`end`
420			`end`
421			`ROUND0_COL3:`
422			`begin`
423			`sbox_sel = COL_3;`
424			`rk_sel = COL;`
425			`bypass_key_en = ENABLE;`
426			`key_out_sel = KEY_3;`
427			`col_sel = (enc_dec) ? SHIFT_ROWS : ADD_RK_OUT;`
428			`col_en = (enc_dec) ? COL_ALL : EN_COL_3;`
429			`bypass_rk = ENABLE;`
430			`if(!enc_dec)`
431			`begin`
432			`key_sel = KEY_OUT;`
433			`key_en = EN_KEY_3;`
434			`end`
435			`end`
436			`ROUND_KEY0:`
437			`begin`
438			`sbox_sel = G_FUNCTION;`
439			`key_sel = KEY_OUT;`
440			`key_en = EN_KEY_0;`
441			`rd_count_en = ENABLE;`
442			`end`
443			`ROUND_COL0:`
444			`begin`
445			`sbox_sel = COL_0;`
446			`rk_sel = (last_round) ? MIXCOL_IN : MIXCOL_OUT;`
447			`key_out_sel = KEY_0;`
448			`key_sel = KEY_OUT;`
449			`if(enc_dec)`
450			`key_en = EN_KEY_1;`
451			`if((mode_cbc && last_round && !enc_dec) \|\| (mode_ctr && last_round))`
452			`col_sel = INPUT;`
453			`else`
454			`begin`
455			`if(!enc_dec)`
456			`col_sel = (last_round) ? ADD_RK_OUT : SHIFT_ROWS;`
457			`else`
458			`col_sel = ADD_RK_OUT;`
459			`end`
460			`if(enc_dec)`
461			`col_en = EN_COL_0;`
462			`else`
463			`col_en = (last_round) ? EN_COL_0 : COL_ALL;`
464			`end`
465			`ROUND_COL1:`
466			`begin`
467			`sbox_sel = COL_1;`
468			`rk_sel = (last_round) ? MIXCOL_IN : MIXCOL_OUT;`
469			`key_out_sel = KEY_1;`
470			`key_sel = KEY_OUT;`
471			`if(enc_dec)`
472			`key_en = EN_KEY_2;`
473			`else`
474			`key_en = EN_KEY_1;`
475			`if((mode_cbc && last_round && !enc_dec) \|\| (mode_ctr && last_round))`
476			`col_sel = INPUT;`
477			`else`
478			`col_sel = ADD_RK_OUT;`
479			`col_en = EN_COL_1;`
480			`end`
481			`ROUND_COL2:`
482			`begin`
483			`sbox_sel = COL_2;`
484			`rk_sel = (last_round) ? MIXCOL_IN : MIXCOL_OUT;`
485			`key_out_sel = KEY_2;`
486			`key_sel = KEY_OUT;`
487			`if(enc_dec)`
488			`key_en = EN_KEY_3;`
489			`else`
490			`key_en = EN_KEY_2;`
491			`if((mode_cbc && last_round && !enc_dec) \|\| (mode_ctr && last_round))`
492			`col_sel = INPUT;`
493			`else`
494			`col_sel = ADD_RK_OUT;`
495			`col_en = EN_COL_2;`
496			`end`
497			`ROUND_COL3:`
498			`begin`
499			`sbox_sel = COL_3;`
500			`rk_sel = (last_round) ? MIXCOL_IN : MIXCOL_OUT;`
501			`key_out_sel = KEY_3;`
502			`key_sel = KEY_OUT;`
503			`if(!enc_dec)`
504			`key_en = EN_KEY_3;`
505			`if((mode_cbc && last_round && !enc_dec) \|\| (mode_ctr && last_round))`
506			`col_sel = INPUT;`
507			`else`
508			`begin`
509			`if(enc_dec)`
510			`col_sel = (last_round) ? ADD_RK_OUT : SHIFT_ROWS;`
511			`else`
512			`col_sel = ADD_RK_OUT;`
513			`end`
514			`if(enc_dec)`
515			`col_en = (last_round) ? EN_COL_3 : COL_ALL;`
516			`else`
517			`col_en = EN_COL_3;`
518			`if(mode_ctr && last_round)`
519			`begin`
520			`iv_cnt_en = ENABLE;`
521			`iv_cnt_sel = IV_CNT;`
522			`end`
523			`end`
524			`GEN_KEY0:`
525			`begin`
526			`sbox_sel = G_FUNCTION;`
527			`rd_count_en = ENABLE;`
528			`end`
529			`GEN_KEY1:`
530			`begin`
531			`key_en = EN_KEY_1 \| EN_KEY_0; //Enable key 0 AND key 1`
532			`key_sel = KEY_OUT;`
533			`bypass_key_en = ENABLE;`
534			`end`
535			`GEN_KEY2:`
536			`begin`
537			`key_en = EN_KEY_2;`
538			`key_sel = KEY_OUT;`
539			`bypass_key_en = ENABLE;`
540			`end`
541			`GEN_KEY3:`
542			`begin`
543			`key_en = EN_KEY_3;`
544			`key_sel = KEY_OUT;`
545			`bypass_key_en = ENABLE;`
546			`end`
547			`READY:`
548			`begin`
549			`end_comp = ENABLE;`
550			`if(op_mode == KEY_DERIVATION)`
551			`key_derivation_en = ENABLE;`
552			`end`
553			`endcase`
554			`end`
555
556			`// Round Counter`
557			`always @(posedge clk, negedge rst_n)`
558			`begin`
559			`if(!rst_n)`
560			`rd_count <= INITIAL_ROUND;`
561			`else`
562			`if(state == IDLE \|\| (state == GEN_KEY3 && last_round))`
563			`rd_count <= INITIAL_ROUND;`
564			`else`
565			`if(rd_count_en)`
566			`rd_count <= rd_count + 1'b1;`
567			`end`
568
569			`assign round = rd_count;`
570			`assign first_round = (rd_count == INITIAL_ROUND);`
571			`assign last_round = (rd_count == NUMBER_ROUND \|\| rd_count == NUMBER_ROUND_INC);`
572
573			`endmodule`