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Bregalad |
-- This file is part of ARM4U CPU
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--
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-- This is a creation of the Laboratory of Processor Architecture
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-- of Ecole Polytechnique Fédérale de Lausanne ( http://lap.epfl.ch )
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--
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-- barrelshift.vhd -- Describes the barrel shifter inside the execute pipeline stage
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--
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-- Written By - Jonathan Masur and Xavier Jimenez (2013)
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--
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-- This program is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2, or (at your option) any
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-- later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- In other words, you are welcome to use, share and improve this program.
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-- You are forbidden to forbid anyone else to use, share and improve
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-- what you give them. Help stamp out software-hoarding!
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.arm_types.all;
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entity barrelshift is
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port(
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c : in std_logic;
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exe_barrelshift_operand : in std_logic;
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exe_barrelshift_type : in std_logic_vector(1 downto 0);
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exe_literal_shift_amnt : in std_logic_vector(4 downto 0);
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exe_literal_data : in std_logic_vector(23 downto 0);
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exe_opb_is_literal : in std_logic;
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op_b_data : in unsigned(31 downto 0);
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op_c_data : in unsigned(31 downto 0);
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barrelshift_c : out std_logic;
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barrelshift_out : out unsigned(31 downto 0)
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);
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end;
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-- Note : This architecture synthetizes poorly
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architecture rtl of barrelshift is
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begin
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-- barrel shifter
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barrelshift : process(exe_barrelshift_operand, exe_barrelshift_type, op_b_data, op_c_data, exe_opb_is_literal, exe_literal_shift_amnt, exe_literal_data, c) is
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variable shift_positions : integer range 0 to 31;
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variable shift_in : unsigned(31 downto 0);
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begin
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-- shift by register (opc)
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if exe_barrelshift_operand = '1'
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then
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shift_positions := to_integer(op_c_data(4 downto 0));
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else
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-- shift by literal value
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shift_positions := to_integer(unsigned(exe_literal_shift_amnt));
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end if;
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if exe_opb_is_literal = '1'
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then
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-- sign extend literal value
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shift_in := (31 downto 24 => exe_literal_data(23)) & unsigned(exe_literal_data);
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else
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shift_in := op_b_data;
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end if;
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case exe_barrelshift_type is
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-- LSR
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when "01" =>
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-- shift by register > 32 -> overflows, all bits are out
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if exe_barrelshift_operand = '1' and op_c_data(7 downto 0) > x"20"
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then
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barrelshift_out <= (others => '0');
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barrelshift_c <= '0';
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-- shift by register or literal, 32 positions
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elsif (exe_barrelshift_operand = '1' and op_c_data(7 downto 0) = x"20")
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or (exe_barrelshift_operand = '0' and exe_literal_shift_amnt = "00000")
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then
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barrelshift_out <= (others => '0');
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barrelshift_c <= shift_in(31);
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-- shift by register = 0, opb passes through and C is unaffected
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elsif exe_barrelshift_operand = '1' and op_c_data(7 downto 0) = x"00"
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then
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barrelshift_out <= shift_in;
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barrelshift_c <= c;
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-- shift by literal or register, range 1..31
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else
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barrelshift_out <= shift_in srl shift_positions;
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barrelshift_c <= shift_in(shift_positions - 1);
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end if;
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-- ASR
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when "10" =>
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-- shift by register or literal >= 32 -> overflows, all bits are the sign bit
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-- shift by register or literal, 32 positions
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if (exe_barrelshift_operand = '1' and op_c_data(7 downto 0) >= x"20")
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or (exe_barrelshift_operand = '0' and exe_literal_shift_amnt = "00000")
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then
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barrelshift_out <= (others => shift_in(31));
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barrelshift_c <= shift_in(31);
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-- shift by register = 0, opb passes through and C is unaffected
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elsif exe_barrelshift_operand = '1' and op_c_data(7 downto 0) = x"00"
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then
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barrelshift_out <= shift_in;
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barrelshift_c <= c;
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-- shift by literal or register, range 1..31
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else
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barrelshift_out <= unsigned(shift_right(signed(shift_in), shift_positions));
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barrelshift_c <= shift_in(shift_positions - 1);
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end if;
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-- ROR / RRX
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when "11" =>
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-- RRX - 33 bit rotation with carry
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if exe_barrelshift_operand = '0' and exe_literal_shift_amnt = "00000"
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then
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barrelshift_out <= c & shift_in(31 downto 1);
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barrelshift_c <= shift_in(0);
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-- ROR by register = 0, opb passes through and C is unaffected
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elsif exe_barrelshift_operand = '1' and op_c_data(7 downto 0) = x"00"
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then
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barrelshift_out <= shift_in;
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barrelshift_c <= c;
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-- ROR by register = 32, 64, etc.... opb passes through but C is affected
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elsif exe_barrelshift_operand = '1' and op_c_data(4 downto 0) = "00000"
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then
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barrelshift_out <= shift_in;
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barrelshift_c <= shift_in(31);
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-- ROR by literal or register, range 1..31 (if ROR by register, 33 => 1, 34 => 2, etc....)
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else
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barrelshift_out <= shift_in ror shift_positions;
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barrelshift_c <= shift_in(shift_positions - 1);
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end if;
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-- LSL
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when others => -- "00"
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-- shift by register > 32 -> overflows, all bits are out
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if exe_barrelshift_operand = '1' and op_c_data(7 downto 0) > x"20"
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then
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barrelshift_out <= (others => '0');
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barrelshift_c <= '0';
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-- shift by register = 32 positions
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elsif exe_barrelshift_operand = '1' and op_c_data(7 downto 0) = x"20"
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then
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barrelshift_out <= (others => '0');
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barrelshift_c <= shift_in(0);
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-- shift by register = 0 or literal = 0, opb passes through and C is unaffected
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elsif shift_positions = 0
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then
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barrelshift_out <= shift_in;
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barrelshift_c <= c;
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-- shift by literal or register, range 1..31
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else
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barrelshift_out <= shift_in sll shift_positions;
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barrelshift_c <= shift_in(32 - shift_positions);
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end if;
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end case;
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end process;
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end;
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-- optimized architecture expliciting all stages of the barrel shifter
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-- (individual shifters by power of 2 bits in series)
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-- synthetizes in something way better
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architecture optimized of barrelshift is
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signal shift_in : unsigned(31 downto 0);
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signal shift_amnt : unsigned(4 downto 0);
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signal stage1_dout, stage2_dout, stage3_dout, stage4_dout, stage5_dout : unsigned(31 downto 0);
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signal stage1_cout, stage2_cout, stage3_cout, stage4_cout, stage5_cout : std_logic;
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begin
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-- Barrelshifter made manually with 5 individual shift stages in series
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-- shift by 1 position
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stage1 : process(shift_in, c, shift_amnt, exe_barrelshift_type) is
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begin
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if shift_amnt(0) = '1'
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then
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case exe_barrelshift_type is
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when "00" => -- LSL #1
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stage1_dout <= shift_in(30 downto 0) & '0';
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stage1_cout <= shift_in(31);
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when "01" => -- LSR #1
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stage1_dout <= '0' & shift_in(31 downto 1);
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stage1_cout <= shift_in(0);
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when "10" => -- ASR #1
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stage1_dout <= shift_in(31) & shift_in(31 downto 1);
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stage1_cout <= shift_in(0);
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when others => -- ROR #1
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stage1_dout <= shift_in(0) & shift_in(31 downto 1);
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stage1_cout <= shift_in(0);
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end case;
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else
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stage1_dout <= shift_in;
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stage1_cout <= c;
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end if;
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end process;
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-- shift by 2 positions
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stage2 : process(stage1_dout, stage1_cout, shift_amnt, exe_barrelshift_type) is
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begin
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if shift_amnt(1) = '1'
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then
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case exe_barrelshift_type is
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when "00" => -- LSL #2
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stage2_dout <= stage1_dout(29 downto 0) & "00";
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stage2_cout <= stage1_dout(30);
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when "01" => -- LSR #2
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stage2_dout <= "00" & stage1_dout(31 downto 2);
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stage2_cout <= stage1_dout(1);
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when "10" => -- ASR #2
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stage2_dout <= (1 downto 0 => stage1_dout(31)) & stage1_dout(31 downto 2);
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stage2_cout <= stage1_dout(1);
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when others => -- ROR #2
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stage2_dout <= stage1_dout(1 downto 0) & stage1_dout(31 downto 2);
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stage2_cout <= stage1_dout(1);
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end case;
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else
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stage2_dout <= stage1_dout;
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stage2_cout <= stage1_cout;
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end if;
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end process;
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-- shift by 4 positions
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stage3 : process(stage2_dout, stage2_cout, shift_amnt, exe_barrelshift_type) is
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begin
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if shift_amnt(2) = '1'
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then
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case exe_barrelshift_type is
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when "00" => -- LSL #4
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stage3_dout <= stage2_dout(27 downto 0) & "0000";
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stage3_cout <= stage2_dout(28);
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when "01" => -- LSR #4
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stage3_dout <= "0000" & stage2_dout(31 downto 4);
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stage3_cout <= stage2_dout(3);
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when "10" => -- ASR #4
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stage3_dout <= (3 downto 0 => stage2_dout(31)) & stage2_dout(31 downto 4);
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stage3_cout <= stage2_dout(3);
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when others => -- ROR #4
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stage3_dout <= stage2_dout(3 downto 0) & stage2_dout(31 downto 4);
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stage3_cout <= stage2_dout(3);
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end case;
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else
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stage3_dout <= stage2_dout;
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stage3_cout <= stage2_cout;
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end if;
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end process;
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-- shift by 8 positions
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stage4 : process(stage3_dout, stage3_cout, shift_amnt, exe_barrelshift_type) is
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begin
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if shift_amnt(3) = '1'
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then
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case exe_barrelshift_type is
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when "00" => -- LSL #8
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stage4_dout <= stage3_dout(23 downto 0) & (7 downto 0 => '0');
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stage4_cout <= stage3_dout(24);
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when "01" => -- LSR #8
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stage4_dout <= (7 downto 0 => '0') & stage3_dout(31 downto 8);
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stage4_cout <= stage3_dout(7);
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when "10" => -- ASR #8
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stage4_dout <= (7 downto 0 => stage3_dout(31)) & stage3_dout(31 downto 8);
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stage4_cout <= stage3_dout(7);
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when others => -- ROR #8
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stage4_dout <= stage3_dout(7 downto 0) & stage3_dout(31 downto 8);
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stage4_cout <= stage3_dout(7);
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end case;
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else
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stage4_dout <= stage3_dout;
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stage4_cout <= stage3_cout;
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end if;
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end process;
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-- shift by 16 positions
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stage5 : process(stage4_dout, stage4_cout, shift_amnt, exe_barrelshift_type) is
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begin
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if shift_amnt(4) = '1'
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then
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case exe_barrelshift_type is
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when "00" => -- LSL #16
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stage5_dout <= stage4_dout(15 downto 0) & (15 downto 0 => '0');
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stage5_cout <= stage4_dout(15);
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when "01" => -- LSR #16
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stage5_dout <= (15 downto 0 => '0') & stage4_dout(31 downto 16);
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stage5_cout <= stage4_dout(15);
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when "10" => -- ASR #16
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stage5_dout <= (15 downto 0 => stage4_dout(31)) & stage4_dout(31 downto 16);
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stage5_cout <= stage4_dout(15);
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when others => -- ROR #16
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stage5_dout <= stage4_dout(15 downto 0) & stage4_dout(31 downto 16);
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stage5_cout <= stage4_dout(15);
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end case;
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else
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stage5_dout <= stage4_dout;
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stage5_cout <= stage4_cout;
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end if;
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end process;
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310 |
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311 |
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-- Barelshifter control logic
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312 |
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barrelshift : process(exe_barrelshift_operand, exe_barrelshift_type, op_b_data, op_c_data, exe_opb_is_literal,
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313 |
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exe_literal_shift_amnt, exe_literal_data, c, shift_in, stage5_dout, stage5_cout) is
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314 |
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begin
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315 |
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-- shift by register (opc)
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316 |
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if exe_barrelshift_operand = '1'
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317 |
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then
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318 |
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shift_amnt <= op_c_data(4 downto 0);
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else
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320 |
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-- shift by literal value
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321 |
|
|
shift_amnt <= unsigned(exe_literal_shift_amnt);
|
322 |
|
|
end if;
|
323 |
|
|
|
324 |
|
|
if exe_opb_is_literal = '1'
|
325 |
|
|
then
|
326 |
|
|
-- sign extend literal value
|
327 |
|
|
shift_in <= (31 downto 24 => exe_literal_data(23)) & unsigned(exe_literal_data);
|
328 |
|
|
else
|
329 |
|
|
shift_in <= op_b_data;
|
330 |
|
|
end if;
|
331 |
|
|
|
332 |
|
|
case exe_barrelshift_type is
|
333 |
|
|
-- LSL
|
334 |
|
|
when "00" =>
|
335 |
|
|
-- shift by register > 32 -> overflows, all bits are out
|
336 |
|
|
if exe_barrelshift_operand = '1' and op_c_data(7 downto 0) > x"20"
|
337 |
|
|
then
|
338 |
|
|
barrelshift_out <= (others => '0');
|
339 |
|
|
barrelshift_c <= '0';
|
340 |
|
|
|
341 |
|
|
-- shift by register = 32 positions
|
342 |
|
|
elsif exe_barrelshift_operand = '1' and op_c_data(7 downto 0) = x"20"
|
343 |
|
|
then
|
344 |
|
|
barrelshift_out <= (others => '0');
|
345 |
|
|
barrelshift_c <= shift_in(0);
|
346 |
|
|
|
347 |
|
|
-- shift by literal or register, range 0..31
|
348 |
|
|
else
|
349 |
|
|
barrelshift_out <= stage5_dout;
|
350 |
|
|
barrelshift_c <= stage5_cout;
|
351 |
|
|
end if;
|
352 |
|
|
|
353 |
|
|
-- LSR
|
354 |
|
|
when "01" =>
|
355 |
|
|
-- shift by register > 32 -> overflows, all bits are out
|
356 |
|
|
if exe_barrelshift_operand = '1' and op_c_data(7 downto 0) > x"20"
|
357 |
|
|
then
|
358 |
|
|
barrelshift_out <= (others => '0');
|
359 |
|
|
barrelshift_c <= '0';
|
360 |
|
|
|
361 |
|
|
-- shift by register or literal = 0, 32 positions
|
362 |
|
|
elsif (exe_barrelshift_operand = '1' and op_c_data(7 downto 0) = x"20")
|
363 |
|
|
or (exe_barrelshift_operand = '0' and exe_literal_shift_amnt = "00000")
|
364 |
|
|
then
|
365 |
|
|
barrelshift_out <= (others => '0');
|
366 |
|
|
barrelshift_c <= shift_in(31);
|
367 |
|
|
|
368 |
|
|
-- shift by literal or register, range 0..31
|
369 |
|
|
else
|
370 |
|
|
barrelshift_out <= stage5_dout;
|
371 |
|
|
barrelshift_c <= stage5_cout;
|
372 |
|
|
end if;
|
373 |
|
|
|
374 |
|
|
-- ASR
|
375 |
|
|
when "10" =>
|
376 |
|
|
-- shift by register >= 32 or literal = 0, 32 positions -> overflows, all bits are the sign bit
|
377 |
|
|
if (exe_barrelshift_operand = '1' and op_c_data(7 downto 0) >= x"20")
|
378 |
|
|
or (exe_barrelshift_operand = '0' and exe_literal_shift_amnt = "00000")
|
379 |
|
|
then
|
380 |
|
|
barrelshift_out <= (others => shift_in(31));
|
381 |
|
|
barrelshift_c <= shift_in(31);
|
382 |
|
|
|
383 |
|
|
-- shift by literal or register, range 0..31
|
384 |
|
|
else
|
385 |
|
|
barrelshift_out <= stage5_dout;
|
386 |
|
|
barrelshift_c <= stage5_cout;
|
387 |
|
|
end if;
|
388 |
|
|
|
389 |
|
|
-- ROR / RRX
|
390 |
|
|
when others => -- "11"
|
391 |
|
|
-- RRX - 33 bit rotation with carry
|
392 |
|
|
if exe_barrelshift_operand = '0' and exe_literal_shift_amnt = "00000"
|
393 |
|
|
then
|
394 |
|
|
barrelshift_out <= c & op_b_data(31 downto 1);
|
395 |
|
|
barrelshift_c <= shift_in(0);
|
396 |
|
|
|
397 |
|
|
-- ROR by register = 32, 64, etc.... opb passes through but C is affected
|
398 |
|
|
elsif exe_barrelshift_operand = '1' and op_c_data(4 downto 0) = "00000"
|
399 |
|
|
then
|
400 |
|
|
barrelshift_out <= stage5_dout;
|
401 |
|
|
barrelshift_c <= shift_in(31);
|
402 |
|
|
|
403 |
|
|
-- ROR by literal or register, range 0..31 (if ROR by register, 33 => 1, 34 => 2, etc....)
|
404 |
|
|
else
|
405 |
|
|
barrelshift_out <= stage5_dout;
|
406 |
|
|
barrelshift_c <= stage5_cout;
|
407 |
|
|
end if;
|
408 |
|
|
end case;
|
409 |
|
|
end process;
|
410 |
|
|
|
411 |
|
|
end;
|