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[/] [astron_multiplexer/] [trunk/] [common_multiplexer.vhd] - Blame information for rev 3

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-------------------------------------------------------------------------------
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--
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-- Copyright 2020
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-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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-- 
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-- Licensed under the Apache License, Version 2.0 (the "License");
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-- you may not use this file except in compliance with the License.
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-- You may obtain a copy of the License at
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-- 
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--     http://www.apache.org/licenses/LICENSE-2.0
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-- 
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-- Unless required by applicable law or agreed to in writing, software
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-- distributed under the License is distributed on an "AS IS" BASIS,
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-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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-- See the License for the specific language governing permissions and
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-- limitations under the License.
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--
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-------------------------------------------------------------------------------
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LIBRARY IEEE, common_pkg_lib, common_components_lib;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE common_pkg_lib.common_pkg.ALL;
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-- Purpose: Assign one of g_nof_in input streams to the output based on in_sel input
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-- Description: The input streams are concatenated into one SLV.
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-- Remarks:
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ENTITY common_multiplexer IS
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  GENERIC (
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    g_pipeline_in  : NATURAL := 0;
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    g_pipeline_out : NATURAL := 0;
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    g_nof_in       : NATURAL;
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    g_dat_w        : NATURAL
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 );
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  PORT (
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    clk         : IN  STD_LOGIC;
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    rst         : IN  STD_LOGIC;
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    in_sel      : IN  STD_LOGIC_VECTOR(ceil_log2(g_nof_in)-1 DOWNTO 0);
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    in_dat      : IN  STD_LOGIC_VECTOR(g_nof_in*g_dat_w-1 DOWNTO 0);
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    in_val      : IN  STD_LOGIC;
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    out_dat     : OUT STD_LOGIC_VECTOR(g_dat_w-1 DOWNTO 0);
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    out_val     : OUT STD_LOGIC
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  );
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END;
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ARCHITECTURE str OF common_multiplexer IS
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BEGIN
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  u_select_symbol : ENTITY common_components_lib.common_select_symbol
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  GENERIC MAP (
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    g_pipeline_in  => g_pipeline_in,
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    g_pipeline_out => g_pipeline_out,
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    g_nof_symbols  => g_nof_in,
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    g_symbol_w     => g_dat_w,
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    g_sel_w        => ceil_log2(g_nof_in)
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  )
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  PORT MAP (
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    rst        => rst,
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    clk        => clk,
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    in_data    => in_dat,
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    in_val     => in_val,
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    in_sel     => in_sel,
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    out_symbol => out_dat,
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    out_val    => out_val
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  );
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END str;

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