OpenCores
URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] [branches/] [init/] [common/] [src/] [tree_arb.v] - Blame information for rev 31

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 11 wsong0210
/*
2
 Asynchronous SDM NoC
3
 (C)2011 Wei Song
4
 Advanced Processor Technologies Group
5
 Computer Science, the Univ. of Manchester, UK
6
 
7
 Authors:
8
 Wei Song     wsong83@gmail.com
9
 
10
 License: LGPL 3.0 or later
11
 
12
 M-to-1 asynchronous tree arbiter.
13
 
14
 History:
15
 03/09/2009  Initial version. <wsong83@gmail.com>
16
 23/05/2011  Clean up for opensource. <wsong83@gmail.com>
17
 
18
*/
19
 
20
module tree_arb (/*AUTOARG*/
21
   // Outputs
22
   gnt,
23
   // Inputs
24
   req
25
   ) ;
26
 
27
   // parameters
28
   parameter MR = 2;                  // the number of request inputs
29
   localparam TrLev = mlog2(MR)-1;    // the number of levels of the tree
30
   input [MR-1:0]  req;               // the request input
31
   output [MR-1:0] gnt;               // the grant output
32
 
33
   // generate variables
34
   genvar          i, j, k;
35
 
36
   // internal wires
37
   wire [MR*2:0]   mreq;              // the internal request lines
38
   wire [MR*2:0]   mgnt;              // the internal gnt lines
39
   wire [1:0]       rgnt;              // the positive gnt of the root mutex
40
 
41
   // the hardware block
42
   generate
43
      if (MR == 1)              // special case: only one input
44
        begin: MA_1
45
           assign gnt = req;
46
        end
47
      else if(MR == 2)          // special case: only two input
48
        begin: MA_2
49 26 wsong0210
           mutex2 ME0 (
50 11 wsong0210
                      .a    ( req[0]    ),
51
                      .b    ( req[1]    ),
52
                      .qa   ( gnt[0]    ),
53
                      .qb   ( gnt[1]    )
54
                      );
55
        end
56
      else
57
        begin: MA_N
58
 
59 26 wsong0210
           mutex2 ME0 (
60 11 wsong0210
                      .a    ( mreq[0]   ),
61
                      .b    ( mreq[1]   ),
62
                      .qa   ( rgnt[0]   ),
63
                      .qb   ( rgnt[1]   )
64
                      );
65
 
66
           assign mgnt[1:0] = ~rgnt;
67
 
68
           for (i=1; 2**(i+1)<MR; i=i+1) begin: L
69
              for (j=0; j<2**i; j=j+1) begin: T
70
                 tarb TA (
71
                          .ngnt    ( mgnt[(2**i-1)*2+j*2+1:(2**i-1)*2+j*2]  ),
72
                          .ntgnt   ( mgnt[(2**(i-1)-1)*2+j]                 ),
73
                          .req     ( mreq[(2**i-1)*2+j*2+1:(2**i-1)*2+j*2]  ),
74
                          .treq    ( mreq[(2**(i-1)-1)*2+j]                 )
75
                          );
76
              end
77
           end
78
 
79
           for (j=0; j<MR-(2**TrLev); j=j+1) begin: LF
80
              tarb TA (
81
                       .ngnt    ( mgnt[(2**TrLev-1)*2+j*2+1:(2**TrLev-1)*2+j*2]  ),
82
                       .ntgnt   ( mgnt[(2**(TrLev-1)-1)*2+j]                     ),
83
                       .req     ( mreq[(2**TrLev-1)*2+j*2+1:(2**TrLev-1)*2+j*2]  ),
84
                       .treq    ( mreq[(2**(TrLev-1)-1)*2+j]                     )
85
                       );
86
           end
87
 
88
           assign gnt = ~(mgnt[2*MR-3:MR-2]);
89
           assign mreq[2*MR-3:MR-2] = req;
90
 
91
        end
92
   endgenerate
93
 
94
   // log_2 function
95
   function integer mlog2;
96
      input integer MR;
97
      begin
98
         for( mlog2 = 0; 2**mlog2<MR; mlog2=mlog2+1)
99
           begin
100
           end
101
      end
102
   endfunction // mlog2
103
 
104
endmodule // tree_arb
105
 
106
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.