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wsong0210 |
#!/bin/bash
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#
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# Asynchronous SDM NoC
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# (C)2011 Wei Song
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# Advanced Processor Technologies Group
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# Computer Science, the Univ. of Manchester, UK
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#
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# Authors:
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# Wei Song wsong83@gmail.com
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#
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# License: LGPL 3.0 or later
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#
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# The script to compile the SystemC/Verilog mixed NoC simulation
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#
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# History:
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# 29/05/2011 CLean up for opensource. <wsong83@gmail.com>
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#
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# make sure the LDVHOME environment is ready for NC-Simulator, IUS/LDV, Cadence
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export NCSC_GCC=${LDVHOME}/tools/systemc/gcc/bin/g++
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CXXFLAG="-c -g -Wall -I../../common/tb -I../tb -I../"
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# remove the files from last run
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rm -fr INCA_libs
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rm *.o
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wsong0210 |
rm *.so
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wsong0210 |
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# compile verilog files
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# cell library
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ncvlog -nowarn RECOMP ../../lib/NangateOpenCellLibrary_typical_conditional.v
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# synthesized design
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ncvlog ../syn/file/router_syn.v
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# other verilog test bench files
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ncvlog -incdir ../ ../../common/tb/anaproc.v
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ncvlog -sv -incdir ../ ../tb/rtwrapper.v
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ncvlog -incdir ../ ../tb/netnode.v
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ncvlog -sv -incdir ../ ../tb/noc_top.v
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ncvlog -sv -incdir ../ ../tb/node_top.v
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ncvlog ../tb/noctb.v
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#compile SystemC files
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ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../../common/tb/sim_ana.cpp
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ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../../common/tb/anaproc.cpp
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ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../tb/netnode.cpp
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ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../tb/ni.cpp
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ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../tb/rtdriver.cpp
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# build the run time link library
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${NCSC_GCC} -Wl -shared -o sysc.so -L${CDS_LNX86_ROOT}/ldv_2009_sc/tools/lib \
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sim_ana.o anaproc.o netnode.o ni.o rtdriver.o \
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${CDS_LNX86_ROOT}/ldv_2009_sc/tools/systemc/lib/gnu/libncscCoSim_sh.so \
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${CDS_LNX86_ROOT}/ldv_2009_sc/tools/systemc/lib/gnu/libncscCoroutines_sh.so \
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${CDS_LNX86_ROOT}/ldv_2009_sc/tools/systemc/lib/gnu/libsystemc_sh.so
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# elaborate the simulation
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ncelab -timescale 1ns/1ps -access +rwc -loadsc sysc.so worklib.noctb
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