URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] [trunk/] [vc/] [src/] [router.v] - Blame information for rev 50

Go to most recent revision | Details | Compare with Previous | View Log


/*
 Asynchronous SDM NoC
 (C)2011 Wei Song
 Advanced Processor Technologies Group
 Computer Science, the Univ. of Manchester, UK
 
 Authors:
 Wei Song     wsong83@gmail.com
 
 License: LGPL 3.0 or later
 
 Asynchronous VC router.
 
 History:
 05/04/2010  Initial version. <wsong83@gmail.com>
 02/06/2011  Clean up for opensource. <wsong83@gmail.com>
 
*/
 
module router (/*AUTOARG*/
   // Outputs
   sia, wia, nia, eia, lia, sic, wic, nic, eic, lic, so0, so1, so2,
   so3, wo0, wo1, wo2, wo3, no0, no1, no2, no3, eo0, eo1, eo2, eo3,
   lo0, lo1, lo2, lo3, soft, woft, noft, eoft, loft, sovc, wovc, novc,
   eovc, lovc, soca, woca, noca, eoca, loca,
   // Inputs
   si0, si1, si2, si3, wi0, wi1, wi2, wi3, ni0, ni1, ni2, ni3, ei0,
   ei1, ei2, ei3, li0, li1, li2, li3, sift, wift, nift, eift, lift,
   sivc, wivc, nivc, eivc, livc, sica, wica, nica, eica, lica, soa,
   woa, noa, eoa, loa, soc, woc, noc, eoc, loc, addrx, addry, rst_n
   );
 
   parameter VCN = 2;           // number of VCs per direction
   parameter DW = 32;           // data width of an input port
   parameter PD = 1;            // the depth of a input VC buffer
   parameter FT = 3;            // the number of flit types, currently 3 (HD, DATA, TAIL)
 
   parameter FCPD = PD;
   parameter SCN = DW/2;
 
   // input ports
   input [SCN-1:0]    si0, si1, si2, si3;
   input [SCN-1:0]    wi0, wi1, wi2, wi3;
   input [SCN-1:0]    ni0, ni1, ni2, ni3;
   input [SCN-1:0]    ei0, ei1, ei2, ei3;
   input [SCN-1:0]    li0, li1, li2, li3;
   input [FT-1:0]     sift, wift, nift, eift, lift;
   input [VCN-1:0]    sivc, wivc, nivc, eivc, livc;
   output             sia, wia, nia, eia, lia;
   output [VCN-1:0]   sic, wic, nic, eic, lic;
   input [VCN-1:0]    sica, wica, nica, eica, lica;
 
   // output ports
   output [SCN-1:0]   so0, so1, so2, so3;
   output [SCN-1:0]   wo0, wo1, wo2, wo3;
   output [SCN-1:0]   no0, no1, no2, no3;
   output [SCN-1:0]   eo0, eo1, eo2, eo3;
   output [SCN-1:0]   lo0, lo1, lo2, lo3;
   output [FT-1:0]    soft, woft, noft, eoft, loft;
   output [VCN-1:0]   sovc, wovc, novc, eovc, lovc;
   input              soa, woa, noa, eoa, loa;
   input [VCN-1:0]    soc, woc, noc, eoc, loc;
   output [VCN-1:0]   soca, woca, noca, eoca, loca;
 
   // local address, in 1-of-4 format
   input [7:0]         addrx, addry;
   // active-low reset
   input              rst_n;
 
   //----------------------------------
   // input to crossbar
   wire [VCN-1:0][SCN-1:0]     s2cb0, s2cb1, s2cb2, s2cb3;
   wire [VCN-1:0][SCN-1:0]     w2cb0, w2cb1, w2cb2, w2cb3;
   wire [VCN-1:0][SCN-1:0]     n2cb0, n2cb1, n2cb2, n2cb3;
   wire [VCN-1:0][SCN-1:0]     e2cb0, e2cb1, e2cb2, e2cb3;
   wire [VCN-1:0][SCN-1:0]     l2cb0, l2cb1, l2cb2, l2cb3;
   wire [VCN-1:0][FT-1:0]      s2cbt, w2cbt, n2cbt, e2cbt, l2cbt;
   wire [VCN-1:0][3:0]           s2cbrtg, n2cbrtg, l2cbrtg;
   wire [VCN-1:0][1:0]           w2cbrtg, e2cbrtg;
   wire [VCN-1:0]               s2cba, w2cba, n2cba, e2cba, l2cba;
 
   // VC requests
   wire [VCN-1:0][3:0] svcr, nvcr, lvcr;
   wire [VCN-1:0]      svcra, nvcra, lvcra;
   wire [VCN-1:0][1:0] wvcr, evcr;
   wire [VCN-1:0]      wvcra, evcra;
 
   // SW requests
   wire [VCN-1:0][1:0] siswr, wiswr, niswr, eiswr, liswr;
   wire [VCN-1:0][3:0] siswrt, niswrt, liswrt;
   wire [VCN-1:0][1:0] wiswrt, eiswrt;
 
   // crossbar to output
   wire [SCN-1:0]      cb2s0, cb2s1, cb2s2, cb2s3;
   wire [SCN-1:0]      cb2w0, cb2w1, cb2w2, cb2w3;
   wire [SCN-1:0]      cb2n0, cb2n1, cb2n2, cb2n3;
   wire [SCN-1:0]      cb2e0, cb2e1, cb2e2, cb2e3;
   wire [SCN-1:0]      cb2l0, cb2l1, cb2l2, cb2l3;
   wire [FT-1:0]       cb2st, cb2wt, cb2nt, cb2et, cb2lt;
   wire                cb2sa, cb2wa, cb2na, cb2ea, cb2la;
 
   // SW requests to VC arbiters in output buffers
   wire [VCN-1:0]      soswr, woswr, noswr, eoswr, loswr;
   wire [VCN-1:0]      soswa, woswa, noswa, eoswa, loswa;
 
   //-------------------------------------
   // south input buffer
   inpbuf #(.DW(DW), .VCN(VCN), .DIR(0), .SN(4), .PD(PD), .FT(FT))
   SIB (
        .dia   ( sia     ),
        .cor   ( sic     ),
        .do0   ( s2cb0   ),
        .do1   ( s2cb1   ),
        .do2   ( s2cb2   ),
        .do3   ( s2cb3   ),
        .dot   ( s2cbt   ),
        .dortg ( s2cbrtg ),
        .vcr   ( svcr    ),
        .swr   ( siswr   ),
        .di0   ( si0     ),
        .di1   ( si1     ),
        .di2   ( si2     ),
        .di3   ( si3     ),
        .dit   ( sift    ),
        .divc  ( sivc    ),
        .coa   ( sica    ),
        .doa   ( s2cba   ),
        .vcra  ( svcra   ),
        .swrt  ( siswrt  ),
        .addrx ( addrx   ),
        .addry ( addry   ),
        .rst_n ( rst_n   )
        );
 
   // west input buffer
   inpbuf #(.DW(DW), .VCN(VCN), .DIR(1), .SN(2), .PD(PD), .FT(FT))
   WIB (
        .dia   ( wia     ),
        .cor   ( wic     ),
        .do0   ( w2cb0   ),
        .do1   ( w2cb1   ),
        .do2   ( w2cb2   ),
        .do3   ( w2cb3   ),
        .dot   ( w2cbt   ),
        .dortg ( w2cbrtg ),
        .vcr   ( wvcr    ),
        .swr   ( wiswr   ),
        .di0   ( wi0     ),
        .di1   ( wi1     ),
        .di2   ( wi2     ),
        .di3   ( wi3     ),
        .dit   ( wift    ),
        .divc  ( wivc    ),
        .coa   ( wica    ),
        .doa   ( w2cba   ),
        .vcra  ( wvcra   ),
        .swrt  ( wiswrt  ),
        .addrx ( addrx   ),
        .addry ( addry   ),
        .rst_n ( rst_n   )
        );
 
   // north input buffer
   inpbuf #(.DW(DW), .VCN(VCN), .DIR(2), .SN(4), .PD(PD), .FT(FT))
   NIB (
        .dia   ( nia     ),
        .cor   ( nic     ),
        .do0   ( n2cb0   ),
        .do1   ( n2cb1   ),
        .do2   ( n2cb2   ),
        .do3   ( n2cb3   ),
        .dot   ( n2cbt   ),
        .dortg ( n2cbrtg ),
        .vcr   ( nvcr    ),
        .swr   ( niswr   ),
        .di0   ( ni0     ),
        .di1   ( ni1     ),
        .di2   ( ni2     ),
        .di3   ( ni3     ),
        .dit   ( nift    ),
        .divc  ( nivc    ),
        .coa   ( nica    ),
        .doa   ( n2cba   ),
        .vcra  ( nvcra   ),
        .swrt  ( niswrt  ),
        .addrx ( addrx   ),
        .addry ( addry   ),
        .rst_n ( rst_n   )
        );
 
   // east input buffer
   inpbuf #(.DW(DW), .VCN(VCN), .DIR(3), .SN(2), .PD(PD), .FT(FT))
   EIB (
        .dia   ( eia     ),
        .cor   ( eic     ),
        .do0   ( e2cb0   ),
        .do1   ( e2cb1   ),
        .do2   ( e2cb2   ),
        .do3   ( e2cb3   ),
        .dot   ( e2cbt   ),
        .dortg ( e2cbrtg ),
        .vcr   ( evcr    ),
        .swr   ( eiswr   ),
        .di0   ( ei0     ),
        .di1   ( ei1     ),
        .di2   ( ei2     ),
        .di3   ( ei3     ),
        .dit   ( eift    ),
        .divc  ( eivc    ),
        .coa   ( eica    ),
        .doa   ( e2cba   ),
        .vcra  ( evcra   ),
        .swrt  ( eiswrt  ),
        .addrx ( addrx   ),
        .addry ( addry   ),
        .rst_n ( rst_n   )
        );
 
   // local input buffer
   inpbuf #(.DW(DW), .VCN(VCN), .DIR(4), .SN(4), .PD(PD), .FT(FT))
   LIB (
        .dia   ( lia     ),
        .cor   ( lic     ),
        .do0   ( l2cb0   ),
        .do1   ( l2cb1   ),
        .do2   ( l2cb2   ),
        .do3   ( l2cb3   ),
        .dot   ( l2cbt   ),
        .dortg ( l2cbrtg ),
        .vcr   ( lvcr    ),
        .swr   ( liswr   ),
        .di0   ( li0     ),
        .di1   ( li1     ),
        .di2   ( li2     ),
        .di3   ( li3     ),
        .dit   ( lift    ),
        .divc  ( livc    ),
        .coa   ( lica    ),
        .doa   ( l2cba   ),
        .vcra  ( lvcra   ),
        .swrt  ( liswrt  ),
        .addrx ( addrx   ),
        .addry ( addry   ),
        .rst_n ( rst_n   )
        );
 
   // south output buffer
   outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))
   SOB (
        .dia   ( cb2sa   ),
        .do0   ( so0     ),
        .do1   ( so1     ),
        .do2   ( so2     ),
        .do3   ( so3     ),
        .dot   ( soft    ),
        .dovc  ( sovc    ),
        .afc   ( soca    ),
        .vca   ( soswa   ),
        .di0   ( cb2s0   ),
        .di1   ( cb2s1   ),
        .di2   ( cb2s2   ),
        .di3   ( cb2s3   ),
        .dit   ( cb2st   ),
        .doa   ( soa     ),
        .credit( soc     ),
        .vcr   ( soswr   ),
        .rst_n ( rst_n   )
        );
 
   // west output buffer
   outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))
   WOB (
        .dia   ( cb2wa   ),
        .do0   ( wo0     ),
        .do1   ( wo1     ),
        .do2   ( wo2     ),
        .do3   ( wo3     ),
        .dot   ( woft    ),
        .dovc  ( wovc    ),
        .afc   ( woca    ),
        .vca   ( woswa   ),
        .di0   ( cb2w0   ),
        .di1   ( cb2w1   ),
        .di2   ( cb2w2   ),
        .di3   ( cb2w3   ),
        .dit   ( cb2wt   ),
        .doa   ( woa     ),
        .credit( woc     ),
        .vcr   ( woswr   ),
        .rst_n ( rst_n   )
        );
 
   // north output buffer
   outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))
   NOB (
        .dia   ( cb2na   ),
        .do0   ( no0     ),
        .do1   ( no1     ),
        .do2   ( no2     ),
        .do3   ( no3     ),
        .dot   ( noft    ),
        .dovc  ( novc    ),
        .afc   ( noca    ),
        .vca   ( noswa   ),
        .di0   ( cb2n0   ),
        .di1   ( cb2n1   ),
        .di2   ( cb2n2   ),
        .di3   ( cb2n3   ),
        .dit   ( cb2nt   ),
        .doa   ( noa     ),
        .credit( noc     ),
        .vcr   ( noswr   ),
        .rst_n ( rst_n   )
        );
 
   // east output buffer
   outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))
   EOB (
        .dia   ( cb2ea   ),
        .do0   ( eo0     ),
        .do1   ( eo1     ),
        .do2   ( eo2     ),
        .do3   ( eo3     ),
        .dot   ( eoft    ),
        .dovc  ( eovc    ),
        .afc   ( eoca    ),
        .vca   ( eoswa   ),
        .di0   ( cb2e0   ),
        .di1   ( cb2e1   ),
        .di2   ( cb2e2   ),
        .di3   ( cb2e3   ),
        .dit   ( cb2et   ),
        .doa   ( eoa     ),
        .credit( eoc     ),
        .vcr   ( eoswr   ),
        .rst_n ( rst_n   )
        );
 
   // east output buffer
   outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))
   LOB (
        .dia   ( cb2la   ),
        .do0   ( lo0     ),
        .do1   ( lo1     ),
        .do2   ( lo2     ),
        .do3   ( lo3     ),
        .dot   ( loft    ),
        .dovc  ( lovc    ),
        .afc   ( loca    ),
        .vca   ( loswa   ),
        .di0   ( cb2l0   ),
        .di1   ( cb2l1   ),
        .di2   ( cb2l2   ),
        .di3   ( cb2l3   ),
        .dit   ( cb2lt   ),
        .doa   ( loa     ),
        .credit( loc     ),
        .vcr   ( loswr   ),
        .rst_n ( rst_n   )
        );
 
   // VC allocator
   vcalloc #(.VCN(VCN))
   ALLOC (
          .svcra   ( svcra   ),
          .wvcra   ( wvcra   ),
          .nvcra   ( nvcra   ),
          .evcra   ( evcra   ),
          .lvcra   ( lvcra   ),
          .sswa    ( siswrt  ),
          .wswa    ( wiswrt  ),
          .nswa    ( niswrt  ),
          .eswa    ( eiswrt  ),
          .lswa    ( liswrt  ),
          .sosr    ( soswr   ),
          .wosr    ( woswr   ),
          .nosr    ( noswr   ),
          .eosr    ( eoswr   ),
          .losr    ( loswr   ),
          .svcr    ( svcr    ),
          .nvcr    ( nvcr    ),
          .lvcr    ( lvcr    ),
          .wvcr    ( wvcr    ),
          .evcr    ( evcr    ),
          .sswr    ( siswr   ),
          .wswr    ( wiswr   ),
          .nswr    ( niswr   ),
          .eswr    ( eiswr   ),
          .lswr    ( liswr   ),
          .sosa    ( soswa   ),
          .wosa    ( woswa   ),
          .nosa    ( noswa   ),
          .eosa    ( eoswa   ),
          .losa    ( loswa   ),
          .rst_n   ( rst_n   )
          );
 
   // crossbar
   dcb_vc #(.DW(DW), .FT(FT), .VCN(VCN))
   CB (
       .dia   ( {l2cba, e2cba, n2cba, w2cba, s2cba} ),
       .do0   ( {cb2l0, cb2e0, cb2n0, cb2w0, cb2s0} ),
       .do1   ( {cb2l1, cb2e1, cb2n1, cb2w1, cb2s1} ),
       .do2   ( {cb2l2, cb2e2, cb2n2, cb2w2, cb2s2} ),
       .do3   ( {cb2l3, cb2e3, cb2n3, cb2w3, cb2s3} ),
       .dot   ( {cb2lt, cb2et, cb2nt, cb2wt, cb2st} ),
       .di0   ( {l2cb0, e2cb0, n2cb0, w2cb0, s2cb0} ),
       .di1   ( {l2cb1, e2cb1, n2cb1, w2cb1, s2cb1} ),
       .di2   ( {l2cb2, e2cb2, n2cb2, w2cb2, s2cb2} ),
       .di3   ( {l2cb3, e2cb3, n2cb3, w2cb3, s2cb3} ),
       .dit   ( {l2cbt, e2cbt, n2cbt, w2cbt, s2cbt} ),
       .srtg  ( s2cbrtg                             ),
       .nrtg  ( n2cbrtg                             ),
       .lrtg  ( l2cbrtg                             ),
       .wrtg  ( w2cbrtg                             ),
       .ertg  ( e2cbrtg                             ),
       .doa   ( {cb2la, cb2ea, cb2na, cb2wa, cb2sa} )
       );
 
endmodule // router
 
 
 
 

Line No.	Rev	Author	Line
1	40	wsong0210	`/*`
2			`Asynchronous SDM NoC`
3			`(C)2011 Wei Song`
4			`Advanced Processor Technologies Group`
5			`Computer Science, the Univ. of Manchester, UK`
6
7			`Authors:`
8			`Wei Song wsong83@gmail.com`
9
10			`License: LGPL 3.0 or later`
11
12			`Asynchronous VC router.`
13
14			`History:`
15			`05/04/2010 Initial version. <wsong83@gmail.com>`
16			`02/06/2011 Clean up for opensource. <wsong83@gmail.com>`
17
18			`*/`
19
20			`module router (/AUTOARG/`
21			`// Outputs`
22			`sia, wia, nia, eia, lia, sic, wic, nic, eic, lic, so0, so1, so2,`
23			`so3, wo0, wo1, wo2, wo3, no0, no1, no2, no3, eo0, eo1, eo2, eo3,`
24			`lo0, lo1, lo2, lo3, soft, woft, noft, eoft, loft, sovc, wovc, novc,`
25			`eovc, lovc, soca, woca, noca, eoca, loca,`
26			`// Inputs`
27			`si0, si1, si2, si3, wi0, wi1, wi2, wi3, ni0, ni1, ni2, ni3, ei0,`
28			`ei1, ei2, ei3, li0, li1, li2, li3, sift, wift, nift, eift, lift,`
29			`sivc, wivc, nivc, eivc, livc, sica, wica, nica, eica, lica, soa,`
30	45	wsong0210	`woa, noa, eoa, loa, soc, woc, noc, eoc, loc, addrx, addry, rst_n`
31	40	wsong0210	`);`
32
33			`parameter VCN = 2; // number of VCs per direction`
34			`parameter DW = 32; // data width of an input port`
35			`parameter PD = 1; // the depth of a input VC buffer`
36			`parameter FT = 3; // the number of flit types, currently 3 (HD, DATA, TAIL)`
37
38			`parameter FCPD = PD;`
39			`parameter SCN = DW/2;`
40
41			`// input ports`
42			`input [SCN-1:0] si0, si1, si2, si3;`
43			`input [SCN-1:0] wi0, wi1, wi2, wi3;`
44			`input [SCN-1:0] ni0, ni1, ni2, ni3;`
45			`input [SCN-1:0] ei0, ei1, ei2, ei3;`
46			`input [SCN-1:0] li0, li1, li2, li3;`
47			`input [FT-1:0] sift, wift, nift, eift, lift;`
48			`input [VCN-1:0] sivc, wivc, nivc, eivc, livc;`
49			`output sia, wia, nia, eia, lia;`
50			`output [VCN-1:0] sic, wic, nic, eic, lic;`
51			`input [VCN-1:0] sica, wica, nica, eica, lica;`
52
53			`// output ports`
54			`output [SCN-1:0] so0, so1, so2, so3;`
55			`output [SCN-1:0] wo0, wo1, wo2, wo3;`
56			`output [SCN-1:0] no0, no1, no2, no3;`
57			`output [SCN-1:0] eo0, eo1, eo2, eo3;`
58			`output [SCN-1:0] lo0, lo1, lo2, lo3;`
59			`output [FT-1:0] soft, woft, noft, eoft, loft;`
60			`output [VCN-1:0] sovc, wovc, novc, eovc, lovc;`
61			`input soa, woa, noa, eoa, loa;`
62			`input [VCN-1:0] soc, woc, noc, eoc, loc;`
63			`output [VCN-1:0] soca, woca, noca, eoca, loca;`
64
65			`// local address, in 1-of-4 format`
66			`input [7:0] addrx, addry;`
67			`// active-low reset`
68	45	wsong0210	`input rst_n;`
69	40	wsong0210
70			`//----------------------------------`
71			`// input to crossbar`
72			`wire [VCN-1:0][SCN-1:0] s2cb0, s2cb1, s2cb2, s2cb3;`
73			`wire [VCN-1:0][SCN-1:0] w2cb0, w2cb1, w2cb2, w2cb3;`
74			`wire [VCN-1:0][SCN-1:0] n2cb0, n2cb1, n2cb2, n2cb3;`
75			`wire [VCN-1:0][SCN-1:0] e2cb0, e2cb1, e2cb2, e2cb3;`
76			`wire [VCN-1:0][SCN-1:0] l2cb0, l2cb1, l2cb2, l2cb3;`
77			`wire [VCN-1:0][FT-1:0] s2cbt, w2cbt, n2cbt, e2cbt, l2cbt;`
78			`wire [VCN-1:0][3:0] s2cbrtg, n2cbrtg, l2cbrtg;`
79			`wire [VCN-1:0][1:0] w2cbrtg, e2cbrtg;`
80			`wire [VCN-1:0] s2cba, w2cba, n2cba, e2cba, l2cba;`
81
82			`// VC requests`
83			`wire [VCN-1:0][3:0] svcr, nvcr, lvcr;`
84			`wire [VCN-1:0] svcra, nvcra, lvcra;`
85			`wire [VCN-1:0][1:0] wvcr, evcr;`
86			`wire [VCN-1:0] wvcra, evcra;`
87
88			`// SW requests`
89			`wire [VCN-1:0][1:0] siswr, wiswr, niswr, eiswr, liswr;`
90			`wire [VCN-1:0][3:0] siswrt, niswrt, liswrt;`
91			`wire [VCN-1:0][1:0] wiswrt, eiswrt;`
92
93			`// crossbar to output`
94			`wire [SCN-1:0] cb2s0, cb2s1, cb2s2, cb2s3;`
95			`wire [SCN-1:0] cb2w0, cb2w1, cb2w2, cb2w3;`
96			`wire [SCN-1:0] cb2n0, cb2n1, cb2n2, cb2n3;`
97			`wire [SCN-1:0] cb2e0, cb2e1, cb2e2, cb2e3;`
98			`wire [SCN-1:0] cb2l0, cb2l1, cb2l2, cb2l3;`
99			`wire [FT-1:0] cb2st, cb2wt, cb2nt, cb2et, cb2lt;`
100			`wire cb2sa, cb2wa, cb2na, cb2ea, cb2la;`
101
102			`// SW requests to VC arbiters in output buffers`
103			`wire [VCN-1:0] soswr, woswr, noswr, eoswr, loswr;`
104			`wire [VCN-1:0] soswa, woswa, noswa, eoswa, loswa;`
105
106			`//-------------------------------------`
107			`// south input buffer`
108			`inpbuf #(.DW(DW), .VCN(VCN), .DIR(0), .SN(4), .PD(PD), .FT(FT))`
109			`SIB (`
110			`.dia ( sia ),`
111			`.cor ( sic ),`
112			`.do0 ( s2cb0 ),`
113			`.do1 ( s2cb1 ),`
114			`.do2 ( s2cb2 ),`
115			`.do3 ( s2cb3 ),`
116			`.dot ( s2cbt ),`
117			`.dortg ( s2cbrtg ),`
118			`.vcr ( svcr ),`
119			`.swr ( siswr ),`
120			`.di0 ( si0 ),`
121			`.di1 ( si1 ),`
122			`.di2 ( si2 ),`
123			`.di3 ( si3 ),`
124			`.dit ( sift ),`
125			`.divc ( sivc ),`
126			`.coa ( sica ),`
127			`.doa ( s2cba ),`
128			`.vcra ( svcra ),`
129			`.swrt ( siswrt ),`
130			`.addrx ( addrx ),`
131			`.addry ( addry ),`
132	45	wsong0210	`.rst_n ( rst_n )`
133	40	wsong0210	`);`
134
135			`// west input buffer`
136			`inpbuf #(.DW(DW), .VCN(VCN), .DIR(1), .SN(2), .PD(PD), .FT(FT))`
137			`WIB (`
138			`.dia ( wia ),`
139			`.cor ( wic ),`
140			`.do0 ( w2cb0 ),`
141			`.do1 ( w2cb1 ),`
142			`.do2 ( w2cb2 ),`
143			`.do3 ( w2cb3 ),`
144			`.dot ( w2cbt ),`
145			`.dortg ( w2cbrtg ),`
146			`.vcr ( wvcr ),`
147			`.swr ( wiswr ),`
148			`.di0 ( wi0 ),`
149			`.di1 ( wi1 ),`
150			`.di2 ( wi2 ),`
151			`.di3 ( wi3 ),`
152			`.dit ( wift ),`
153			`.divc ( wivc ),`
154			`.coa ( wica ),`
155			`.doa ( w2cba ),`
156			`.vcra ( wvcra ),`
157			`.swrt ( wiswrt ),`
158			`.addrx ( addrx ),`
159			`.addry ( addry ),`
160	45	wsong0210	`.rst_n ( rst_n )`
161	40	wsong0210	`);`
162
163			`// north input buffer`
164			`inpbuf #(.DW(DW), .VCN(VCN), .DIR(2), .SN(4), .PD(PD), .FT(FT))`
165			`NIB (`
166			`.dia ( nia ),`
167			`.cor ( nic ),`
168			`.do0 ( n2cb0 ),`
169			`.do1 ( n2cb1 ),`
170			`.do2 ( n2cb2 ),`
171			`.do3 ( n2cb3 ),`
172			`.dot ( n2cbt ),`
173			`.dortg ( n2cbrtg ),`
174			`.vcr ( nvcr ),`
175			`.swr ( niswr ),`
176			`.di0 ( ni0 ),`
177			`.di1 ( ni1 ),`
178			`.di2 ( ni2 ),`
179			`.di3 ( ni3 ),`
180			`.dit ( nift ),`
181			`.divc ( nivc ),`
182			`.coa ( nica ),`
183			`.doa ( n2cba ),`
184			`.vcra ( nvcra ),`
185			`.swrt ( niswrt ),`
186			`.addrx ( addrx ),`
187			`.addry ( addry ),`
188	45	wsong0210	`.rst_n ( rst_n )`
189	40	wsong0210	`);`
190
191			`// east input buffer`
192			`inpbuf #(.DW(DW), .VCN(VCN), .DIR(3), .SN(2), .PD(PD), .FT(FT))`
193			`EIB (`
194			`.dia ( eia ),`
195			`.cor ( eic ),`
196			`.do0 ( e2cb0 ),`
197			`.do1 ( e2cb1 ),`
198			`.do2 ( e2cb2 ),`
199			`.do3 ( e2cb3 ),`
200			`.dot ( e2cbt ),`
201			`.dortg ( e2cbrtg ),`
202			`.vcr ( evcr ),`
203			`.swr ( eiswr ),`
204			`.di0 ( ei0 ),`
205			`.di1 ( ei1 ),`
206			`.di2 ( ei2 ),`
207			`.di3 ( ei3 ),`
208			`.dit ( eift ),`
209			`.divc ( eivc ),`
210			`.coa ( eica ),`
211			`.doa ( e2cba ),`
212			`.vcra ( evcra ),`
213			`.swrt ( eiswrt ),`
214			`.addrx ( addrx ),`
215			`.addry ( addry ),`
216	45	wsong0210	`.rst_n ( rst_n )`
217	40	wsong0210	`);`
218
219			`// local input buffer`
220			`inpbuf #(.DW(DW), .VCN(VCN), .DIR(4), .SN(4), .PD(PD), .FT(FT))`
221			`LIB (`
222			`.dia ( lia ),`
223			`.cor ( lic ),`
224			`.do0 ( l2cb0 ),`
225			`.do1 ( l2cb1 ),`
226			`.do2 ( l2cb2 ),`
227			`.do3 ( l2cb3 ),`
228			`.dot ( l2cbt ),`
229			`.dortg ( l2cbrtg ),`
230			`.vcr ( lvcr ),`
231			`.swr ( liswr ),`
232			`.di0 ( li0 ),`
233			`.di1 ( li1 ),`
234			`.di2 ( li2 ),`
235			`.di3 ( li3 ),`
236			`.dit ( lift ),`
237			`.divc ( livc ),`
238			`.coa ( lica ),`
239			`.doa ( l2cba ),`
240			`.vcra ( lvcra ),`
241			`.swrt ( liswrt ),`
242			`.addrx ( addrx ),`
243			`.addry ( addry ),`
244	45	wsong0210	`.rst_n ( rst_n )`
245	40	wsong0210	`);`
246
247			`// south output buffer`
248			`outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))`
249			`SOB (`
250			`.dia ( cb2sa ),`
251			`.do0 ( so0 ),`
252			`.do1 ( so1 ),`
253			`.do2 ( so2 ),`
254			`.do3 ( so3 ),`
255			`.dot ( soft ),`
256			`.dovc ( sovc ),`
257			`.afc ( soca ),`
258			`.vca ( soswa ),`
259			`.di0 ( cb2s0 ),`
260			`.di1 ( cb2s1 ),`
261			`.di2 ( cb2s2 ),`
262			`.di3 ( cb2s3 ),`
263			`.dit ( cb2st ),`
264			`.doa ( soa ),`
265			`.credit( soc ),`
266			`.vcr ( soswr ),`
267	45	wsong0210	`.rst_n ( rst_n )`
268	40	wsong0210	`);`
269
270			`// west output buffer`
271			`outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))`
272			`WOB (`
273			`.dia ( cb2wa ),`
274			`.do0 ( wo0 ),`
275			`.do1 ( wo1 ),`
276			`.do2 ( wo2 ),`
277			`.do3 ( wo3 ),`
278			`.dot ( woft ),`
279			`.dovc ( wovc ),`
280			`.afc ( woca ),`
281			`.vca ( woswa ),`
282			`.di0 ( cb2w0 ),`
283			`.di1 ( cb2w1 ),`
284			`.di2 ( cb2w2 ),`
285			`.di3 ( cb2w3 ),`
286			`.dit ( cb2wt ),`
287			`.doa ( woa ),`
288			`.credit( woc ),`
289			`.vcr ( woswr ),`
290	45	wsong0210	`.rst_n ( rst_n )`
291	40	wsong0210	`);`
292
293			`// north output buffer`
294			`outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))`
295			`NOB (`
296			`.dia ( cb2na ),`
297			`.do0 ( no0 ),`
298			`.do1 ( no1 ),`
299			`.do2 ( no2 ),`
300			`.do3 ( no3 ),`
301			`.dot ( noft ),`
302			`.dovc ( novc ),`
303			`.afc ( noca ),`
304			`.vca ( noswa ),`
305			`.di0 ( cb2n0 ),`
306			`.di1 ( cb2n1 ),`
307			`.di2 ( cb2n2 ),`
308			`.di3 ( cb2n3 ),`
309			`.dit ( cb2nt ),`
310			`.doa ( noa ),`
311			`.credit( noc ),`
312			`.vcr ( noswr ),`
313	45	wsong0210	`.rst_n ( rst_n )`
314	40	wsong0210	`);`
315
316			`// east output buffer`
317			`outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))`
318			`EOB (`
319			`.dia ( cb2ea ),`
320			`.do0 ( eo0 ),`
321			`.do1 ( eo1 ),`
322			`.do2 ( eo2 ),`
323			`.do3 ( eo3 ),`
324			`.dot ( eoft ),`
325			`.dovc ( eovc ),`
326			`.afc ( eoca ),`
327			`.vca ( eoswa ),`
328			`.di0 ( cb2e0 ),`
329			`.di1 ( cb2e1 ),`
330			`.di2 ( cb2e2 ),`
331			`.di3 ( cb2e3 ),`
332			`.dit ( cb2et ),`
333			`.doa ( eoa ),`
334			`.credit( eoc ),`
335			`.vcr ( eoswr ),`
336	45	wsong0210	`.rst_n ( rst_n )`
337	40	wsong0210	`);`
338
339			`// east output buffer`
340			`outpbuf #(.DW(DW), .VCN(VCN), .FT(FT), .FCPD(FCPD))`
341			`LOB (`
342			`.dia ( cb2la ),`
343			`.do0 ( lo0 ),`
344			`.do1 ( lo1 ),`
345			`.do2 ( lo2 ),`
346			`.do3 ( lo3 ),`
347			`.dot ( loft ),`
348			`.dovc ( lovc ),`
349			`.afc ( loca ),`
350			`.vca ( loswa ),`
351			`.di0 ( cb2l0 ),`
352			`.di1 ( cb2l1 ),`
353			`.di2 ( cb2l2 ),`
354			`.di3 ( cb2l3 ),`
355			`.dit ( cb2lt ),`
356			`.doa ( loa ),`
357			`.credit( loc ),`
358			`.vcr ( loswr ),`
359	45	wsong0210	`.rst_n ( rst_n )`
360	40	wsong0210	`);`
361
362			`// VC allocator`
363			`vcalloc #(.VCN(VCN))`
364	42	wsong0210	`ALLOC (`
365			`.svcra ( svcra ),`
366			`.wvcra ( wvcra ),`
367			`.nvcra ( nvcra ),`
368			`.evcra ( evcra ),`
369			`.lvcra ( lvcra ),`
370			`.sswa ( siswrt ),`
371			`.wswa ( wiswrt ),`
372			`.nswa ( niswrt ),`
373			`.eswa ( eiswrt ),`
374			`.lswa ( liswrt ),`
375			`.sosr ( soswr ),`
376			`.wosr ( woswr ),`
377			`.nosr ( noswr ),`
378			`.eosr ( eoswr ),`
379			`.losr ( loswr ),`
380			`.svcr ( svcr ),`
381			`.nvcr ( nvcr ),`
382			`.lvcr ( lvcr ),`
383			`.wvcr ( wvcr ),`
384			`.evcr ( evcr ),`
385			`.sswr ( siswr ),`
386			`.wswr ( wiswr ),`
387			`.nswr ( niswr ),`
388			`.eswr ( eiswr ),`
389			`.lswr ( liswr ),`
390			`.sosa ( soswa ),`
391			`.wosa ( woswa ),`
392			`.nosa ( noswa ),`
393			`.eosa ( eoswa ),`
394			`.losa ( loswa ),`
395	45	wsong0210	`.rst_n ( rst_n )`
396	42	wsong0210	`);`
397	40	wsong0210
398			`// crossbar`
399			`dcb_vc #(.DW(DW), .FT(FT), .VCN(VCN))`
400			`CB (`
401			`.dia ( {l2cba, e2cba, n2cba, w2cba, s2cba} ),`
402			`.do0 ( {cb2l0, cb2e0, cb2n0, cb2w0, cb2s0} ),`
403			`.do1 ( {cb2l1, cb2e1, cb2n1, cb2w1, cb2s1} ),`
404			`.do2 ( {cb2l2, cb2e2, cb2n2, cb2w2, cb2s2} ),`
405			`.do3 ( {cb2l3, cb2e3, cb2n3, cb2w3, cb2s3} ),`
406			`.dot ( {cb2lt, cb2et, cb2nt, cb2wt, cb2st} ),`
407			`.di0 ( {l2cb0, e2cb0, n2cb0, w2cb0, s2cb0} ),`
408			`.di1 ( {l2cb1, e2cb1, n2cb1, w2cb1, s2cb1} ),`
409			`.di2 ( {l2cb2, e2cb2, n2cb2, w2cb2, s2cb2} ),`
410			`.di3 ( {l2cb3, e2cb3, n2cb3, w2cb3, s2cb3} ),`
411			`.dit ( {l2cbt, e2cbt, n2cbt, w2cbt, s2cbt} ),`
412			`.srtg ( s2cbrtg ),`
413			`.nrtg ( n2cbrtg ),`
414			`.lrtg ( l2cbrtg ),`
415			`.wrtg ( w2cbrtg ),`
416			`.ertg ( e2cbrtg ),`
417			`.doa ( {cb2la, cb2ea, cb2na, cb2wa, cb2sa} )`
418			`);`
419
420			`endmodule // router`
421
422
423
424

Browse

Tools

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] [trunk/] [vc/] [src/] [router.v] - Blame information for rev 50