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[/] [blue/] [trunk/] [blue8/] [control1.v] - Blame information for rev 4

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1 2 wd5gnr
/*
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    This file is part of Blue8.
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    Foobar is free software: you can redistribute it and/or modify
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    it under the terms of the GNU Lesser General Public License as published by
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    the Free Software Foundation, either version 3 of the License, or
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    (at your option) any later version.
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    Foobar is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU Lesser General Public License for more details.
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    You should have received a copy of the GNU Lesser General Public License
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    along with Blue8.  If not, see <http://www.gnu.org/licenses/>.
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    Blue8 by Al Williams alw@al-williams.com
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*/
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`timescale 1ns / 1ps
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`default_nettype none
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//////////////////////////////////////////////////////////////////////////////////
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// Company: 
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// Engineer: 
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// 
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// Create Date:    00:37:29 10/08/2006 
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// Design Name: 
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// Module Name:    control1 
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// Project Name: 
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// Target Devices: 
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// Tool versions: 
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// Description: 
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//
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// Dependencies: 
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//
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// Revision: 
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// Revision 0.01 - File Created
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// Additional Comments: 
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//
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//////////////////////////////////////////////////////////////////////////////////
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module control(input wire clkinput, input wire extstart, input wire extstop, input wire extexam,
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   input wire extdeposit, input wire ihlt, input wire aluov, output wire [8:1] cp,
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        output wire [8:1] cpw, input wire extreset, output wire reset,
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        output wire sw2bus, output wire loadpc1, input wire extloadpc, output wire exout, output wire depout,
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        output wire running, output wire clkout, input wire abortcycle);
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        wire wclk;
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        controlclk sim(extstart,extstop,extexam,extdeposit,ihlt,aluov,cp,cpw,extreset,reset,
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        sw2bus,loadpc1,extloadpc,exout,depout,running,clkout,wclk, abortcycle);
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// Instantiate the DCM
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maindcm clockgen (
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    .CLKIN_IN(clkinput),
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    .RST_IN(1'b0),
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    .CLKFX_OUT(clkout),
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    .CLKFX180_OUT(wclk)
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    );
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endmodule

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