OpenCores
URL https://opencores.org/ocsvn/blue/blue/trunk

Subversion Repositories blue

[/] [blue/] [trunk/] [blue8/] [itest.asm] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 wd5gnr
        /* Now C comments work too but don't show in list */
2
 
3
 
4
#include "blue.inc"
5
 
6
 
7
;; This tests the indexing
8
;; by using index to point to the UART in some way
9
        ORG 0
10
start0: DEFSTACK
11
        call print_msg
12
        ds "BLUE: \r\n"
13
        dw 0xffff
14
 
15
 
16
start:  ldx uart                ; contrived: use index register to uart
17
        LDIM('0',var)
18
loop:
19
        call xmitwait           ; wait for transmit ready
20
        lda var
21
        stax 1                  ; write and recycle if necessary
22
        cmp nine
23
        snz
24
        lda zero
25
        inca
26
        sta var
27
        call waitchar
28
        lda var
29
        jmp loop
30
 
31
var:    DW 0
32
zero:   DW 0x002F
33
nine:   DW 0x0039
34
tmask:  DW 0x7FFF
35
        ds 'Test single'
36
        ds "Test double"
37
        ds '\r\n'
38
        dw 'A'                  ; test
39
        dw 'XY'                 ; test
40
 
41
#include "syslib.inc"
42
 
43
        END
44
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.