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https://opencores.org/ocsvn/blue/blue/trunk
[/] [blue/] [trunk/] [blue8/] [transcript] - Blame information for rev 2
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wd5gnr |
# Reading C:/Modeltech_xe_starter/tcl/vsim/pref.tcl
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# do tbuart.fdo
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# ** Warning: (vlib-34) Library already exists at "work".
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# Model Technology ModelSim XE III vlog 6.1e Compiler 2006.03 Mar 8 2006
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# -- Compiling module rcvr
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#
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# Top level modules:
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# rcvr
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# Model Technology ModelSim XE III vlog 6.1e Compiler 2006.03 Mar 8 2006
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# -- Compiling module txmit
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#
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# Top level modules:
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# txmit
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# Model Technology ModelSim XE III vlog 6.1e Compiler 2006.03 Mar 8 2006
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# -- Compiling module uart
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#
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# Top level modules:
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# uart
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# Model Technology ModelSim XE III vlog 6.1e Compiler 2006.03 Mar 8 2006
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# -- Compiling module tbuart
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#
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# Top level modules:
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# tbuart
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# Model Technology ModelSim XE III vlog 6.1e Compiler 2006.03 Mar 8 2006
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# -- Compiling module glbl
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#
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# Top level modules:
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# glbl
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# vsim -L xilinxcorelib_ver -L unisims_ver -lib work -t 1ps tbuart glbl
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# Loading work.tbuart
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# Loading work.uart
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# ** Warning: (vsim-3009) [TSCALE] - Module 'uart' does not have a `timescale directive in effect, but previous modules do.
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# Region: /tbuart/UUT
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# Loading work.rcvr
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# Loading work.txmit
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# Loading work.glbl
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# .main_pane.mdi.interior.cs.vm.paneset.cli_0.wf.clip.cs.pw.wf
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# .main_pane.workspace
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# .main_pane.signals.interior.cs
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do C:/blue71/wave.do
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run -all
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# No errors or warnings.
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# Break at tbuart.tfw line 73
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run -all
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# Break key hit
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# Break at tbuart.tfw line 45
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