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[/] [bluespec-h264/] [trunk/] [release/] [BRAM.bsv] - Blame information for rev 100

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1 85 jamey.hick
// The MIT License
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// Copyright (c) 2006-2007 Massachusetts Institute of Technology
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
22 84 jamey.hick
import FIFO::*;
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//One RAM.
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interface BRAM#(type idx_type, type data_type);
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  method Action read_req(idx_type idx);
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  method ActionValue#(data_type) read_resp();
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  method Action write(idx_type idx, data_type data);
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endinterface
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//Two RAMs.
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interface BRAM_2#(type idx_type, type data_type);
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  method Action read_req1(idx_type idx);
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  method Action read_req2(idx_type idx);
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  method ActionValue#(data_type) read_resp1();
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  method ActionValue#(data_type) read_resp2();
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  method Action write(idx_type idx, data_type data);
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endinterface
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//Three RAMs.
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interface BRAM_3#(type idx_type, type data_type);
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  method Action read_req1(idx_type idx);
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  method Action read_req2(idx_type idx);
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  method Action read_req3(idx_type idx);
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  method ActionValue#(data_type) read_resp1();
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  method ActionValue#(data_type) read_resp2();
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  method ActionValue#(data_type) read_resp3();
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  method Action write(idx_type idx, data_type data);
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endinterface
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module mkBRAM#(Integer low, Integer high)
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  //interface:
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              (BRAM#(idx_type, data_type))
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  provisos
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          (Bits#(idx_type, idx),
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           Bits#(data_type, data),
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           Literal#(idx_type));
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  BRAM#(idx_type, data_type) m <- (valueof(data) == 0) ?
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                                  mkBRAM_Zero() :
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                                  mkBRAM_NonZero(low, high);
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  return m;
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endmodule
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import "BVI" BRAM = module mkBRAM_NonZero#(Integer low, Integer high)
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  //interface:
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              (BRAM#(idx_type, data_type))
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  provisos
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          (Bits#(idx_type, idx),
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           Bits#(data_type, data),
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           Literal#(idx_type));
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  default_clock clk(CLK);
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  parameter addr_width = valueof(idx);
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  parameter data_width = valueof(data);
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  parameter lo = low;
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  parameter hi = high;
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  method DOUT read_resp() ready(DOUT_RDY) enable(DOUT_EN);
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  method read_req(RD_ADDR) ready(RD_RDY) enable(RD_EN);
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  method write(WR_ADDR, WR_VAL) enable(WR_EN);
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  schedule read_req  CF (read_resp, write);
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  schedule read_resp CF (read_req, write);
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  schedule write     CF (read_req, read_resp);
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  schedule read_req  C read_req;
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  schedule read_resp C read_resp;
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  schedule write     C write;
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endmodule
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module mkBRAM_Zero
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  //interface:
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              (BRAM#(idx_type, data_type))
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  provisos
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          (Bits#(idx_type, idx),
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           Bits#(data_type, data),
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           Literal#(idx_type));
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  FIFO#(data_type) q <- mkFIFO();
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  method Action read_req(idx_type i);
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     q.enq(?);
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  endmethod
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  method Action write(idx_type i, data_type d);
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    noAction;
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  endmethod
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  method ActionValue#(data_type) read_resp();
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    q.deq();
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    return q.first();
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  endmethod
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endmodule
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module mkBRAM_Full
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  //interface:
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              (BRAM#(idx_type, data_type))
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  provisos
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          (Bits#(idx_type, idx),
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           Bits#(data_type, data),
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           Literal#(idx_type));
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  BRAM#(idx_type, data_type) br <- mkBRAM(0, valueof(TExp#(idx)) - 1);
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  return br;
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endmodule
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module mkBRAM_2#(Integer low, Integer high)
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  //interface:
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              (BRAM_2#(idx_type, data_type))
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  provisos
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          (Bits#(idx_type, idx),
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           Bits#(data_type, data),
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           Literal#(idx_type));
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  BRAM#(idx_type, data_type) br1 <- mkBRAM(low, high);
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  BRAM#(idx_type, data_type) br2 <- mkBRAM(low, high);
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  method read_req1(idx) = br1.read_req(idx);
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  method read_req2(idx) = br2.read_req(idx);
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  method read_resp1() = br1.read_resp();
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  method read_resp2() = br2.read_resp();
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  method Action write(idx_type idx, data_type data);
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    br1.write(idx, data);
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    br2.write(idx, data);
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  endmethod
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endmodule
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module mkBRAM_2_Full
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  //interface:
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              (BRAM_2#(idx_type, data_type))
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  provisos
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          (Bits#(idx_type, idx),
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           Bits#(data_type, data),
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           Literal#(idx_type));
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  BRAM_2#(idx_type, data_type) br <- mkBRAM_2(0, valueof(TExp#(idx)) - 1);
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  return br;
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endmodule
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module mkBRAM_3#(Integer low, Integer high)
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  //interface:
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              (BRAM_3#(idx_type, data_type))
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  provisos
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          (Bits#(idx_type, idx),
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           Bits#(data_type, data),
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           Literal#(idx_type));
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  BRAM#(idx_type, data_type) br1 <- mkBRAM(low, high);
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  BRAM#(idx_type, data_type) br2 <- mkBRAM(low, high);
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  BRAM#(idx_type, data_type) br3 <- mkBRAM(low, high);
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  method read_req1(idx) = br1.read_req(idx);
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  method read_req2(idx) = br2.read_req(idx);
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  method read_req3(idx) = br3.read_req(idx);
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  method read_resp1() = br1.read_resp();
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  method read_resp2() = br2.read_resp();
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  method read_resp3() = br3.read_resp();
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  method Action write(idx_type idx, data_type data);
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    br1.write(idx, data);
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    br2.write(idx, data);
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    br3.write(idx, data);
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  endmethod
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endmodule
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module mkBRAM_3_Full
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  //interface:
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              (BRAM_3#(idx_type, data_type))
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  provisos
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          (Bits#(idx_type, idx),
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           Bits#(data_type, data),
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           Literal#(idx_type));
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  BRAM_3#(idx_type, data_type) br <- mkBRAM_3(0, valueof(TExp#(idx)) - 1);
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  return br;
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endmodule
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