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[/] [bluespec_md6/] [trunk/] [MD6Control/] [test/] [MD6ControlTest.bsv] - Blame information for rev 7

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1 6 kfleming
//----------------------------------------------------------------------//
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// The MIT License
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//
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// Copyright (c) 2008 Kermin Fleming, kfleming@mit.edu
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//
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// Permission is hereby granted, free of charge, to any person
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// obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without
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// restriction, including without limitation the rights to use,
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// copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the
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// Software is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be
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// included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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// NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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// HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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// WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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// FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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// OTHER DEALINGS IN THE SOFTWARE.
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//----------------------------------------------------------------------//
26 2 kfleming
//BSV includes
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import RegFile::*;
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import Connectable::*;
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import GetPut::*;
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import StmtFSM::*;
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//CSG Lib includes
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import PLBMaster::*;
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import PLBMasterDefaultParameters::*;
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import PLBMasterEmulator::*;
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//Local includes
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import MD6Parameters::*;
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import MD6Types::*;
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import MD6Control::*;
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import CompressionFunctionTypes::*;
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module mkMD6ControlTest ();
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  RegFile#(Bit#(26),BusWord) memory <- mkRegFileFullLoad("md6Input.hex");
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  PLBMasterEmulator#(TExp#(26)) plbmaster <- mkPLBMasterEmulator(memory);
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  MD6Control#(1,32) control <- mkMD6Control;
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  // Hook up the system
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  mkConnection(plbmaster.plbmaster.wordInput.put,control.wordOutput);
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  mkConnection(control.wordInput,plbmaster.plbmaster.wordOutput.get);
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  mkConnection(plbmaster.plbmaster.plbMasterCommandInput.put,control.outputCommand);
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  Reg#(Bit#(32)) memPtr <- mkReg(0);
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  RegFile#(Bit#(1), Bit#(32))  rfileSize <- mkRegFileFullLoad("inputSize.hex");
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  RegFile#(Bit#(TLog#(MD6_c)), BusWord) rfileRes <- mkRegFileFullLoad("md6Result.hex");
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  Reg#(Bit#(TAdd#(TLog#(MD6_c),1))) resPtr <- mkReg(0);
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  let inputSize = (((rfileSize.sub(0))/fromInteger(8*valueof(MD6_b))) + 1)*fromInteger(valueof(MD6_b));
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  Stmt s = seq
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             control.keyRegister <= unpack(0);
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             control.digestLength <= 512;
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             control.sourceAddress <= 0;
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             $display("Offset is: %d", inputSize);
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             control.destinationAddress <= 2*truncate(inputSize);
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             control.bufferAddress <= 4*truncate(inputSize);
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             $display("Bits input: %d", rfileSize.sub(0));
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             control.bitSize <= zeroExtend(rfileSize.sub(0));
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             control.bigEndian <= True;
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             control.startDecode();
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             await(!control.running);
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             delay(100);
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             for(resPtr <= 0;
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                 resPtr < fromInteger(valueof(MD6_c)) - 8; //result is 512 bits I suppose
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                 resPtr <= resPtr+1)
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             seq
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               if(rfileRes.sub(truncate(resPtr)) != memory.sub(truncate(zeroExtend(resPtr) +  inputSize + 8)))
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                 seq
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                   $display("Offset: %d rfile: %d",zeroExtend(resPtr), rfileSize.sub(0));
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                   $display("FAILED at %d, %h != %h", inputSize+zeroExtend(resPtr),rfileRes.sub(truncate(resPtr)),memory.sub(truncate(zeroExtend(resPtr) +  inputSize + 8)));
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                   $finish;
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                 endseq
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               else
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                 seq
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                   $display("Match at %d", zeroExtend(resPtr) + inputSize);
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                 endseq
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             endseq
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             $display("PASS");
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             $finish;
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           endseq;
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  FSM fsm <- mkFSM(s);
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  rule startFSM;
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    fsm.start;
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  endrule
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endmodule

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