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//////////////////////////////////////////////////////////////////////
////                                                              ////
//// random_ff_tb.v                                               ////
////                                                              ////
//// This file is part of the boundaries opencores effort.        ////
//// <http://www.opencores.org/cores/boundaries/>                 ////
////                                                              ////
//// Module Description:                                          ////
//// random flipflop testbench                                    ////
////                                                              ////
//// To Do:                                                       ////
//// Done.                                                        ////
////                                                              ////
//// Author(s):                                                   ////
//// - Shannon Hill                                               ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
////                                                              ////
//// Copyright (C) 2004 Shannon Hill and OPENCORES.ORG            ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// restriction provided that this copyright statement is not    ////
//// removed from the file and that any derivative work contains  ////
//// the original copyright notice and the associated disclaimer. ////
////                                                              ////
//// This source file is free software; you can redistribute it   ////
//// and/or modify it under the terms of the GNU Lesser General   ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any   ////
//// later version.                                               ////
////                                                              ////
//// This source is distributed in the hope that it will be       ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
//// PURPOSE. See the GNU Lesser General Public License for more  ////
//// details.                                                     ////
////                                                              ////
//// You should have received a copy of the GNU Lesser General    ////
//// Public License along with this source; if not, download it   ////
//// from <http://www.opencores.org/lgpl.shtml>                   ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
//
// $Id: random_ff_tb.v,v 1.1 2004-07-07 12:39:14 esquehill Exp $
//
// CVS Revision History
//
// $Log: not supported by cvs2svn $
//
//
 
`timescale 1ns/1ps
 
module random_ff_tb();
 
reg     CLRN;  //  reset when 0
reg     SETN;  // preset when 0
reg     D;
reg     CLK;
reg     SI;
reg     SE;
 
wire    Q;
 
real       cur_delta;
parameter  max_delta = 10.0;
 
integer    asy_count;
integer    syn_count;
 
reg       [3:0] cur_state;
parameter [3:0] D2C = 4'd0;
parameter [3:0] R2C = 4'd1;
parameter [3:0] P2C = 4'd2;
parameter [3:0] R2P = 4'd3;
parameter [3:0] RW  = 4'd4;
parameter [3:0] PW  = 4'd5;
parameter [3:0] RX  = 4'd6;
parameter [3:0] PX  = 4'd7;
parameter [3:0] SE2C= 4'd8;
parameter [3:0] CKX = 4'd9;
parameter [3:0] DONE= 4'd10;
 
initial
begin
 cur_state   = 4'h0;
 cur_delta   = max_delta / 4.0;
       CLRN <= 1'b1;
       SETN <= 1'b1;
         D  <= 1'b0;
       CLK  <= 1'b0;
        SI  <= 1'b0;
        SE  <= 1'b0;
 #(0.3);
  asy_count  = 0;
  syn_count  = 0;
end
 
always #(max_delta/2.0) CLK <= ~CLK;
 
always @( u_ff.asy_notify ) asy_count = asy_count + 1;
always @( u_ff.syn_notify ) syn_count = syn_count + 1;
 
always @( negedge CLK )
begin
 
case( cur_state )
 
D2C: begin // D vs. CLK
     cur_delta = cur_delta + 0.100;
     #(cur_delta) D <= ~D;
     if( cur_delta >= (max_delta - (max_delta/4.0)) )
      begin
       cur_delta = max_delta / 4.0;
 
       cur_state <= R2C;
 
       if( asy_count != 0  )
           begin
           $display( "%d:D2C wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);
           $stop;
           end
       if( syn_count != 10 )
           begin
           $display( "%d:D2C wrong number of  sync setup/hold violations exp=10,act=%d",$time,syn_count);
           $stop;
           end
 
       asy_count = 0;
       syn_count = 0;
      end
     end
 
R2C: begin // CLRN de-assertion vs. CLK
     cur_delta = cur_delta + 0.100;
     #(cur_delta    ) CLRN <= 0;
     #(cur_delta+0.5) CLRN <= 1;
     if( cur_delta >= (max_delta - (max_delta/4.0)) )
      begin
       cur_delta = max_delta / 4.0;
 
       cur_state <= P2C;
 
       if( asy_count != 6 )
           begin
           $display( "%d:R2C wrong number of async setup/hold violations exp=06,act=%d",$time,asy_count);
           $stop;
           end
       if( syn_count != 0 )
           begin
           $display( "%d:R2C wrong number of  sync setup/hold violations exp=00,act=%d",$time,syn_count);
           $stop;
           end
       asy_count = 0;
       syn_count = 0;
      end
     end
 
P2C: begin // SETN de-assertion vs. CLK
     cur_delta = cur_delta + 0.100;
     #(cur_delta  ) SETN <= 0;
     #(0.7)         SETN <= 1;
     if( cur_delta >= (max_delta - (max_delta/4.0)) )
      begin
       cur_delta = max_delta / 4.0;
       cur_state <= R2P;
       if( asy_count != 11)
           begin
           $display( "%d:P2C wrong number of async setup/hold violations exp=11,act=%d",$time,asy_count);
           $stop;
           end
 
       if( syn_count != 0 )
           begin
           $display( "%d:P2C wrong number of  sync setup/hold violations exp=00,act=%d",$time,syn_count);
           $stop;
           end
 
       asy_count = 0;
       syn_count = 0;
      end
     end
 
R2P: begin // SETN vs CLRN;
     CLRN <= ~CLRN;   // toggles every time
     cur_delta = cur_delta + 0.100;
     #(cur_delta ) SETN <= 0;
     #( 0.7      ) SETN <= 1;
     if( cur_delta >= max_delta )
      begin
       cur_delta = max_delta / 4.0;
 
       cur_state <= RW;
 
       if( asy_count != 8 )
           begin
           $display( "%d:R2P wrong number of async setup/hold violations exp=08,act=%d",$time,asy_count);
           $stop;
           end
       if( syn_count != 0 )
           begin
           $display( "%d:R2P wrong number of  sync setup/hold violations exp=00,act=%d",$time,syn_count);
           $stop;
           end
       asy_count = 0;
       syn_count = 0;
      end
    end
 
RW: begin // CLRN width
             CLRN <= 1'b0;
            #(0.3);
             CLRN <= 1'b1;
            #(0.6);
 
      cur_state <= PW;
 
       if( asy_count != 1 )
           begin
           $display( "%d:RW wrong number of async setup/hold violations exp=01,act=%d",$time,asy_count);
           $stop;
           end
       if( syn_count != 0 )
           begin
           $display( "%d:RW wrong number of  sync setup/hold violations exp=00,act=%d",$time,syn_count);
           $stop;
           end
       asy_count = 0;
       syn_count = 0;
    end
 
PW: begin // SETN width
             SETN <= 1'b0;
            #(0.3);
             SETN <= 1'b1;
            #(0.6);
 
      cur_state <= RX;
 
       if( asy_count != 1 )
           begin
           $display( "%d:PW wrong number of async setup/hold violations exp=01,act=%d",$time,asy_count);
           $stop;
           end
       if( syn_count != 0 )
           begin
           $display( "%d:PW wrong number of  sync setup/hold violations exp=00,act=%d",$time,syn_count);
           $stop;
           end
       asy_count = 0;
       syn_count = 0;
     end
 
RX: begin // CLRN goes X
             CLRN <= 1'bX;
            #(0.6);
             CLRN <= 1'b1;
            #(0.6);
 
             if( Q !== 1'bX )
             begin
               $display( "%d:%m: Q !== X after CLRN X glitch",$time);
               $stop;
             end
 
             CLRN <= 1'b0;
            #(0.6);
             CLRN <= 1'b1;
 
      cur_state <= PX;
 
       if( asy_count != 0 )
           begin
           $display( "%d:RX wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);
           $stop;
           end
       if( syn_count != 0 )
           begin
           $display( "%d:RX wrong number of  sync setup/hold violations exp=00,act=%d",$time,syn_count);
           $stop;
           end
       asy_count = 0;
       syn_count = 0;
     end
 
PX: begin // SETN goes X
             SETN <= 1'bX;
            #(0.6);
             SETN <= 1'b1;
            #(0.6);
 
             if( Q !== 1'bX )
             begin
               $display( "%d:%m: Q !== X after SETN X glitch",$time);
               $stop;
             end
 
             SETN <= 1'b0;
            #(0.6);
             SETN <= 1'b1;
 
      cur_state <= SE2C;
 
       if( asy_count != 0 )
           begin
           $display( "%d:PX wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);
           $stop;
           end
       if( syn_count != 0 )
           begin
           $display( "%d:PX wrong number of  sync setup/hold violations exp=00,act=%d",$time,syn_count);
           $stop;
           end
 
       asy_count = 0;
       syn_count = 0;
    end
 
SE2C: begin // SE vs. CLK
     cur_delta = cur_delta + 0.100;
     #(cur_delta) SE <= ~SE;
     if( cur_delta >= (max_delta - (max_delta/4.0)) )
      begin
       cur_delta = max_delta / 4.0;
       SE        <= 1'b0;
 
       cur_state <= CKX;
 
       if( asy_count != 0 )
           begin
           $display( "%d:SE2C wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);
           $stop;
           end
       if( syn_count != 11)
           begin
           $display( "%d:SE2C wrong number of  sync setup/hold violations exp=11,act=%d",$time,syn_count);
           $stop;
           end
        asy_count = 0;
        syn_count = 0;
      end
     end
 
CKX: begin // CLK goes X
            CLK   <= 1'bX;
           #(0.6);
            CLK   <= 1'b1;
           #(0.6);
 
             if( Q !== 1'bX )
             begin
               $display( "%d:%m: Q !== X after CLK X glitch",$time);
               $stop;
             end
 
       cur_state <= DONE;
 
       if( asy_count != 0 )
           begin
           $display( "%d:CKX wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);
           $stop;
           end
       if( syn_count != 0 )
           begin
           $display( "%d:CKX wrong number of  sync setup/hold violations exp=00,act=%d",$time,syn_count);
           $stop;
           end
        asy_count = 0;
        syn_count = 0;
     end
 
DONE: begin
     #(100);
     $display("OK");
     $finish;
      end
 
default: ;
endcase
end
 
random_ff u_ff ( /*AUTOINST*/
                // Outputs
                .Q                      (Q),
                // Inputs
                .D                      (D),
                .CLK                    (CLK),
                .CLRN                   (CLRN),
                .SETN                   (SETN),
                .SI                     (SI),
                .SE                     (SE));
 
endmodule
 

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[/] [boundaries/] [trunk/] [bench/] [verilog/] [random_ff_tb.v] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	esquehill	`//////////////////////////////////////////////////////////////////////`
2			`//// ////`
3			`//// random_ff_tb.v ////`
4			`//// ////`
5			`//// This file is part of the boundaries opencores effort. ////`
6			`//// <http://www.opencores.org/cores/boundaries/> ////`
7			`//// ////`
8			`//// Module Description: ////`
9			`//// random flipflop testbench ////`
10			`//// ////`
11			`//// To Do: ////`
12			`//// Done. ////`
13			`//// ////`
14			`//// Author(s): ////`
15			`//// - Shannon Hill ////`
16			`//// ////`
17			`//////////////////////////////////////////////////////////////////////`
18			`//// ////`
19			`//// Copyright (C) 2004 Shannon Hill and OPENCORES.ORG ////`
20			`//// ////`
21			`//// This source file may be used and distributed without ////`
22			`//// restriction provided that this copyright statement is not ////`
23			`//// removed from the file and that any derivative work contains ////`
24			`//// the original copyright notice and the associated disclaimer. ////`
25			`//// ////`
26			`//// This source file is free software; you can redistribute it ////`
27			`//// and/or modify it under the terms of the GNU Lesser General ////`
28			`//// Public License as published by the Free Software Foundation; ////`
29			`//// either version 2.1 of the License, or (at your option) any ////`
30			`//// later version. ////`
31			`//// ////`
32			`//// This source is distributed in the hope that it will be ////`
33			`//// useful, but WITHOUT ANY WARRANTY; without even the implied ////`
34			`//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////`
35			`//// PURPOSE. See the GNU Lesser General Public License for more ////`
36			`//// details. ////`
37			`//// ////`
38			`//// You should have received a copy of the GNU Lesser General ////`
39			`//// Public License along with this source; if not, download it ////`
40			`//// from <http://www.opencores.org/lgpl.shtml> ////`
41			`//// ////`
42			`//////////////////////////////////////////////////////////////////////`
43			`//`
44			`// $Id: random_ff_tb.v,v 1.1 2004-07-07 12:39:14 esquehill Exp $`
45			`//`
46			`// CVS Revision History`
47			`//`
48			`// $Log: not supported by cvs2svn $`
49			`//`
50			`//`
51
52			`timescale 1ns/1ps
53
54			`module random_ff_tb();`
55
56			`reg CLRN; // reset when 0`
57			`reg SETN; // preset when 0`
58			`reg D;`
59			`reg CLK;`
60			`reg SI;`
61			`reg SE;`
62
63			`wire Q;`
64
65			`real cur_delta;`
66			`parameter max_delta = 10.0;`
67
68			`integer asy_count;`
69			`integer syn_count;`
70
71			`reg [3:0] cur_state;`
72			`parameter [3:0] D2C = 4'd0;`
73			`parameter [3:0] R2C = 4'd1;`
74			`parameter [3:0] P2C = 4'd2;`
75			`parameter [3:0] R2P = 4'd3;`
76			`parameter [3:0] RW = 4'd4;`
77			`parameter [3:0] PW = 4'd5;`
78			`parameter [3:0] RX = 4'd6;`
79			`parameter [3:0] PX = 4'd7;`
80			`parameter [3:0] SE2C= 4'd8;`
81			`parameter [3:0] CKX = 4'd9;`
82			`parameter [3:0] DONE= 4'd10;`
83
84			`initial`
85			`begin`
86			`cur_state = 4'h0;`
87			`cur_delta = max_delta / 4.0;`
88			`CLRN <= 1'b1;`
89			`SETN <= 1'b1;`
90			`D <= 1'b0;`
91			`CLK <= 1'b0;`
92			`SI <= 1'b0;`
93			`SE <= 1'b0;`
94			`#(0.3);`
95			`asy_count = 0;`
96			`syn_count = 0;`
97			`end`
98
99			`always #(max_delta/2.0) CLK <= ~CLK;`
100
101			`always @( u_ff.asy_notify ) asy_count = asy_count + 1;`
102			`always @( u_ff.syn_notify ) syn_count = syn_count + 1;`
103
104			`always @( negedge CLK )`
105			`begin`
106
107			`case( cur_state )`
108
109			`D2C: begin // D vs. CLK`
110			`cur_delta = cur_delta + 0.100;`
111			`#(cur_delta) D <= ~D;`
112			`if( cur_delta >= (max_delta - (max_delta/4.0)) )`
113			`begin`
114			`cur_delta = max_delta / 4.0;`
115
116			`cur_state <= R2C;`
117
118			`if( asy_count != 0 )`
119			`begin`
120			`$display( "%d:D2C wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);`
121			`$stop;`
122			`end`
123			`if( syn_count != 10 )`
124			`begin`
125			`$display( "%d:D2C wrong number of sync setup/hold violations exp=10,act=%d",$time,syn_count);`
126			`$stop;`
127			`end`
128
129			`asy_count = 0;`
130			`syn_count = 0;`
131			`end`
132			`end`
133
134			`R2C: begin // CLRN de-assertion vs. CLK`
135			`cur_delta = cur_delta + 0.100;`
136			`#(cur_delta ) CLRN <= 0;`
137			`#(cur_delta+0.5) CLRN <= 1;`
138			`if( cur_delta >= (max_delta - (max_delta/4.0)) )`
139			`begin`
140			`cur_delta = max_delta / 4.0;`
141
142			`cur_state <= P2C;`
143
144			`if( asy_count != 6 )`
145			`begin`
146			`$display( "%d:R2C wrong number of async setup/hold violations exp=06,act=%d",$time,asy_count);`
147			`$stop;`
148			`end`
149			`if( syn_count != 0 )`
150			`begin`
151			`$display( "%d:R2C wrong number of sync setup/hold violations exp=00,act=%d",$time,syn_count);`
152			`$stop;`
153			`end`
154			`asy_count = 0;`
155			`syn_count = 0;`
156			`end`
157			`end`
158
159			`P2C: begin // SETN de-assertion vs. CLK`
160			`cur_delta = cur_delta + 0.100;`
161			`#(cur_delta ) SETN <= 0;`
162			`#(0.7) SETN <= 1;`
163			`if( cur_delta >= (max_delta - (max_delta/4.0)) )`
164			`begin`
165			`cur_delta = max_delta / 4.0;`
166			`cur_state <= R2P;`
167			`if( asy_count != 11)`
168			`begin`
169			`$display( "%d:P2C wrong number of async setup/hold violations exp=11,act=%d",$time,asy_count);`
170			`$stop;`
171			`end`
172
173			`if( syn_count != 0 )`
174			`begin`
175			`$display( "%d:P2C wrong number of sync setup/hold violations exp=00,act=%d",$time,syn_count);`
176			`$stop;`
177			`end`
178
179			`asy_count = 0;`
180			`syn_count = 0;`
181			`end`
182			`end`
183
184			`R2P: begin // SETN vs CLRN;`
185			`CLRN <= ~CLRN; // toggles every time`
186			`cur_delta = cur_delta + 0.100;`
187			`#(cur_delta ) SETN <= 0;`
188			`#( 0.7 ) SETN <= 1;`
189			`if( cur_delta >= max_delta )`
190			`begin`
191			`cur_delta = max_delta / 4.0;`
192
193			`cur_state <= RW;`
194
195			`if( asy_count != 8 )`
196			`begin`
197			`$display( "%d:R2P wrong number of async setup/hold violations exp=08,act=%d",$time,asy_count);`
198			`$stop;`
199			`end`
200			`if( syn_count != 0 )`
201			`begin`
202			`$display( "%d:R2P wrong number of sync setup/hold violations exp=00,act=%d",$time,syn_count);`
203			`$stop;`
204			`end`
205			`asy_count = 0;`
206			`syn_count = 0;`
207			`end`
208			`end`
209
210			`RW: begin // CLRN width`
211			`CLRN <= 1'b0;`
212			`#(0.3);`
213			`CLRN <= 1'b1;`
214			`#(0.6);`
215
216			`cur_state <= PW;`
217
218			`if( asy_count != 1 )`
219			`begin`
220			`$display( "%d:RW wrong number of async setup/hold violations exp=01,act=%d",$time,asy_count);`
221			`$stop;`
222			`end`
223			`if( syn_count != 0 )`
224			`begin`
225			`$display( "%d:RW wrong number of sync setup/hold violations exp=00,act=%d",$time,syn_count);`
226			`$stop;`
227			`end`
228			`asy_count = 0;`
229			`syn_count = 0;`
230			`end`
231
232			`PW: begin // SETN width`
233			`SETN <= 1'b0;`
234			`#(0.3);`
235			`SETN <= 1'b1;`
236			`#(0.6);`
237
238			`cur_state <= RX;`
239
240			`if( asy_count != 1 )`
241			`begin`
242			`$display( "%d:PW wrong number of async setup/hold violations exp=01,act=%d",$time,asy_count);`
243			`$stop;`
244			`end`
245			`if( syn_count != 0 )`
246			`begin`
247			`$display( "%d:PW wrong number of sync setup/hold violations exp=00,act=%d",$time,syn_count);`
248			`$stop;`
249			`end`
250			`asy_count = 0;`
251			`syn_count = 0;`
252			`end`
253
254			`RX: begin // CLRN goes X`
255			`CLRN <= 1'bX;`
256			`#(0.6);`
257			`CLRN <= 1'b1;`
258			`#(0.6);`
259
260			`if( Q !== 1'bX )`
261			`begin`
262			`$display( "%d:%m: Q !== X after CLRN X glitch",$time);`
263			`$stop;`
264			`end`
265
266			`CLRN <= 1'b0;`
267			`#(0.6);`
268			`CLRN <= 1'b1;`
269
270			`cur_state <= PX;`
271
272			`if( asy_count != 0 )`
273			`begin`
274			`$display( "%d:RX wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);`
275			`$stop;`
276			`end`
277			`if( syn_count != 0 )`
278			`begin`
279			`$display( "%d:RX wrong number of sync setup/hold violations exp=00,act=%d",$time,syn_count);`
280			`$stop;`
281			`end`
282			`asy_count = 0;`
283			`syn_count = 0;`
284			`end`
285
286			`PX: begin // SETN goes X`
287			`SETN <= 1'bX;`
288			`#(0.6);`
289			`SETN <= 1'b1;`
290			`#(0.6);`
291
292			`if( Q !== 1'bX )`
293			`begin`
294			`$display( "%d:%m: Q !== X after SETN X glitch",$time);`
295			`$stop;`
296			`end`
297
298			`SETN <= 1'b0;`
299			`#(0.6);`
300			`SETN <= 1'b1;`
301
302			`cur_state <= SE2C;`
303
304			`if( asy_count != 0 )`
305			`begin`
306			`$display( "%d:PX wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);`
307			`$stop;`
308			`end`
309			`if( syn_count != 0 )`
310			`begin`
311			`$display( "%d:PX wrong number of sync setup/hold violations exp=00,act=%d",$time,syn_count);`
312			`$stop;`
313			`end`
314
315			`asy_count = 0;`
316			`syn_count = 0;`
317			`end`
318
319			`SE2C: begin // SE vs. CLK`
320			`cur_delta = cur_delta + 0.100;`
321			`#(cur_delta) SE <= ~SE;`
322			`if( cur_delta >= (max_delta - (max_delta/4.0)) )`
323			`begin`
324			`cur_delta = max_delta / 4.0;`
325			`SE <= 1'b0;`
326
327			`cur_state <= CKX;`
328
329			`if( asy_count != 0 )`
330			`begin`
331			`$display( "%d:SE2C wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);`
332			`$stop;`
333			`end`
334			`if( syn_count != 11)`
335			`begin`
336			`$display( "%d:SE2C wrong number of sync setup/hold violations exp=11,act=%d",$time,syn_count);`
337			`$stop;`
338			`end`
339			`asy_count = 0;`
340			`syn_count = 0;`
341			`end`
342			`end`
343
344			`CKX: begin // CLK goes X`
345			`CLK <= 1'bX;`
346			`#(0.6);`
347			`CLK <= 1'b1;`
348			`#(0.6);`
349
350			`if( Q !== 1'bX )`
351			`begin`
352			`$display( "%d:%m: Q !== X after CLK X glitch",$time);`
353			`$stop;`
354			`end`
355
356			`cur_state <= DONE;`
357
358			`if( asy_count != 0 )`
359			`begin`
360			`$display( "%d:CKX wrong number of async setup/hold violations exp=00,act=%d",$time,asy_count);`
361			`$stop;`
362			`end`
363			`if( syn_count != 0 )`
364			`begin`
365			`$display( "%d:CKX wrong number of sync setup/hold violations exp=00,act=%d",$time,syn_count);`
366			`$stop;`
367			`end`
368			`asy_count = 0;`
369			`syn_count = 0;`
370			`end`
371
372			`DONE: begin`
373			`#(100);`
374			`$display("OK");`
375			`$finish;`
376			`end`
377
378			`default: ;`
379			`endcase`
380			`end`
381
382			`random_ff u_ff ( /AUTOINST/`
383			`// Outputs`
384			`.Q (Q),`
385			`// Inputs`
386			`.D (D),`
387			`.CLK (CLK),`
388			`.CLRN (CLRN),`
389			`.SETN (SETN),`
390			`.SI (SI),`
391			`.SE (SE));`
392
393			`endmodule`
394