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[/] [brisc/] [trunk/] [mux2r.v] - Blame information for rev 3

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1 2 waqqas.jab
module mux2r( mux_out, data_0, data_1, select, reset_n);
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        parameter dw = 8;
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        input [dw-1:0] data_1, data_0;
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        input [0:0] select;
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        input reset_n;
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        output reg [dw-1:0] mux_out;
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         // choose between the two inputs
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        always @ ( data_1 or data_0 or select or reset_n)
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        if(!reset_n)
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        begin
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           mux_out = 0;
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        end
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        else
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        begin
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        case (select)//  (* synthesis parallel_case *)
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                   1'd0:                mux_out = data_0;
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                   1'd1:                mux_out = data_1;
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                   default:     mux_out = {dw{1'bx}};
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       endcase
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   end
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endmodule

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