Subversion Repositories bu_pacman

## NOTE:  Do not edit this file.

## Autogenerated by ProjNav (creatfdo.tcl) on Thu Nov 20 8:06:47 PM Eastern Standard Time 2008

##

vlib work

vlog +acc  "blk_mem_gen_v2_7.v"

vlog +acc  "test_mem_init.v"

vlog +acc  "C:/Xilinx/10.1/ISE/verilog/src/glbl.v"

vsim -t 1ps   -L xilinxcorelib_ver -L unisims_ver -L unimacro_ver -lib work test_mem_init glbl

do {test_mem_init_wave.fdo}

view wave

view structure

view signals

run 1000ns

do {test_mem_init.udo}