OpenCores
URL https://opencores.org/ocsvn/c0or1k/c0or1k/trunk

Subversion Repositories c0or1k

[/] [c0or1k/] [trunk/] [conts/] [posix/] [libposix/] [include/] [posix/] [bits/] [fenv.h] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 drasko
/* Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
2
   This file is part of the GNU C Library.
3
 
4
   The GNU C Library is free software; you can redistribute it and/or
5
   modify it under the terms of the GNU Lesser General Public
6
   License as published by the Free Software Foundation; either
7
   version 2.1 of the License, or (at your option) any later version.
8
 
9
   The GNU C Library is distributed in the hope that it will be useful,
10
   but WITHOUT ANY WARRANTY; without even the implied warranty of
11
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12
   Lesser General Public License for more details.
13
 
14
   You should have received a copy of the GNU Lesser General Public
15
   License along with the GNU C Library; if not, write to the Free
16
   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17
   02111-1307 USA.  */
18
 
19
#ifndef _FENV_H
20
# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
21
#endif
22
 
23
#ifdef __MAVERICK__
24
 
25
/* Define bits representing exceptions in the FPU status word.  */
26
enum
27
  {
28
    FE_INVALID = 1,
29
#define FE_INVALID FE_INVALID
30
    FE_OVERFLOW = 4,
31
#define FE_OVERFLOW FE_OVERFLOW
32
    FE_UNDERFLOW = 8,
33
#define FE_UNDERFLOW FE_UNDERFLOW
34
    FE_INEXACT = 16,
35
#define FE_INEXACT FE_INEXACT
36
  };
37
 
38
/* Amount to shift by to convert an exception to a mask bit.  */
39
#define FE_EXCEPT_SHIFT    5
40
 
41
/* All supported exceptions.  */
42
#define FE_ALL_EXCEPT  \
43
        (FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT)
44
 
45
/* IEEE rounding modes.  */
46
enum
47
  {
48
    FE_TONEAREST = 0,
49
#define FE_TONEAREST    FE_TONEAREST
50
    FE_TOWARDZERO = 0x400,
51
#define FE_TOWARDZERO   FE_TOWARDZERO
52
    FE_DOWNWARD = 0x800,
53
#define FE_DOWNWARD     FE_DOWNWARD
54
    FE_UPWARD = 0xc00,
55
#define FE_UPWARD       FE_UPWARD
56
  };
57
 
58
#define FE_ROUND_MASK (FE_UPWARD)
59
 
60
#else /* !__MAVERICK__ */
61
 
62
/* Define bits representing exceptions in the FPU status word.  */
63
enum
64
  {
65
    FE_INVALID = 1,
66
#define FE_INVALID FE_INVALID
67
    FE_DIVBYZERO = 2,
68
#define FE_DIVBYZERO FE_DIVBYZERO
69
    FE_OVERFLOW = 4,
70
#define FE_OVERFLOW FE_OVERFLOW
71
    FE_UNDERFLOW = 8,
72
#define FE_UNDERFLOW FE_UNDERFLOW
73
  };
74
 
75
/* Amount to shift by to convert an exception to a mask bit.  */
76
#define FE_EXCEPT_SHIFT 16
77
 
78
/* All supported exceptions.  */
79
#define FE_ALL_EXCEPT   \
80
        (FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW)
81
 
82
/* The ARM FPU basically only supports round-to-nearest.  Other rounding
83
   modes exist, but you have to encode them in the actual instruction.  */
84
#define FE_TONEAREST    0
85
 
86
#endif /* __MAVERICK__ */
87
 
88
/* Type representing exception flags. */
89
typedef unsigned long int fexcept_t;
90
 
91
/* Type representing floating-point environment.  */
92
typedef struct
93
  {
94
    unsigned long int __cw;
95
  }
96
fenv_t;
97
 
98
/* If the default argument is used we use this value.  */
99
#define FE_DFL_ENV      ((fenv_t *) -1l)

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.