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[/] [c0or1k/] [trunk/] [include/] [l4/] [arch/] [arm/] [scu.h] - Blame information for rev 6

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Line No. Rev Author Line
1 2 drasko
/*
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 * SCU registers
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 *
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 * Copyright (C) 2010 B Labs Ltd.
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 *
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 * Author: Prem Mallappa
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 */
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#ifndef __SCU_H__
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#define __SCU_H__
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/* Following defines may well go into realview/scu.h */
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#define SCU_CTRL_REG            0x00 /* Control Register */
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#define SCU_CFG_REG             0x04 /* Configuration Register */
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#define SCU_CPU_PWR_REG         0x08 /* SCU CPU Power state register */
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#define SCU_INV_ALL_S           0x0C /* SCU Invalidate all Secure Registers */
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#define SCU_ACCESS_REG_S        0x50 /* SCU Access Control Secure */
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#define SCU_ACCESS_REG_NS       0x54 /* SCU Access Control Non-Secure */
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/* The contents of CONTROL AND CONFIG are Implementation Defined. so they may go into platform specific scu.h */
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#define SCU_CTRL_EN             (1 << 0)
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#define SCU_CTRL_ADDR_FLTR_EN   (1 << 1)
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#define SCU_CTRL_PARITY_ON      (1 << 2)
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#define SCU_CTRL_STBY_EN        (1 << 5) /* SCU StandBy Enable */
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#define SCU_CTRL_GIC_STBY_EN    (1 << 6) /* GIC Standby enable */
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/* Config register */
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#define SCU_CFG_SMP_MASK        0x000000f0
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#define SCU_CFG_TAG_RAM_MASK    0x0000ff00
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#define SCU_CFG_NCPU_MASK       0x7
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#define SCU_CFG_SMP_NCPU_SHIFT  4
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#endif /* __SCU_H__ */

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