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[/] [c0or1k/] [trunk/] [src/] [platform/] [pb11mpcore/] [printascii.S.ARM] - Blame information for rev 7

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/*
 * Basic UART printing.
 */
#include INC_ARCH(asm.h)
#include INC_GLUE(memlayout.h)
#include INC_PLAT(offsets.h)
#include INC_SUBARCH(mm.h)
 
#define UART_DATA_OFFSET                0x0
 
#define UART0_PHYS_BASE                 PB11MPCORE_UART0_BASE
#define UART0_PHYS_BYTE1                (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2                (UART0_PHYS_BASE & 0x00FF0000)
#define UART0_PHYS_BYTE3_4              (UART0_PHYS_BASE & 0x0000FFFF)
 
#define UART0_VIRT_BASE                 PB11MPCORE_UART0_VBASE
#define UART0_VIRT_BYTE1                (UART0_VIRT_BASE & 0xFF000000)
#define UART0_VIRT_BYTE2                (UART0_VIRT_BASE & 0x00FF0000)
#define UART0_VIRT_BYTE3_4              (UART0_VIRT_BASE & 0x0000FFFF)
 
        .macro uart_address rx
        mrc     p15, 0, \rx, c1, c0
        tst     \rx, #1         @ MMU enabled?
        moveq   \rx, #UART0_PHYS_BYTE1
        orreq   \rx, #UART0_PHYS_BYTE2
        orreq   \rx, #UART0_PHYS_BYTE3_4
        movne   \rx, #UART0_VIRT_BYTE1
        orrne   \rx, #UART0_VIRT_BYTE2
        orrne   \rx, #UART0_VIRT_BYTE3_4
        .endm
 
        .macro uart_send, ry, rx
        strb    \ry, [\rx, #UART_DATA_OFFSET]
        .endm
 
        .macro uart_wait, ry, rx
501:
        ldr     \ry, [\rx, #0x18]
        tst     \ry, #1 << 5
        bne     501b
        .endm
 
        .macro uart_busy, ry, rx
501:
        ldr     \ry, [\rx, #0x18]
        tst     \ry, #1 << 3
        bne     501b
        .endm
 
                .text
/*
 * Useful debugging routines
 */
BEGIN_PROC(printhex8)
                mov     r1, #8
                b       printhex
 
BEGIN_PROC(printhex4)
                mov     r1, #4
                b       printhex
 
BEGIN_PROC(printhex2)
                mov     r1, #2
printhex:       adr     r2, hexbuf
@printhex:      ldr     r2, =hexbuf
                add     r3, r2, r1
                mov     r1, #0
                strb    r1, [r3]
1:              and     r1, r0, #15
                mov     r0, r0, lsr #4
                cmp     r1, #10
                addlt   r1, r1, #'0'
                addge   r1, r1, #'a' - 10
                strb    r1, [r3, #-1]!
                teq     r3, r2
                bne     1b
                mov     r0, r2
                b       printascii
 
                .ltorg
 
 
        .align
 
        @ vmem-linked image has strings in vmem addresses. This replaces
        @ the reference with corresponding physical address. Note this
        @ won't work if memory offsets aren't clear cut values for
        @ orr'ing and bic'ing. rm = mmu bits rs = string address.
        .macro get_straddr rs, rm
                mrc     p15, 0, \rm, c1, c0             @ Get MMU bits.
                tst     \rm, #1                         @ MMU enabled?
                @subeq  \rs, \rs, #KERNEL_AREA_START
                biceq   \rs, \rs, #KERNEL_AREA_START    @ Clear Virtual mem offset.
                @orreq  \rs, \rs, #PHYS_ADDR_BASE       @ Add Phy mem offset.
        .endm
 
BEGIN_PROC(printascii)
                get_straddr r0, r1
                uart_address r3
                b       2f
1:              uart_wait r2, r3
                uart_send r1, r3
                uart_busy r2, r3
                teq     r1, #'\n'
                moveq   r1, #'\r'
                beq     1b
2:              teq     r0, #0
                ldrneb  r1, [r0], #1
                teqne   r1, #0
                bne     1b
                mov     pc, lr
END_PROC(printascii)
 
BEGIN_PROC(printch)
                uart_address r3
                mov     r1, r0
                mov     r0, #0
                b       1b
 
hexbuf:         .space 16
 

Line No.	Rev	Author	Line
1	2	drasko	`/*`
2			`* Basic UART printing.`
3			`*/`
4			`#include INC_ARCH(asm.h)`
5			`#include INC_GLUE(memlayout.h)`
6			`#include INC_PLAT(offsets.h)`
7			`#include INC_SUBARCH(mm.h)`
8
9			`#define UART_DATA_OFFSET 0x0`
10
11			`#define UART0_PHYS_BASE PB11MPCORE_UART0_BASE`
12			`#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)`
13			`#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)`
14			`#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF)`
15
16			`#define UART0_VIRT_BASE PB11MPCORE_UART0_VBASE`
17			`#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000)`
18			`#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000)`
19			`#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF)`
20
21			`.macro uart_address rx`
22			`mrc p15, 0, \rx, c1, c0`
23			`tst \rx, #1 @ MMU enabled?`
24			`moveq \rx, #UART0_PHYS_BYTE1`
25			`orreq \rx, #UART0_PHYS_BYTE2`
26			`orreq \rx, #UART0_PHYS_BYTE3_4`
27			`movne \rx, #UART0_VIRT_BYTE1`
28			`orrne \rx, #UART0_VIRT_BYTE2`
29			`orrne \rx, #UART0_VIRT_BYTE3_4`
30			`.endm`
31
32			`.macro uart_send, ry, rx`
33			`strb \ry, [\rx, #UART_DATA_OFFSET]`
34			`.endm`
35
36			`.macro uart_wait, ry, rx`
37			`501:`
38			`ldr \ry, [\rx, #0x18]`
39			`tst \ry, #1 << 5`
40			`bne 501b`
41			`.endm`
42
43			`.macro uart_busy, ry, rx`
44			`501:`
45			`ldr \ry, [\rx, #0x18]`
46			`tst \ry, #1 << 3`
47			`bne 501b`
48			`.endm`
49
50			`.text`
51			`/*`
52			`* Useful debugging routines`
53			`*/`
54			`BEGIN_PROC(printhex8)`
55			`mov r1, #8`
56			`b printhex`
57
58			`BEGIN_PROC(printhex4)`
59			`mov r1, #4`
60			`b printhex`
61
62			`BEGIN_PROC(printhex2)`
63			`mov r1, #2`
64			`printhex: adr r2, hexbuf`
65			`@printhex: ldr r2, =hexbuf`
66			`add r3, r2, r1`
67			`mov r1, #0`
68			`strb r1, [r3]`
69			`1: and r1, r0, #15`
70			`mov r0, r0, lsr #4`
71			`cmp r1, #10`
72			`addlt r1, r1, #'0'`
73			`addge r1, r1, #'a' - 10`
74			`strb r1, [r3, #-1]!`
75			`teq r3, r2`
76			`bne 1b`
77			`mov r0, r2`
78			`b printascii`
79
80			`.ltorg`
81
82
83			`.align`
84
85			`@ vmem-linked image has strings in vmem addresses. This replaces`
86			`@ the reference with corresponding physical address. Note this`
87			`@ won't work if memory offsets aren't clear cut values for`
88			`@ orr'ing and bic'ing. rm = mmu bits rs = string address.`
89			`.macro get_straddr rs, rm`
90			`mrc p15, 0, \rm, c1, c0 @ Get MMU bits.`
91			`tst \rm, #1 @ MMU enabled?`
92			`@subeq \rs, \rs, #KERNEL_AREA_START`
93			`biceq \rs, \rs, #KERNEL_AREA_START @ Clear Virtual mem offset.`
94			`@orreq \rs, \rs, #PHYS_ADDR_BASE @ Add Phy mem offset.`
95			`.endm`
96
97			`BEGIN_PROC(printascii)`
98			`get_straddr r0, r1`
99			`uart_address r3`
100			`b 2f`
101			`1: uart_wait r2, r3`
102			`uart_send r1, r3`
103			`uart_busy r2, r3`
104			`teq r1, #'\n'`
105			`moveq r1, #'\r'`
106			`beq 1b`
107			`2: teq r0, #0`
108			`ldrneb r1, [r0], #1`
109			`teqne r1, #0`
110			`bne 1b`
111			`mov pc, lr`
112			`END_PROC(printascii)`
113
114			`BEGIN_PROC(printch)`
115			`uart_address r3`
116			`mov r1, r0`
117			`mov r0, #0`
118			`b 1b`
119
120			`hexbuf: .space 16`
121

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[/] [c0or1k/] [trunk/] [src/] [platform/] [pb11mpcore/] [printascii.S.ARM] - Blame information for rev 7