| 1 |
71 |
mohor |
//////////////////////////////////////////////////////////////////////
|
| 2 |
|
|
//// ////
|
| 3 |
|
|
//// can_defines.v ////
|
| 4 |
|
|
//// ////
|
| 5 |
|
|
//// ////
|
| 6 |
|
|
//// This file is part of the CAN Protocol Controller ////
|
| 7 |
|
|
//// http://www.opencores.org/projects/can/ ////
|
| 8 |
|
|
//// ////
|
| 9 |
|
|
//// ////
|
| 10 |
|
|
//// Author(s): ////
|
| 11 |
|
|
//// Igor Mohor ////
|
| 12 |
|
|
//// igorm@opencores.org ////
|
| 13 |
|
|
//// ////
|
| 14 |
|
|
//// ////
|
| 15 |
|
|
//// All additional information is available in the README.txt ////
|
| 16 |
|
|
//// file. ////
|
| 17 |
|
|
//// ////
|
| 18 |
|
|
//////////////////////////////////////////////////////////////////////
|
| 19 |
|
|
//// ////
|
| 20 |
|
|
//// Copyright (C) 2002, 2003 Authors ////
|
| 21 |
|
|
//// ////
|
| 22 |
|
|
//// This source file may be used and distributed without ////
|
| 23 |
|
|
//// restriction provided that this copyright statement is not ////
|
| 24 |
|
|
//// removed from the file and that any derivative work contains ////
|
| 25 |
|
|
//// the original copyright notice and the associated disclaimer. ////
|
| 26 |
|
|
//// ////
|
| 27 |
|
|
//// This source file is free software; you can redistribute it ////
|
| 28 |
|
|
//// and/or modify it under the terms of the GNU Lesser General ////
|
| 29 |
|
|
//// Public License as published by the Free Software Foundation; ////
|
| 30 |
|
|
//// either version 2.1 of the License, or (at your option) any ////
|
| 31 |
|
|
//// later version. ////
|
| 32 |
|
|
//// ////
|
| 33 |
|
|
//// This source is distributed in the hope that it will be ////
|
| 34 |
|
|
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
|
| 35 |
|
|
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
|
| 36 |
|
|
//// PURPOSE. See the GNU Lesser General Public License for more ////
|
| 37 |
|
|
//// details. ////
|
| 38 |
|
|
//// ////
|
| 39 |
|
|
//// You should have received a copy of the GNU Lesser General ////
|
| 40 |
|
|
//// Public License along with this source; if not, download it ////
|
| 41 |
|
|
//// from http://www.opencores.org/lgpl.shtml ////
|
| 42 |
|
|
//// ////
|
| 43 |
|
|
//// The CAN protocol is developed by Robert Bosch GmbH and ////
|
| 44 |
|
|
//// protected by patents. Anybody who wants to implement this ////
|
| 45 |
|
|
//// CAN IP core on silicon has to obtain a CAN protocol license ////
|
| 46 |
|
|
//// from Bosch. ////
|
| 47 |
|
|
//// ////
|
| 48 |
|
|
//////////////////////////////////////////////////////////////////////
|
| 49 |
|
|
//
|
| 50 |
|
|
// CVS Revision History
|
| 51 |
|
|
//
|
| 52 |
|
|
// $Log: not supported by cvs2svn $
|
| 53 |
|
|
// Revision 1.7 2003/03/20 16:51:55 mohor
|
| 54 |
|
|
// *** empty log message ***
|
| 55 |
|
|
//
|
| 56 |
|
|
// Revision 1.6 2003/03/12 04:19:13 mohor
|
| 57 |
|
|
// 8051 interface added (besides WISHBONE interface). Selection is made in
|
| 58 |
|
|
// can_defines.v file.
|
| 59 |
|
|
//
|
| 60 |
|
|
// Revision 1.5 2003/03/05 15:03:20 mohor
|
| 61 |
|
|
// Xilinx RAM added.
|
| 62 |
|
|
//
|
| 63 |
|
|
// Revision 1.4 2003/03/01 22:52:47 mohor
|
| 64 |
|
|
// Actel APA ram supported.
|
| 65 |
|
|
//
|
| 66 |
|
|
// Revision 1.3 2003/02/09 02:24:33 mohor
|
| 67 |
|
|
// Bosch license warning added. Error counters finished. Overload frames
|
| 68 |
|
|
// still need to be fixed.
|
| 69 |
|
|
//
|
| 70 |
|
|
// Revision 1.2 2002/12/27 00:12:52 mohor
|
| 71 |
|
|
// Header changed, testbench improved to send a frame (crc still missing).
|
| 72 |
|
|
//
|
| 73 |
|
|
// Revision 1.1.1.1 2002/12/20 16:39:21 mohor
|
| 74 |
|
|
// Initial
|
| 75 |
|
|
//
|
| 76 |
|
|
//
|
| 77 |
|
|
//
|
| 78 |
|
|
|
| 79 |
|
|
|
| 80 |
|
|
// Uncomment following line if you want to use WISHBONE interface. Otherwise
|
| 81 |
|
|
// 8051 interface is used.
|
| 82 |
|
|
// `define CAN_WISHBONE_IF
|
| 83 |
|
|
|
| 84 |
|
|
// Uncomment following line if you want to use CAN in Actel APA devices (embedded memory used)
|
| 85 |
|
|
`define ACTEL_APA_RAM
|
| 86 |
|
|
|
| 87 |
|
|
// Uncomment following line if you want to use CAN in Xilinx devices (embedded memory used)
|
| 88 |
|
|
// `define XILINX_RAM
|
| 89 |
|
|
|
| 90 |
|
|
// Uncomment the following line when RAM BIST is needed (ASIC implementation)
|
| 91 |
|
|
//`define CAN_BIST // Bist (for ASIC implementation)
|
