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1 2 mohor
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
////  can_bsp.v                                                   ////
4
////                                                              ////
5
////                                                              ////
6 9 mohor
////  This file is part of the CAN Protocol Controller            ////
7 2 mohor
////  http://www.opencores.org/projects/can/                      ////
8
////                                                              ////
9
////                                                              ////
10
////  Author(s):                                                  ////
11
////       Igor Mohor                                             ////
12
////       igorm@opencores.org                                    ////
13
////                                                              ////
14
////                                                              ////
15 9 mohor
////  All additional information is available in the README.txt   ////
16 2 mohor
////  file.                                                       ////
17
////                                                              ////
18
//////////////////////////////////////////////////////////////////////
19
////                                                              ////
20 9 mohor
//// Copyright (C) 2002, 2003 Authors                             ////
21 2 mohor
////                                                              ////
22
//// This source file may be used and distributed without         ////
23
//// restriction provided that this copyright statement is not    ////
24
//// removed from the file and that any derivative work contains  ////
25
//// the original copyright notice and the associated disclaimer. ////
26
////                                                              ////
27
//// This source file is free software; you can redistribute it   ////
28
//// and/or modify it under the terms of the GNU Lesser General   ////
29
//// Public License as published by the Free Software Foundation; ////
30
//// either version 2.1 of the License, or (at your option) any   ////
31
//// later version.                                               ////
32
////                                                              ////
33
//// This source is distributed in the hope that it will be       ////
34
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
35
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
36
//// PURPOSE.  See the GNU Lesser General Public License for more ////
37
//// details.                                                     ////
38
////                                                              ////
39
//// You should have received a copy of the GNU Lesser General    ////
40
//// Public License along with this source; if not, download it   ////
41
//// from http://www.opencores.org/lgpl.shtml                     ////
42
////                                                              ////
43 28 mohor
//// The CAN protocol is developed by Robert Bosch GmbH and       ////
44
//// protected by patents. Anybody who wants to implement this    ////
45
//// CAN IP core on silicon has to obtain a CAN protocol license  ////
46
//// from Bosch.                                                  ////
47
////                                                              ////
48 2 mohor
//////////////////////////////////////////////////////////////////////
49
//
50
// CVS Revision History
51
//
52
// $Log: not supported by cvs2svn $
53 129 mohor
// Revision 1.44  2003/09/30 00:55:12  mohor
54
// Error counters fixed to be compatible with Bosch VHDL reference model.
55
// Small synchronization changes.
56
//
57 126 mohor
// Revision 1.43  2003/09/25 18:55:49  mohor
58
// Synchronization changed, error counters fixed.
59
//
60 125 mohor
// Revision 1.42  2003/08/29 07:01:14  mohor
61
// When detecting bus-free, signal bus_free_cnt_en was cleared to zero
62
// although the last sampled bit was zero instead of one.
63
//
64 121 mohor
// Revision 1.41  2003/07/18 15:23:31  tadejm
65
// Tx and rx length are limited to 8 bytes regardless to the DLC value.
66
//
67 112 tadejm
// Revision 1.40  2003/07/16 15:10:17  mohor
68
// Fixed according to the linter.
69
//
70 110 mohor
// Revision 1.39  2003/07/16 13:12:46  mohor
71
// Fixed according to the linter.
72
//
73 107 mohor
// Revision 1.38  2003/07/10 01:59:04  tadejm
74
// Synchronization fixed. In some strange cases it didn't work according to
75
// the VHDL reference model.
76
//
77 104 tadejm
// Revision 1.37  2003/07/07 11:21:37  mohor
78
// Little fixes (to fix warnings).
79
//
80 102 mohor
// Revision 1.36  2003/07/03 09:32:20  mohor
81
// Synchronization changed.
82
//
83 100 mohor
// Revision 1.35  2003/06/27 20:56:12  simons
84
// Virtual silicon ram instances added.
85
//
86 95 simons
// Revision 1.34  2003/06/22 09:43:03  mohor
87 102 mohor
// synthesi full_case parallel_case fixed.
88 95 simons
//
89 93 mohor
// Revision 1.33  2003/06/21 12:16:30  mohor
90
// paralel_case and full_case compiler directives added to case statements.
91
//
92 90 mohor
// Revision 1.32  2003/06/17 14:28:32  mohor
93
// Form error was detected when stuff bit occured at the end of crc.
94
//
95 80 mohor
// Revision 1.31  2003/06/16 14:31:29  tadejm
96
// Bit stuffing corrected when stuffing comes at the end of the crc.
97
//
98 79 tadejm
// Revision 1.30  2003/06/16 13:57:58  mohor
99
// tx_point generated one clk earlier. rx_i registered. Data corrected when
100
// using extended mode.
101
//
102 78 mohor
// Revision 1.29  2003/06/11 14:21:35  mohor
103
// When switching to tx, sync stage is overjumped.
104
//
105 75 mohor
// Revision 1.28  2003/03/01 22:53:33  mohor
106
// Actel APA ram supported.
107
//
108 48 mohor
// Revision 1.27  2003/02/20 00:26:02  mohor
109
// When a dominant bit was detected at the third bit of the intermission and
110
// node had a message to transmit, bit_stuff error could occur. Fixed.
111
//
112 45 mohor
// Revision 1.26  2003/02/19 23:21:54  mohor
113
// When bit error occured while active error flag was transmitted, counter was
114
// not incremented.
115
//
116 44 mohor
// Revision 1.25  2003/02/19 14:44:03  mohor
117
// CAN core finished. Host interface added. Registers finished.
118
// Synchronization to the wishbone finished.
119
//
120 39 mohor
// Revision 1.24  2003/02/18 00:10:15  mohor
121
// Most of the registers added. Registers "arbitration lost capture", "error code
122
// capture" + few more still need to be added.
123
//
124 36 mohor
// Revision 1.23  2003/02/14 20:17:01  mohor
125
// Several registers added. Not finished, yet.
126
//
127 35 mohor
// Revision 1.22  2003/02/12 14:23:59  mohor
128
// abort_tx added. Bit destuff fixed.
129
//
130 32 mohor
// Revision 1.21  2003/02/11 00:56:06  mohor
131
// Wishbone interface added.
132
//
133 31 mohor
// Revision 1.20  2003/02/10 16:02:11  mohor
134
// CAN is working according to the specification. WB interface and more
135
// registers (status, IRQ, ...) needs to be added.
136
//
137 30 mohor
// Revision 1.19  2003/02/09 18:40:29  mohor
138
// Overload fixed. Hard synchronization also enabled at the last bit of
139
// interframe.
140
//
141 29 mohor
// Revision 1.18  2003/02/09 02:24:33  mohor
142
// Bosch license warning added. Error counters finished. Overload frames
143
// still need to be fixed.
144
//
145 28 mohor
// Revision 1.17  2003/02/04 17:24:41  mohor
146
// Backup.
147
//
148 26 mohor
// Revision 1.16  2003/02/04 14:34:52  mohor
149
// *** empty log message ***
150
//
151 25 mohor
// Revision 1.15  2003/01/31 01:13:37  mohor
152
// backup.
153
//
154 24 mohor
// Revision 1.14  2003/01/16 13:36:19  mohor
155
// Form error supported. When receiving messages, last bit of the end-of-frame
156
// does not generate form error. Receiver goes to the idle mode one bit sooner.
157
// (CAN specification ver 2.0, part B, page 57).
158
//
159 22 mohor
// Revision 1.13  2003/01/15 21:59:45  mohor
160
// Data is stored to fifo at the end of ack stage.
161
//
162 21 mohor
// Revision 1.12  2003/01/15 21:05:11  mohor
163
// CRC checking fixed (when bitstuff occurs at the end of a CRC sequence).
164
//
165 20 mohor
// Revision 1.11  2003/01/15 14:40:23  mohor
166 31 mohor
// RX state machine fixed to receive "remote request" frames correctly.
167
// No data bytes are written to fifo when such frames are received.
168 20 mohor
//
169 19 mohor
// Revision 1.10  2003/01/15 13:16:47  mohor
170 31 mohor
// When a frame with "remote request" is received, no data is stored to
171
// fifo, just the frame information (identifier, ...). Data length that
172
// is stored is the received data length and not the actual data length
173
// that is stored to fifo.
174 19 mohor
//
175 18 mohor
// Revision 1.9  2003/01/14 12:19:35  mohor
176
// rx_fifo is now working.
177
//
178 16 mohor
// Revision 1.8  2003/01/10 17:51:33  mohor
179
// Temporary version (backup).
180
//
181 15 mohor
// Revision 1.7  2003/01/09 21:54:45  mohor
182
// rx fifo added. Not 100 % verified, yet.
183
//
184 14 mohor
// Revision 1.6  2003/01/09 14:46:58  mohor
185
// Temporary files (backup).
186
//
187 13 mohor
// Revision 1.5  2003/01/08 13:30:31  mohor
188
// Temp version.
189
//
190 12 mohor
// Revision 1.4  2003/01/08 02:10:53  mohor
191
// Acceptance filter added.
192
//
193 11 mohor
// Revision 1.3  2002/12/28 04:13:23  mohor
194
// Backup version.
195
//
196 10 mohor
// Revision 1.2  2002/12/27 00:12:52  mohor
197
// Header changed, testbench improved to send a frame (crc still missing).
198
//
199 9 mohor
// Revision 1.1.1.1  2002/12/20 16:39:21  mohor
200
// Initial
201 2 mohor
//
202
//
203 9 mohor
//
204 2 mohor
 
205
// synopsys translate_off
206
`include "timescale.v"
207
// synopsys translate_on
208
`include "can_defines.v"
209
 
210
module can_bsp
211
(
212
  clk,
213 10 mohor
  rst,
214
 
215
  sample_point,
216
  sampled_bit,
217
  sampled_bit_q,
218 24 mohor
  tx_point,
219 11 mohor
  hard_sync,
220
 
221 14 mohor
  addr,
222 35 mohor
  data_in,
223 14 mohor
  data_out,
224 48 mohor
  fifo_selected,
225 35 mohor
 
226 14 mohor
 
227
 
228 11 mohor
  /* Mode register */
229 10 mohor
  reset_mode,
230 36 mohor
  listen_only_mode,
231 11 mohor
  acceptance_filter_mode,
232 36 mohor
  self_test_mode,
233 11 mohor
 
234 15 mohor
  /* Command register */
235
  release_buffer,
236 25 mohor
  tx_request,
237 32 mohor
  abort_tx,
238 36 mohor
  self_rx_request,
239
  single_shot_transmission,
240 104 tadejm
  tx_state,
241
  tx_state_q,
242 125 mohor
  overload_request,
243
  overload_frame,
244 15 mohor
 
245 39 mohor
  /* Arbitration Lost Capture Register */
246
  read_arbitration_lost_capture_reg,
247
 
248
  /* Error Code Capture Register */
249
  read_error_code_capture_reg,
250
  error_capture_code,
251
 
252 35 mohor
  /* Error Warning Limit register */
253
  error_warning_limit,
254
 
255
  /* Rx Error Counter register */
256
  we_rx_err_cnt,
257
 
258
  /* Tx Error Counter register */
259
  we_tx_err_cnt,
260
 
261 15 mohor
  /* Clock Divider register */
262 11 mohor
  extended_mode,
263
 
264
  rx_idle,
265 24 mohor
  transmitting,
266 125 mohor
  transmitter,
267 100 mohor
  go_rx_inter,
268 104 tadejm
  not_first_bit_of_inter,
269 126 mohor
  rx_inter,
270 35 mohor
  set_reset_mode,
271
  node_bus_off,
272
  error_status,
273
  rx_err_cnt,
274
  tx_err_cnt,
275
  transmit_status,
276
  receive_status,
277
  tx_successful,
278
  need_to_tx,
279
  overrun,
280
  info_empty,
281 39 mohor
  set_bus_error_irq,
282
  set_arbitration_lost_irq,
283
  arbitration_lost_capture,
284 36 mohor
  node_error_passive,
285
  node_error_active,
286 39 mohor
  rx_message_counter,
287 11 mohor
 
288 35 mohor
 
289 36 mohor
 
290 11 mohor
  /* This section is for BASIC and EXTENDED mode */
291
  /* Acceptance code register */
292
  acceptance_code_0,
293
 
294
  /* Acceptance mask register */
295
  acceptance_mask_0,
296
  /* End: This section is for BASIC and EXTENDED mode */
297 10 mohor
 
298 11 mohor
  /* This section is for EXTENDED mode */
299
  /* Acceptance code register */
300
  acceptance_code_1,
301
  acceptance_code_2,
302
  acceptance_code_3,
303 10 mohor
 
304 11 mohor
  /* Acceptance mask register */
305
  acceptance_mask_1,
306
  acceptance_mask_2,
307 18 mohor
  acceptance_mask_3,
308 11 mohor
  /* End: This section is for EXTENDED mode */
309 10 mohor
 
310 18 mohor
  /* Tx data registers. Holding identifier (basic mode), tx frame information (extended mode) and data */
311
  tx_data_0,
312
  tx_data_1,
313
  tx_data_2,
314
  tx_data_3,
315
  tx_data_4,
316
  tx_data_5,
317
  tx_data_6,
318
  tx_data_7,
319
  tx_data_8,
320
  tx_data_9,
321
  tx_data_10,
322
  tx_data_11,
323 24 mohor
  tx_data_12,
324 18 mohor
  /* End: Tx data registers */
325 24 mohor
 
326
  /* Tx signal */
327 28 mohor
  tx,
328 125 mohor
  tx_next,
329
  tx_oen,
330 18 mohor
 
331 125 mohor
  go_overload_frame,
332
  go_error_frame,
333
  go_tx,
334
  send_ack
335
 
336 95 simons
  /* Bist */
337
`ifdef CAN_BIST
338
  ,
339
  scanb_rst,
340
  scanb_clk,
341
  scanb_si,
342
  scanb_so,
343
  scanb_en
344
`endif
345 2 mohor
);
346
 
347
parameter Tp = 1;
348
 
349 10 mohor
input         clk;
350
input         rst;
351
input         sample_point;
352
input         sampled_bit;
353
input         sampled_bit_q;
354 24 mohor
input         tx_point;
355 11 mohor
input         hard_sync;
356 14 mohor
input   [7:0] addr;
357 35 mohor
input   [7:0] data_in;
358 14 mohor
output  [7:0] data_out;
359 48 mohor
input         fifo_selected;
360 11 mohor
 
361 14 mohor
 
362 10 mohor
input         reset_mode;
363 36 mohor
input         listen_only_mode;
364 11 mohor
input         acceptance_filter_mode;
365
input         extended_mode;
366 36 mohor
input         self_test_mode;
367 2 mohor
 
368 35 mohor
 
369 15 mohor
/* Command register */
370
input         release_buffer;
371 25 mohor
input         tx_request;
372 32 mohor
input         abort_tx;
373 36 mohor
input         self_rx_request;
374
input         single_shot_transmission;
375 104 tadejm
output        tx_state;
376
output        tx_state_q;
377 125 mohor
input         overload_request;
378
output        overload_frame;       // When receiver is busy, it needs to send overload frame. Only 2 overload frames are allowed to
379
                                    // be send in a row. This is not implemented, yet,  because host can not send an overload request.
380 11 mohor
 
381 39 mohor
/* Arbitration Lost Capture Register */
382
input         read_arbitration_lost_capture_reg;
383
 
384
/* Error Code Capture Register */
385
input         read_error_code_capture_reg;
386
output  [7:0] error_capture_code;
387
 
388 35 mohor
/* Error Warning Limit register */
389
input   [7:0] error_warning_limit;
390
 
391
/* Rx Error Counter register */
392
input         we_rx_err_cnt;
393
 
394
/* Tx Error Counter register */
395
input         we_tx_err_cnt;
396
 
397 10 mohor
output        rx_idle;
398 24 mohor
output        transmitting;
399 125 mohor
output        transmitter;
400 100 mohor
output        go_rx_inter;
401 104 tadejm
output        not_first_bit_of_inter;
402 126 mohor
output        rx_inter;
403 35 mohor
output        set_reset_mode;
404
output        node_bus_off;
405
output        error_status;
406
output  [8:0] rx_err_cnt;
407
output  [8:0] tx_err_cnt;
408
output        transmit_status;
409
output        receive_status;
410
output        tx_successful;
411
output        need_to_tx;
412
output        overrun;
413
output        info_empty;
414 39 mohor
output        set_bus_error_irq;
415
output        set_arbitration_lost_irq;
416
output  [4:0] arbitration_lost_capture;
417 36 mohor
output        node_error_passive;
418
output        node_error_active;
419 39 mohor
output  [6:0] rx_message_counter;
420 2 mohor
 
421 29 mohor
 
422 11 mohor
/* This section is for BASIC and EXTENDED mode */
423
/* Acceptance code register */
424
input   [7:0] acceptance_code_0;
425
 
426
/* Acceptance mask register */
427
input   [7:0] acceptance_mask_0;
428
 
429
/* End: This section is for BASIC and EXTENDED mode */
430
 
431
 
432
/* This section is for EXTENDED mode */
433
/* Acceptance code register */
434
input   [7:0] acceptance_code_1;
435
input   [7:0] acceptance_code_2;
436
input   [7:0] acceptance_code_3;
437
 
438
/* Acceptance mask register */
439
input   [7:0] acceptance_mask_1;
440
input   [7:0] acceptance_mask_2;
441
input   [7:0] acceptance_mask_3;
442
/* End: This section is for EXTENDED mode */
443
 
444 24 mohor
/* Tx data registers. Holding identifier (basic mode), tx frame information (extended mode) and data */
445 18 mohor
input   [7:0] tx_data_0;
446
input   [7:0] tx_data_1;
447
input   [7:0] tx_data_2;
448
input   [7:0] tx_data_3;
449
input   [7:0] tx_data_4;
450
input   [7:0] tx_data_5;
451
input   [7:0] tx_data_6;
452
input   [7:0] tx_data_7;
453
input   [7:0] tx_data_8;
454
input   [7:0] tx_data_9;
455
input   [7:0] tx_data_10;
456
input   [7:0] tx_data_11;
457
input   [7:0] tx_data_12;
458 24 mohor
/* End: Tx data registers */
459 11 mohor
 
460 24 mohor
/* Tx signal */
461
output        tx;
462 125 mohor
output        tx_next;
463 28 mohor
output        tx_oen;
464 11 mohor
 
465 125 mohor
output        go_overload_frame;
466
output        go_error_frame;
467
output        go_tx;
468
output        send_ack;
469
 
470 95 simons
/* Bist */
471
`ifdef CAN_BIST
472
input         scanb_rst;
473
input         scanb_clk;
474
input         scanb_si;
475
output        scanb_so;
476
input         scanb_en;
477
`endif
478
 
479 10 mohor
reg           reset_mode_q;
480
reg     [5:0] bit_cnt;
481 2 mohor
 
482 10 mohor
reg     [3:0] data_len;
483
reg    [28:0] id;
484
reg     [2:0] bit_stuff_cnt;
485 25 mohor
reg     [2:0] bit_stuff_cnt_tx;
486
reg           tx_point_q;
487 10 mohor
 
488
reg           rx_idle;
489
reg           rx_id1;
490
reg           rx_rtr1;
491
reg           rx_ide;
492
reg           rx_id2;
493
reg           rx_rtr2;
494
reg           rx_r1;
495
reg           rx_r0;
496
reg           rx_dlc;
497
reg           rx_data;
498
reg           rx_crc;
499 11 mohor
reg           rx_crc_lim;
500 10 mohor
reg           rx_ack;
501 11 mohor
reg           rx_ack_lim;
502 10 mohor
reg           rx_eof;
503 24 mohor
reg           rx_inter;
504 45 mohor
reg           go_early_tx_latched;
505 10 mohor
 
506 19 mohor
reg           rtr1;
507
reg           ide;
508
reg           rtr2;
509
reg    [14:0] crc_in;
510
 
511 24 mohor
reg     [7:0] tmp_data;
512
reg     [7:0] tmp_fifo [0:7];
513
reg           write_data_to_tmp_fifo;
514
reg     [2:0] byte_cnt;
515
reg           bit_stuff_cnt_en;
516 11 mohor
reg           crc_enable;
517
 
518 10 mohor
reg     [2:0] eof_cnt;
519 28 mohor
reg     [2:0] passive_cnt;
520
 
521 24 mohor
reg           transmitting;
522 10 mohor
 
523 24 mohor
reg           error_frame;
524 28 mohor
reg           error_frame_q;
525 24 mohor
reg           enable_error_cnt2;
526
reg     [2:0] error_cnt1;
527
reg     [2:0] error_cnt2;
528 29 mohor
reg     [2:0] delayed_dominant_cnt;
529
reg           enable_overload_cnt2;
530 30 mohor
reg           overload_frame;
531
reg           overload_frame_blocked;
532 125 mohor
reg     [1:0] overload_request_cnt;
533 29 mohor
reg     [2:0] overload_cnt1;
534
reg     [2:0] overload_cnt2;
535 24 mohor
reg           tx;
536 28 mohor
reg           crc_err;
537 24 mohor
 
538 39 mohor
reg           arbitration_lost;
539
reg           arbitration_lost_q;
540
reg     [4:0] arbitration_lost_capture;
541
reg           arbitration_cnt_en;
542
reg           arbitration_blocked;
543 25 mohor
reg           tx_q;
544
 
545 28 mohor
reg           need_to_tx;   // When the CAN core has something to transmit and a dominant bit is sampled at the third bit
546 25 mohor
reg     [3:0] data_cnt;     // Counting the data bytes that are written to FIFO
547
reg     [2:0] header_cnt;   // Counting header length
548
reg           wr_fifo;      // Write data and header to 64-byte fifo
549
reg     [7:0] data_for_fifo;// Multiplexed data that is stored to 64-byte fifo
550
 
551
reg     [5:0] tx_pointer;
552
reg           tx_bit;
553
reg           tx_state;
554 104 tadejm
reg           tx_state_q;
555 28 mohor
reg           transmitter;
556 25 mohor
reg           finish_msg;
557
 
558 35 mohor
reg     [8:0] rx_err_cnt;
559
reg     [8:0] tx_err_cnt;
560 28 mohor
reg           rx_err_cnt_blocked;
561 35 mohor
reg     [3:0] bus_free_cnt;
562
reg           bus_free_cnt_en;
563
reg           bus_free;
564
reg           waiting_for_bus_free;
565 28 mohor
 
566
reg           node_error_passive;
567
reg           node_bus_off;
568 35 mohor
reg           node_bus_off_q;
569 28 mohor
reg           ack_err_latched;
570
reg           bit_err_latched;
571
reg           stuff_err_latched;
572
reg           form_err_latched;
573
reg           rule3_exc1_1;
574
reg           rule3_exc1_2;
575
reg           rule3_exc2;
576
reg           suspend;
577
reg           susp_cnt_en;
578
reg     [2:0] susp_cnt;
579 125 mohor
reg           error_flag_over_latched;
580 28 mohor
 
581 39 mohor
reg     [7:0] error_capture_code;
582
reg     [7:6] error_capture_code_type;
583
reg           error_capture_code_blocked;
584
 
585
wire    [4:0] error_capture_code_segment;
586
wire          error_capture_code_direction;
587
 
588 28 mohor
wire          bit_de_stuff;
589
wire          bit_de_stuff_tx;
590
 
591 44 mohor
wire          rule5;
592 28 mohor
 
593
/* Rx state machine */
594
wire          go_rx_idle;
595
wire          go_rx_id1;
596
wire          go_rx_rtr1;
597
wire          go_rx_ide;
598
wire          go_rx_id2;
599
wire          go_rx_rtr2;
600
wire          go_rx_r1;
601
wire          go_rx_r0;
602
wire          go_rx_dlc;
603
wire          go_rx_data;
604
wire          go_rx_crc;
605
wire          go_rx_crc_lim;
606
wire          go_rx_ack;
607
wire          go_rx_ack_lim;
608
wire          go_rx_eof;
609
wire          go_rx_inter;
610
 
611 104 tadejm
wire          last_bit_of_inter;
612
 
613 28 mohor
wire          go_crc_enable;
614
wire          rst_crc_enable;
615
 
616
wire          bit_de_stuff_set;
617
wire          bit_de_stuff_reset;
618
 
619
wire          go_early_tx;
620
 
621
wire   [14:0] calculated_crc;
622
wire   [15:0] r_calculated_crc;
623
wire          remote_rq;
624
wire    [3:0] limited_data_len;
625
wire          form_err;
626
 
627
wire          error_frame_ended;
628
wire          overload_frame_ended;
629
wire          bit_err;
630
wire          ack_err;
631
wire          stuff_err;
632
 
633 29 mohor
wire          id_ok;                // If received ID matches ID set in registers
634
wire          no_byte0;             // There is no byte 0 (RTR bit set to 1 or DLC field equal to 0). Signal used for acceptance filter.
635
wire          no_byte1;             // There is no byte 1 (RTR bit set to 1 or DLC field equal to 1). Signal used for acceptance filter.
636 28 mohor
 
637 25 mohor
wire    [2:0] header_len;
638
wire          storing_header;
639
wire    [3:0] limited_data_len_minus1;
640
wire          reset_wr_fifo;
641 28 mohor
wire          err;
642 25 mohor
 
643 28 mohor
wire          arbitration_field;
644 25 mohor
 
645 28 mohor
wire   [18:0] basic_chain;
646
wire   [63:0] basic_chain_data;
647
wire   [18:0] extended_chain_std;
648
wire   [38:0] extended_chain_ext;
649 78 mohor
wire   [63:0] extended_chain_data_std;
650
wire   [63:0] extended_chain_data_ext;
651 28 mohor
 
652
wire          rst_tx_pointer;
653
 
654
wire    [7:0] r_tx_data_0;
655
wire    [7:0] r_tx_data_1;
656
wire    [7:0] r_tx_data_2;
657
wire    [7:0] r_tx_data_3;
658
wire    [7:0] r_tx_data_4;
659
wire    [7:0] r_tx_data_5;
660
wire    [7:0] r_tx_data_6;
661
wire    [7:0] r_tx_data_7;
662
wire    [7:0] r_tx_data_8;
663
wire    [7:0] r_tx_data_9;
664
wire    [7:0] r_tx_data_10;
665
wire    [7:0] r_tx_data_11;
666
wire    [7:0] r_tx_data_12;
667
 
668
wire          send_ack;
669
wire          bit_err_exc1;
670
wire          bit_err_exc2;
671
wire          bit_err_exc3;
672
wire          bit_err_exc4;
673 30 mohor
wire          bit_err_exc5;
674 129 mohor
wire          bit_err_exc6;
675 28 mohor
wire          error_flag_over;
676 29 mohor
wire          overload_flag_over;
677 28 mohor
 
678 112 tadejm
wire    [5:0] limited_tx_cnt_ext;
679
wire    [5:0] limited_tx_cnt_std;
680 28 mohor
 
681 35 mohor
assign go_rx_idle     =                   sample_point &  sampled_bit & last_bit_of_inter | bus_free & (~node_bus_off);
682 29 mohor
assign go_rx_id1      =                   sample_point &  (~sampled_bit) & (rx_idle | last_bit_of_inter);
683 107 mohor
assign go_rx_rtr1     = (~bit_de_stuff) & sample_point &  rx_id1  & (bit_cnt[3:0] == 4'd10);
684 11 mohor
assign go_rx_ide      = (~bit_de_stuff) & sample_point &  rx_rtr1;
685
assign go_rx_id2      = (~bit_de_stuff) & sample_point &  rx_ide  &   sampled_bit;
686 107 mohor
assign go_rx_rtr2     = (~bit_de_stuff) & sample_point &  rx_id2  & (bit_cnt[4:0] == 5'd17);
687 11 mohor
assign go_rx_r1       = (~bit_de_stuff) & sample_point &  rx_rtr2;
688
assign go_rx_r0       = (~bit_de_stuff) & sample_point & (rx_ide  & (~sampled_bit) | rx_r1);
689
assign go_rx_dlc      = (~bit_de_stuff) & sample_point &  rx_r0;
690 107 mohor
assign go_rx_data     = (~bit_de_stuff) & sample_point &  rx_dlc  & (bit_cnt[1:0] == 2'd3) &  (sampled_bit   |   (|data_len[2:0])) & (~remote_rq);
691
assign go_rx_crc      = (~bit_de_stuff) & sample_point & (rx_dlc  & (bit_cnt[1:0] == 2'd3) & ((~sampled_bit) & (~(|data_len[2:0])) | remote_rq) |
692
                                                          rx_data & (bit_cnt[5:0] == ((limited_data_len<<3) - 1'b1)));  // overflow works ok at max value (8<<3 = 64 = 0). 0-1 = 6'h3f
693
assign go_rx_crc_lim  = (~bit_de_stuff) & sample_point &  rx_crc  & (bit_cnt[3:0] == 4'd14);
694 79 tadejm
assign go_rx_ack      = (~bit_de_stuff) & sample_point &  rx_crc_lim;
695 11 mohor
assign go_rx_ack_lim  =                   sample_point &  rx_ack;
696 35 mohor
assign go_rx_eof      =                   sample_point &  rx_ack_lim;
697 125 mohor
assign go_rx_inter    =                 ((sample_point &  rx_eof  & (eof_cnt == 3'd6)) | error_frame_ended | overload_frame_ended) & (~overload_request);
698 10 mohor
 
699 28 mohor
assign go_error_frame = (form_err | stuff_err | bit_err | ack_err | (crc_err & go_rx_eof));
700 107 mohor
assign error_frame_ended = (error_cnt2 == 3'd7) & tx_point;
701
assign overload_frame_ended = (overload_cnt2 == 3'd7) & tx_point;
702 24 mohor
 
703 129 mohor
//assign go_overload_frame = (   ((sample_point &  rx_eof  & (eof_cnt == 3'd6)) | error_frame_ended | overload_frame_ended) & (overload_request | (~sampled_bit)) | 
704
//assign go_overload_frame = (     sample_point & ((~sampled_bit) | overload_request) & (rx_eof  & (eof_cnt == 3'd6) | error_frame_ended | overload_frame_ended) | 
705
assign go_overload_frame = (     sample_point & ((~sampled_bit) | overload_request) & (rx_eof & (~transmitter) & (eof_cnt == 3'd6) | error_frame_ended | overload_frame_ended) |
706
                                 sample_point & (~sampled_bit) & rx_inter & (bit_cnt[1:0] < 2'd2)                                                            |
707 125 mohor
                                 sample_point & (~sampled_bit) & ((error_cnt2 == 3'd7) | (overload_cnt2 == 3'd7))
708 30 mohor
                           )
709
                           & (~overload_frame_blocked)
710
                           ;
711 24 mohor
 
712 25 mohor
 
713
assign go_crc_enable  = hard_sync | go_tx;
714 11 mohor
assign rst_crc_enable = go_rx_crc;
715 10 mohor
 
716 32 mohor
assign bit_de_stuff_set   = go_rx_id1 & (~go_error_frame);
717 79 tadejm
assign bit_de_stuff_reset = go_rx_ack | reset_mode | go_error_frame | go_overload_frame;
718 11 mohor
 
719 19 mohor
assign remote_rq = ((~ide) & rtr1) | (ide & rtr2);
720 107 mohor
assign limited_data_len = (data_len < 4'h8)? data_len : 4'h8;
721 11 mohor
 
722 36 mohor
assign ack_err = rx_ack & sample_point & sampled_bit & tx_state & (~self_test_mode);
723 129 mohor
assign bit_err = (tx_state | error_frame | overload_frame | rx_ack) & sample_point & (tx != sampled_bit) & (~bit_err_exc1) & (~bit_err_exc2) & (~bit_err_exc3) & (~bit_err_exc4) & (~bit_err_exc5) & (~bit_err_exc6);
724 28 mohor
assign bit_err_exc1 = tx_state & arbitration_field & tx;
725
assign bit_err_exc2 = rx_ack & tx;
726 107 mohor
assign bit_err_exc3 = error_frame & node_error_passive & (error_cnt1 < 3'd7);
727
assign bit_err_exc4 = (error_frame & (error_cnt1 == 3'd7) & (~enable_error_cnt2)) | (overload_frame & (overload_cnt1 == 3'd7) & (~enable_overload_cnt2));
728
assign bit_err_exc5 = (error_frame & (error_cnt2 == 3'd7)) | (overload_frame & (overload_cnt2 == 3'd7));
729 129 mohor
assign bit_err_exc6 = (eof_cnt == 3'd6) & rx_eof & (~transmitter);
730 19 mohor
 
731 28 mohor
assign arbitration_field = rx_id1 | rx_rtr1 | rx_ide | rx_id2 | rx_rtr2;
732 25 mohor
 
733 107 mohor
assign last_bit_of_inter = rx_inter & (bit_cnt[1:0] == 2'd2);
734
assign not_first_bit_of_inter = rx_inter & (bit_cnt[1:0] != 2'd0);
735 25 mohor
 
736 26 mohor
 
737 10 mohor
// Rx idle state
738
always @ (posedge clk or posedge rst)
739
begin
740
  if (rst)
741 24 mohor
    rx_idle <= 1'b0;
742 125 mohor
//  else if (reset_mode | go_rx_id1 | error_frame)
743
  else if (reset_mode | go_rx_id1 | go_error_frame)
744 10 mohor
    rx_idle <=#Tp 1'b0;
745
  else if (go_rx_idle)
746
    rx_idle <=#Tp 1'b1;
747
end
748
 
749
 
750
// Rx id1 state
751
always @ (posedge clk or posedge rst)
752
begin
753
  if (rst)
754
    rx_id1 <= 1'b0;
755 125 mohor
//  else if (reset_mode | go_rx_rtr1 | error_frame)
756
  else if (reset_mode | go_rx_rtr1 | go_error_frame)
757 10 mohor
    rx_id1 <=#Tp 1'b0;
758
  else if (go_rx_id1)
759
    rx_id1 <=#Tp 1'b1;
760
end
761
 
762
 
763
// Rx rtr1 state
764
always @ (posedge clk or posedge rst)
765
begin
766
  if (rst)
767
    rx_rtr1 <= 1'b0;
768 125 mohor
//  else if (reset_mode | go_rx_ide | error_frame)
769
  else if (reset_mode | go_rx_ide | go_error_frame)
770 10 mohor
    rx_rtr1 <=#Tp 1'b0;
771
  else if (go_rx_rtr1)
772
    rx_rtr1 <=#Tp 1'b1;
773
end
774
 
775
 
776
// Rx ide state
777
always @ (posedge clk or posedge rst)
778
begin
779
  if (rst)
780
    rx_ide <= 1'b0;
781 125 mohor
//  else if (reset_mode | go_rx_r0 | go_rx_id2 | error_frame)
782
  else if (reset_mode | go_rx_r0 | go_rx_id2 | go_error_frame)
783 10 mohor
    rx_ide <=#Tp 1'b0;
784
  else if (go_rx_ide)
785
    rx_ide <=#Tp 1'b1;
786
end
787
 
788
 
789
// Rx id2 state
790
always @ (posedge clk or posedge rst)
791
begin
792
  if (rst)
793
    rx_id2 <= 1'b0;
794 125 mohor
//  else if (reset_mode | go_rx_rtr2 | error_frame)
795
  else if (reset_mode | go_rx_rtr2 | go_error_frame)
796 10 mohor
    rx_id2 <=#Tp 1'b0;
797
  else if (go_rx_id2)
798
    rx_id2 <=#Tp 1'b1;
799
end
800
 
801
 
802
// Rx rtr2 state
803
always @ (posedge clk or posedge rst)
804
begin
805
  if (rst)
806
    rx_rtr2 <= 1'b0;
807 125 mohor
//  else if (reset_mode | go_rx_r1 | error_frame)
808
  else if (reset_mode | go_rx_r1 | go_error_frame)
809 10 mohor
    rx_rtr2 <=#Tp 1'b0;
810
  else if (go_rx_rtr2)
811
    rx_rtr2 <=#Tp 1'b1;
812
end
813
 
814
 
815
// Rx r0 state
816
always @ (posedge clk or posedge rst)
817
begin
818
  if (rst)
819
    rx_r1 <= 1'b0;
820 125 mohor
//  else if (reset_mode | go_rx_r0 | error_frame)
821
  else if (reset_mode | go_rx_r0 | go_error_frame)
822 10 mohor
    rx_r1 <=#Tp 1'b0;
823
  else if (go_rx_r1)
824
    rx_r1 <=#Tp 1'b1;
825
end
826
 
827
 
828
// Rx r0 state
829
always @ (posedge clk or posedge rst)
830
begin
831
  if (rst)
832
    rx_r0 <= 1'b0;
833 125 mohor
//  else if (reset_mode | go_rx_dlc | error_frame)
834
  else if (reset_mode | go_rx_dlc | go_error_frame)
835 10 mohor
    rx_r0 <=#Tp 1'b0;
836
  else if (go_rx_r0)
837
    rx_r0 <=#Tp 1'b1;
838
end
839
 
840
 
841
// Rx dlc state
842
always @ (posedge clk or posedge rst)
843
begin
844
  if (rst)
845
    rx_dlc <= 1'b0;
846 125 mohor
//  else if (reset_mode | go_rx_data | go_rx_crc | error_frame)
847
  else if (reset_mode | go_rx_data | go_rx_crc | go_error_frame)
848 10 mohor
    rx_dlc <=#Tp 1'b0;
849
  else if (go_rx_dlc)
850
    rx_dlc <=#Tp 1'b1;
851
end
852
 
853
 
854
// Rx data state
855
always @ (posedge clk or posedge rst)
856
begin
857
  if (rst)
858
    rx_data <= 1'b0;
859 125 mohor
//  else if (reset_mode | go_rx_crc | error_frame)
860
  else if (reset_mode | go_rx_crc | go_error_frame)
861 10 mohor
    rx_data <=#Tp 1'b0;
862
  else if (go_rx_data)
863
    rx_data <=#Tp 1'b1;
864
end
865
 
866
 
867
// Rx crc state
868
always @ (posedge clk or posedge rst)
869
begin
870
  if (rst)
871
    rx_crc <= 1'b0;
872 125 mohor
//  else if (reset_mode | go_rx_crc_lim | error_frame)
873
  else if (reset_mode | go_rx_crc_lim | go_error_frame)
874 10 mohor
    rx_crc <=#Tp 1'b0;
875
  else if (go_rx_crc)
876
    rx_crc <=#Tp 1'b1;
877
end
878
 
879
 
880 11 mohor
// Rx crc delimiter state
881
always @ (posedge clk or posedge rst)
882
begin
883
  if (rst)
884
    rx_crc_lim <= 1'b0;
885 125 mohor
//  else if (reset_mode | go_rx_ack | error_frame)
886
  else if (reset_mode | go_rx_ack | go_error_frame)
887 11 mohor
    rx_crc_lim <=#Tp 1'b0;
888
  else if (go_rx_crc_lim)
889
    rx_crc_lim <=#Tp 1'b1;
890
end
891
 
892
 
893 10 mohor
// Rx ack state
894
always @ (posedge clk or posedge rst)
895
begin
896
  if (rst)
897
    rx_ack <= 1'b0;
898 125 mohor
//  else if (reset_mode | go_rx_ack_lim | error_frame)
899
  else if (reset_mode | go_rx_ack_lim | go_error_frame)
900 10 mohor
    rx_ack <=#Tp 1'b0;
901
  else if (go_rx_ack)
902
    rx_ack <=#Tp 1'b1;
903
end
904
 
905
 
906 11 mohor
// Rx ack delimiter state
907
always @ (posedge clk or posedge rst)
908
begin
909
  if (rst)
910
    rx_ack_lim <= 1'b0;
911 125 mohor
//  else if (reset_mode | go_rx_eof | error_frame)
912
  else if (reset_mode | go_rx_eof | go_error_frame)
913 11 mohor
    rx_ack_lim <=#Tp 1'b0;
914
  else if (go_rx_ack_lim)
915
    rx_ack_lim <=#Tp 1'b1;
916
end
917
 
918
 
919 10 mohor
// Rx eof state
920
always @ (posedge clk or posedge rst)
921
begin
922
  if (rst)
923
    rx_eof <= 1'b0;
924 125 mohor
//  else if (go_rx_inter | error_frame | go_overload_frame)
925
  else if (go_rx_inter | go_error_frame | go_overload_frame)
926 10 mohor
    rx_eof <=#Tp 1'b0;
927
  else if (go_rx_eof)
928
    rx_eof <=#Tp 1'b1;
929
end
930
 
931
 
932 24 mohor
 
933
// Interframe space
934
always @ (posedge clk or posedge rst)
935
begin
936
  if (rst)
937
    rx_inter <= 1'b0;
938 35 mohor
  else if (reset_mode | go_rx_idle | go_rx_id1 | go_overload_frame | go_error_frame)
939 24 mohor
    rx_inter <=#Tp 1'b0;
940
  else if (go_rx_inter)
941
    rx_inter <=#Tp 1'b1;
942
end
943
 
944
 
945 10 mohor
// ID register
946
always @ (posedge clk or posedge rst)
947
begin
948
  if (rst)
949 107 mohor
    id <= 29'h0;
950 11 mohor
  else if (sample_point & (rx_id1 | rx_id2) & (~bit_de_stuff))
951 10 mohor
    id <=#Tp {id[27:0], sampled_bit};
952
end
953
 
954 11 mohor
 
955
// rtr1 bit
956
always @ (posedge clk or posedge rst)
957
begin
958
  if (rst)
959 107 mohor
    rtr1 <= 1'b0;
960 11 mohor
  else if (sample_point & rx_rtr1 & (~bit_de_stuff))
961
    rtr1 <=#Tp sampled_bit;
962
end
963
 
964
 
965
// rtr2 bit
966
always @ (posedge clk or posedge rst)
967
begin
968
  if (rst)
969 107 mohor
    rtr2 <= 1'b0;
970 11 mohor
  else if (sample_point & rx_rtr2 & (~bit_de_stuff))
971
    rtr2 <=#Tp sampled_bit;
972
end
973
 
974
 
975
// ide bit
976
always @ (posedge clk or posedge rst)
977
begin
978
  if (rst)
979 107 mohor
    ide <= 1'b0;
980 11 mohor
  else if (sample_point & rx_ide & (~bit_de_stuff))
981
    ide <=#Tp sampled_bit;
982
end
983
 
984
 
985 10 mohor
// Data length
986
always @ (posedge clk or posedge rst)
987
begin
988
  if (rst)
989 107 mohor
    data_len <= 4'b0;
990 10 mohor
  else if (sample_point & rx_dlc & (~bit_de_stuff))
991
    data_len <=#Tp {data_len[2:0], sampled_bit};
992
end
993
 
994
 
995 11 mohor
// Data
996
always @ (posedge clk or posedge rst)
997
begin
998
  if (rst)
999 107 mohor
    tmp_data <= 8'h0;
1000 11 mohor
  else if (sample_point & rx_data & (~bit_de_stuff))
1001
    tmp_data <=#Tp {tmp_data[6:0], sampled_bit};
1002
end
1003
 
1004
 
1005
always @ (posedge clk or posedge rst)
1006
begin
1007
  if (rst)
1008 107 mohor
    write_data_to_tmp_fifo <= 1'b0;
1009 11 mohor
  else if (sample_point & rx_data & (~bit_de_stuff) & (&bit_cnt[2:0]))
1010
    write_data_to_tmp_fifo <=#Tp 1'b1;
1011
  else
1012 107 mohor
    write_data_to_tmp_fifo <=#Tp 1'b0;
1013 11 mohor
end
1014
 
1015
 
1016
always @ (posedge clk or posedge rst)
1017
begin
1018
  if (rst)
1019 107 mohor
    byte_cnt <= 3'h0;
1020 36 mohor
  else if (write_data_to_tmp_fifo)
1021 107 mohor
    byte_cnt <=#Tp byte_cnt + 1'b1;
1022 36 mohor
  else if (reset_mode | (sample_point & go_rx_crc_lim))
1023 107 mohor
    byte_cnt <=#Tp 3'h0;
1024 11 mohor
end
1025
 
1026
 
1027 24 mohor
always @ (posedge clk)
1028 11 mohor
begin
1029
  if (write_data_to_tmp_fifo)
1030
    tmp_fifo[byte_cnt] <=#Tp tmp_data;
1031
end
1032
 
1033
 
1034
 
1035
// CRC
1036
always @ (posedge clk or posedge rst)
1037
begin
1038
  if (rst)
1039 107 mohor
    crc_in <= 15'h0;
1040 11 mohor
  else if (sample_point & rx_crc & (~bit_de_stuff))
1041
    crc_in <=#Tp {crc_in[13:0], sampled_bit};
1042
end
1043
 
1044
 
1045 10 mohor
// bit_cnt
1046
always @ (posedge clk or posedge rst)
1047
begin
1048
  if (rst)
1049 107 mohor
    bit_cnt <= 6'd0;
1050 24 mohor
  else if (go_rx_id1 | go_rx_id2 | go_rx_dlc | go_rx_data | go_rx_crc |
1051
           go_rx_ack | go_rx_eof | go_rx_inter | go_error_frame | go_overload_frame)
1052 107 mohor
    bit_cnt <=#Tp 6'd0;
1053 11 mohor
  else if (sample_point & (~bit_de_stuff))
1054 10 mohor
    bit_cnt <=#Tp bit_cnt + 1'b1;
1055
end
1056
 
1057
 
1058
// eof_cnt
1059
always @ (posedge clk or posedge rst)
1060
begin
1061
  if (rst)
1062 107 mohor
    eof_cnt <= 3'd0;
1063 10 mohor
  else if (sample_point)
1064
    begin
1065 35 mohor
      if (reset_mode | go_rx_inter | go_error_frame | go_overload_frame)
1066 107 mohor
        eof_cnt <=#Tp 3'd0;
1067 28 mohor
      else if (rx_eof)
1068 10 mohor
        eof_cnt <=#Tp eof_cnt + 1'b1;
1069
    end
1070
end
1071
 
1072
 
1073 11 mohor
// Enabling bit de-stuffing
1074
always @ (posedge clk or posedge rst)
1075
begin
1076
  if (rst)
1077
    bit_stuff_cnt_en <= 1'b0;
1078
  else if (bit_de_stuff_set)
1079
    bit_stuff_cnt_en <=#Tp 1'b1;
1080
  else if (bit_de_stuff_reset)
1081
    bit_stuff_cnt_en <=#Tp 1'b0;
1082
end
1083 10 mohor
 
1084 24 mohor
 
1085 10 mohor
// bit_stuff_cnt
1086
always @ (posedge clk or posedge rst)
1087
begin
1088
  if (rst)
1089 107 mohor
    bit_stuff_cnt <= 3'h1;
1090 15 mohor
  else if (bit_de_stuff_reset)
1091 107 mohor
    bit_stuff_cnt <=#Tp 3'h1;
1092 11 mohor
  else if (sample_point & bit_stuff_cnt_en)
1093 10 mohor
    begin
1094 107 mohor
      if (bit_stuff_cnt == 3'h5)
1095
        bit_stuff_cnt <=#Tp 3'h1;
1096 10 mohor
      else if (sampled_bit == sampled_bit_q)
1097
        bit_stuff_cnt <=#Tp bit_stuff_cnt + 1'b1;
1098
      else
1099 107 mohor
        bit_stuff_cnt <=#Tp 3'h1;
1100 10 mohor
    end
1101
end
1102
 
1103
 
1104 25 mohor
// bit_stuff_cnt_tx
1105
always @ (posedge clk or posedge rst)
1106
begin
1107
  if (rst)
1108 107 mohor
    bit_stuff_cnt_tx <= 3'h1;
1109 25 mohor
  else if (bit_de_stuff_reset)
1110 107 mohor
    bit_stuff_cnt_tx <=#Tp 3'h1;
1111 25 mohor
  else if (tx_point_q & bit_stuff_cnt_en)
1112
    begin
1113 107 mohor
      if (bit_stuff_cnt_tx == 3'h5)
1114
        bit_stuff_cnt_tx <=#Tp 3'h1;
1115 25 mohor
      else if (tx == tx_q)
1116
        bit_stuff_cnt_tx <=#Tp bit_stuff_cnt_tx + 1'b1;
1117
      else
1118 107 mohor
        bit_stuff_cnt_tx <=#Tp 3'h1;
1119 25 mohor
    end
1120
end
1121
 
1122
 
1123 107 mohor
assign bit_de_stuff = bit_stuff_cnt == 3'h5;
1124
assign bit_de_stuff_tx = bit_stuff_cnt_tx == 3'h5;
1125 10 mohor
 
1126
 
1127 24 mohor
 
1128 28 mohor
// stuff_err
1129
assign stuff_err = sample_point & bit_stuff_cnt_en & bit_de_stuff & (sampled_bit == sampled_bit_q);
1130 10 mohor
 
1131
 
1132 28 mohor
 
1133 35 mohor
// Generating delayed signals
1134 107 mohor
always @ (posedge clk or posedge rst)
1135 10 mohor
begin
1136 107 mohor
  if (rst)
1137
    begin
1138
      reset_mode_q <=#Tp 1'b0;
1139
      node_bus_off_q <=#Tp 1'b0;
1140
    end
1141
  else
1142
    begin
1143
      reset_mode_q <=#Tp reset_mode;
1144
      node_bus_off_q <=#Tp node_bus_off;
1145
    end
1146 10 mohor
end
1147
 
1148
 
1149 11 mohor
 
1150
always @ (posedge clk or posedge rst)
1151
begin
1152
  if (rst)
1153
    crc_enable <= 1'b0;
1154
  else if (go_crc_enable)
1155
    crc_enable <=#Tp 1'b1;
1156
  else if (reset_mode | rst_crc_enable)
1157
    crc_enable <=#Tp 1'b0;
1158
end
1159
 
1160
 
1161
// CRC error generation
1162
always @ (posedge clk or posedge rst)
1163
begin
1164
  if (rst)
1165 28 mohor
    crc_err <= 1'b0;
1166 12 mohor
  else if (go_rx_ack)
1167 28 mohor
    crc_err <=#Tp crc_in != calculated_crc;
1168
  else if (reset_mode | error_frame_ended)
1169
    crc_err <=#Tp 1'b0;
1170 11 mohor
end
1171
 
1172
 
1173 22 mohor
// Conditions for form error
1174 126 mohor
assign form_err = sample_point & ( ((~bit_de_stuff) & rx_crc_lim & (~sampled_bit)               ) |
1175 28 mohor
                                   (                  rx_ack_lim & (~sampled_bit)               ) |
1176 129 mohor
//                                   ((eof_cnt < 3'd6)& rx_eof     & (~sampled_bit) & (~tx_state) ) |
1177
//                                   (                & rx_eof     & (~sampled_bit) &   tx_state  )
1178
//                                   ((eof_cnt < 3'd6)& rx_eof     & (~sampled_bit) & (~tx_state) ) 
1179
                                   ((eof_cnt < 3'd6)& rx_eof     & (~sampled_bit) & (~transmitter) ) |
1180
                                   (                & rx_eof     & (~sampled_bit) &   transmitter  )
1181 28 mohor
                                 );
1182 11 mohor
 
1183 22 mohor
 
1184 28 mohor
always @ (posedge clk or posedge rst)
1185
begin
1186
  if (rst)
1187
    ack_err_latched <= 1'b0;
1188 30 mohor
  else if (reset_mode | error_frame_ended | go_overload_frame)
1189 28 mohor
    ack_err_latched <=#Tp 1'b0;
1190
  else if (ack_err)
1191
    ack_err_latched <=#Tp 1'b1;
1192
end
1193
 
1194
 
1195
always @ (posedge clk or posedge rst)
1196
begin
1197
  if (rst)
1198
    bit_err_latched <= 1'b0;
1199 30 mohor
  else if (reset_mode | error_frame_ended | go_overload_frame)
1200 28 mohor
    bit_err_latched <=#Tp 1'b0;
1201
  else if (bit_err)
1202
    bit_err_latched <=#Tp 1'b1;
1203
end
1204
 
1205
 
1206 44 mohor
 
1207 28 mohor
// Rule 5 (Fault confinement).
1208 125 mohor
assign rule5 = bit_err &  ( (~node_error_passive) & error_frame    & (error_cnt1    < 3'd7)
1209
                            |
1210
                                                    overload_frame & (overload_cnt1 < 3'd7)
1211
                          );
1212 28 mohor
 
1213
// Rule 3 exception 1 - first part (Fault confinement).
1214
always @ (posedge clk or posedge rst)
1215
begin
1216
  if (rst)
1217
    rule3_exc1_1 <= 1'b0;
1218
  else if (reset_mode | error_flag_over | rule3_exc1_2)
1219
    rule3_exc1_1 <=#Tp 1'b0;
1220
  else if (transmitter & node_error_passive & ack_err)
1221
    rule3_exc1_1 <=#Tp 1'b1;
1222
end
1223
 
1224
 
1225
// Rule 3 exception 1 - second part (Fault confinement).
1226
always @ (posedge clk or posedge rst)
1227
begin
1228
  if (rst)
1229
    rule3_exc1_2 <= 1'b0;
1230 126 mohor
//  else if (reset_mode | error_flag_over)
1231
  else if (reset_mode | go_error_frame | rule3_exc1_2)
1232 28 mohor
    rule3_exc1_2 <=#Tp 1'b0;
1233 126 mohor
  else if (rule3_exc1_1 & (error_cnt1 < 3'd7) & sample_point & (~sampled_bit))
1234 28 mohor
    rule3_exc1_2 <=#Tp 1'b1;
1235
end
1236
 
1237
 
1238
// Rule 3 exception 2 (Fault confinement).
1239
always @ (posedge clk or posedge rst)
1240
begin
1241
  if (rst)
1242
    rule3_exc2 <= 1'b0;
1243
  else if (reset_mode | error_flag_over)
1244
    rule3_exc2 <=#Tp 1'b0;
1245
  else if (transmitter & stuff_err & arbitration_field & sample_point & tx & (~sampled_bit))
1246
    rule3_exc2 <=#Tp 1'b1;
1247
end
1248
 
1249
 
1250
 
1251
always @ (posedge clk or posedge rst)
1252
begin
1253
  if (rst)
1254
    stuff_err_latched <= 1'b0;
1255 30 mohor
  else if (reset_mode | error_frame_ended | go_overload_frame)
1256 28 mohor
    stuff_err_latched <=#Tp 1'b0;
1257
  else if (stuff_err)
1258
    stuff_err_latched <=#Tp 1'b1;
1259
end
1260
 
1261
 
1262
 
1263
always @ (posedge clk or posedge rst)
1264
begin
1265
  if (rst)
1266
    form_err_latched <= 1'b0;
1267 30 mohor
  else if (reset_mode | error_frame_ended | go_overload_frame)
1268 28 mohor
    form_err_latched <=#Tp 1'b0;
1269
  else if (form_err)
1270
    form_err_latched <=#Tp 1'b1;
1271
end
1272
 
1273
 
1274
 
1275 11 mohor
// Instantiation of the RX CRC module
1276
can_crc i_can_crc_rx
1277
(
1278
  .clk(clk),
1279 25 mohor
  .data(sampled_bit),
1280 11 mohor
  .enable(crc_enable & sample_point & (~bit_de_stuff)),
1281 35 mohor
  .initialize(go_crc_enable),
1282 11 mohor
  .crc(calculated_crc)
1283
);
1284
 
1285
 
1286
 
1287
 
1288 107 mohor
assign no_byte0 = rtr1 | (data_len<4'h1);
1289
assign no_byte1 = rtr1 | (data_len<4'h2);
1290 11 mohor
 
1291
can_acf i_can_acf
1292
(
1293
  .clk(clk),
1294
  .rst(rst),
1295
 
1296
  .id(id),
1297
 
1298
  /* Mode register */
1299
  .reset_mode(reset_mode),
1300
  .acceptance_filter_mode(acceptance_filter_mode),
1301
 
1302 12 mohor
  // Clock Divider register
1303 11 mohor
  .extended_mode(extended_mode),
1304
 
1305
  /* This section is for BASIC and EXTENDED mode */
1306
  /* Acceptance code register */
1307
  .acceptance_code_0(acceptance_code_0),
1308
 
1309
  /* Acceptance mask register */
1310
  .acceptance_mask_0(acceptance_mask_0),
1311
  /* End: This section is for BASIC and EXTENDED mode */
1312
 
1313
  /* This section is for EXTENDED mode */
1314
  /* Acceptance code register */
1315
  .acceptance_code_1(acceptance_code_1),
1316
  .acceptance_code_2(acceptance_code_2),
1317
  .acceptance_code_3(acceptance_code_3),
1318
 
1319
  /* Acceptance mask register */
1320
  .acceptance_mask_1(acceptance_mask_1),
1321
  .acceptance_mask_2(acceptance_mask_2),
1322
  .acceptance_mask_3(acceptance_mask_3),
1323
  /* End: This section is for EXTENDED mode */
1324
 
1325
  .go_rx_crc_lim(go_rx_crc_lim),
1326 29 mohor
  .go_rx_inter(go_rx_inter),
1327 30 mohor
  .go_error_frame(go_error_frame),
1328 11 mohor
 
1329
  .data0(tmp_fifo[0]),
1330
  .data1(tmp_fifo[1]),
1331
  .rtr1(rtr1),
1332
  .rtr2(rtr2),
1333
  .ide(ide),
1334 16 mohor
  .no_byte0(no_byte0),
1335
  .no_byte1(no_byte1),
1336 11 mohor
 
1337
  .id_ok(id_ok)
1338
 
1339
);
1340
 
1341
 
1342
 
1343
 
1344 16 mohor
assign header_len[2:0] = extended_mode ? (ide? (3'h5) : (3'h3)) : 3'h2;
1345 13 mohor
assign storing_header = header_cnt < header_len;
1346 107 mohor
assign limited_data_len_minus1[3:0] = remote_rq? 4'hf : ((data_len < 4'h8)? (data_len -1'b1) : 4'h7);   // - 1 because counter counts from 0
1347
assign reset_wr_fifo = (data_cnt == (limited_data_len_minus1 + {1'b0, header_len})) | reset_mode;
1348 12 mohor
 
1349 28 mohor
assign err = form_err | stuff_err | bit_err | ack_err | form_err_latched | stuff_err_latched | bit_err_latched | ack_err_latched | crc_err;
1350 24 mohor
 
1351
 
1352 28 mohor
 
1353 13 mohor
// Write enable signal for 64-byte rx fifo
1354
always @ (posedge clk or posedge rst)
1355
begin
1356
  if (rst)
1357
    wr_fifo <= 1'b0;
1358 16 mohor
  else if (reset_wr_fifo)
1359
    wr_fifo <=#Tp 1'b0;
1360 36 mohor
  else if (go_rx_inter & id_ok & (~error_frame_ended) & ((~tx_state) | self_rx_request))
1361 13 mohor
    wr_fifo <=#Tp 1'b1;
1362
end
1363 12 mohor
 
1364
 
1365 13 mohor
// Header counter. Header length depends on the mode of operation and frame format.
1366 12 mohor
always @ (posedge clk or posedge rst)
1367
begin
1368
  if (rst)
1369 107 mohor
    header_cnt <= 3'h0;
1370 16 mohor
  else if (reset_wr_fifo)
1371 107 mohor
    header_cnt <=#Tp 3'h0;
1372 16 mohor
  else if (wr_fifo & storing_header)
1373 107 mohor
    header_cnt <=#Tp header_cnt + 1'h1;
1374 12 mohor
end
1375
 
1376
 
1377 13 mohor
// Data counter. Length of the data is limited to 8 bytes.
1378 12 mohor
always @ (posedge clk or posedge rst)
1379
begin
1380
  if (rst)
1381 107 mohor
    data_cnt <= 4'h0;
1382 16 mohor
  else if (reset_wr_fifo)
1383 107 mohor
    data_cnt <=#Tp 4'h0;
1384 16 mohor
  else if (wr_fifo)
1385 107 mohor
    data_cnt <=#Tp data_cnt + 4'h1;
1386 12 mohor
end
1387
 
1388
 
1389 13 mohor
// Multiplexing data that is stored to 64-byte fifo depends on the mode of operation and frame format
1390 24 mohor
always @ (extended_mode or ide or data_cnt or header_cnt or  header_len or
1391
          storing_header or id or rtr1 or rtr2 or data_len or
1392 13 mohor
          tmp_fifo[0] or tmp_fifo[2] or tmp_fifo[4] or tmp_fifo[6] or
1393
          tmp_fifo[1] or tmp_fifo[3] or tmp_fifo[5] or tmp_fifo[7])
1394 12 mohor
begin
1395 107 mohor
  casex ({storing_header, extended_mode, ide, header_cnt}) /* synthesis parallel_case */
1396
    6'b1_1_1_000  : data_for_fifo = {1'b1, rtr2, 2'h0, data_len};  // extended mode, extended format header
1397
    6'b1_1_1_001  : data_for_fifo = id[28:21];                     // extended mode, extended format header
1398
    6'b1_1_1_010  : data_for_fifo = id[20:13];                     // extended mode, extended format header
1399
    6'b1_1_1_011  : data_for_fifo = id[12:5];                      // extended mode, extended format header
1400
    6'b1_1_1_100  : data_for_fifo = {id[4:0], 3'h0};               // extended mode, extended format header
1401
    6'b1_1_0_000  : data_for_fifo = {1'b0, rtr1, 2'h0, data_len};  // extended mode, standard format header
1402
    6'b1_1_0_001  : data_for_fifo = id[10:3];                      // extended mode, standard format header
1403
    6'b1_1_0_010  : data_for_fifo = {id[2:0], 5'h0};               // extended mode, standard format header
1404
    6'b1_0_x_000  : data_for_fifo = id[10:3];                      // normal mode                    header
1405
    6'b1_0_x_001  : data_for_fifo = {id[2:0], rtr1, data_len};     // normal mode                    header
1406
    default       : data_for_fifo = tmp_fifo[data_cnt - {1'b0, header_len}]; // data 
1407
  endcase
1408 12 mohor
end
1409
 
1410
 
1411
 
1412
 
1413
// Instantiation of the RX fifo module
1414 13 mohor
can_fifo i_can_fifo
1415 12 mohor
(
1416
  .clk(clk),
1417
  .rst(rst),
1418
 
1419 13 mohor
  .wr(wr_fifo),
1420 12 mohor
 
1421 13 mohor
  .data_in(data_for_fifo),
1422 110 mohor
  .addr(addr[5:0]),
1423 14 mohor
  .data_out(data_out),
1424 48 mohor
  .fifo_selected(fifo_selected),
1425 12 mohor
 
1426
  .reset_mode(reset_mode),
1427 15 mohor
  .release_buffer(release_buffer),
1428 35 mohor
  .extended_mode(extended_mode),
1429
  .overrun(overrun),
1430 39 mohor
  .info_empty(info_empty),
1431
  .info_cnt(rx_message_counter)
1432 95 simons
 
1433
`ifdef CAN_BIST
1434
  ,
1435
  .scanb_rst(scanb_rst),
1436
  .scanb_clk(scanb_clk),
1437
  .scanb_si(scanb_si),
1438
  .scanb_so(scanb_so),
1439
  .scanb_en(scanb_en)
1440
`endif
1441 12 mohor
);
1442
 
1443
 
1444 29 mohor
// Transmitting error frame.
1445 24 mohor
always @ (posedge clk or posedge rst)
1446
begin
1447
  if (rst)
1448
    error_frame <= 1'b0;
1449 30 mohor
  else if (reset_mode | error_frame_ended | go_overload_frame)
1450 24 mohor
    error_frame <=#Tp 1'b0;
1451 28 mohor
  else if (go_error_frame)
1452 24 mohor
    error_frame <=#Tp 1'b1;
1453
end
1454 12 mohor
 
1455 13 mohor
 
1456 107 mohor
always @ (posedge clk or posedge rst)
1457 28 mohor
begin
1458 107 mohor
  if (rst)
1459
    error_frame_q <=#Tp 1'b0;
1460
  else if (sample_point)
1461 28 mohor
    error_frame_q <=#Tp error_frame;
1462
end
1463
 
1464
 
1465 24 mohor
always @ (posedge clk or posedge rst)
1466
begin
1467
  if (rst)
1468 107 mohor
    error_cnt1 <= 3'd0;
1469 30 mohor
  else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
1470 107 mohor
    error_cnt1 <=#Tp 3'd0;
1471
  else if (error_frame & tx_point & (error_cnt1 < 3'd7))
1472 24 mohor
    error_cnt1 <=#Tp error_cnt1 + 1'b1;
1473
end
1474
 
1475
 
1476 28 mohor
 
1477 107 mohor
assign error_flag_over = ((~node_error_passive) & sample_point & (error_cnt1 == 3'd7) | node_error_passive  & sample_point & (passive_cnt == 3'h5)) & (~enable_error_cnt2);
1478 28 mohor
 
1479
 
1480 24 mohor
always @ (posedge clk or posedge rst)
1481
begin
1482
  if (rst)
1483 125 mohor
    error_flag_over_latched <= 1'b0;
1484 30 mohor
  else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
1485 125 mohor
    error_flag_over_latched <=#Tp 1'b0;
1486 28 mohor
  else if (error_flag_over)
1487 125 mohor
    error_flag_over_latched <=#Tp 1'b1;
1488 28 mohor
end
1489
 
1490
 
1491
always @ (posedge clk or posedge rst)
1492
begin
1493
  if (rst)
1494 24 mohor
    enable_error_cnt2 <= 1'b0;
1495 30 mohor
  else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
1496 24 mohor
    enable_error_cnt2 <=#Tp 1'b0;
1497 30 mohor
  else if (error_frame & (error_flag_over & sampled_bit))
1498 24 mohor
    enable_error_cnt2 <=#Tp 1'b1;
1499
end
1500
 
1501
 
1502
always @ (posedge clk or posedge rst)
1503
begin
1504
  if (rst)
1505 107 mohor
    error_cnt2 <= 3'd0;
1506 30 mohor
  else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
1507 107 mohor
    error_cnt2 <=#Tp 3'd0;
1508 24 mohor
  else if (enable_error_cnt2 & tx_point)
1509
    error_cnt2 <=#Tp error_cnt2 + 1'b1;
1510
end
1511
 
1512
 
1513 28 mohor
always @ (posedge clk or posedge rst)
1514
begin
1515
  if (rst)
1516 107 mohor
    delayed_dominant_cnt <= 3'h0;
1517 29 mohor
  else if (reset_mode | enable_error_cnt2 | go_error_frame | enable_overload_cnt2 | go_overload_frame)
1518 107 mohor
    delayed_dominant_cnt <=#Tp 3'h0;
1519
  else if (sample_point & (~sampled_bit) & ((error_cnt1 == 3'd7) | (overload_cnt1 == 3'd7)))
1520 29 mohor
    delayed_dominant_cnt <=#Tp delayed_dominant_cnt + 1'b1;
1521 28 mohor
end
1522 24 mohor
 
1523 25 mohor
 
1524 28 mohor
// passive_cnt
1525
always @ (posedge clk or posedge rst)
1526
begin
1527
  if (rst)
1528 107 mohor
    passive_cnt <= 3'h0;
1529 30 mohor
  else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
1530 107 mohor
    passive_cnt <=#Tp 3'h0;
1531
  else if (sample_point & (passive_cnt < 3'h5))
1532 28 mohor
    begin
1533
      if (error_frame_q & (~enable_error_cnt2) & (sampled_bit == sampled_bit_q))
1534
        passive_cnt <=#Tp passive_cnt + 1'b1;
1535
      else
1536 107 mohor
        passive_cnt <=#Tp 3'h0;
1537 28 mohor
    end
1538
end
1539 25 mohor
 
1540
 
1541 29 mohor
 
1542
// Transmitting overload frame.
1543
always @ (posedge clk or posedge rst)
1544
begin
1545
  if (rst)
1546
    overload_frame <= 1'b0;
1547
  else if (reset_mode | overload_frame_ended | go_error_frame)
1548
    overload_frame <=#Tp 1'b0;
1549
  else if (go_overload_frame)
1550
    overload_frame <=#Tp 1'b1;
1551
end
1552
 
1553
 
1554
always @ (posedge clk or posedge rst)
1555
begin
1556
  if (rst)
1557 107 mohor
    overload_cnt1 <= 3'd0;
1558 30 mohor
  else if (reset_mode | overload_frame_ended | go_error_frame | go_overload_frame)
1559 107 mohor
    overload_cnt1 <=#Tp 3'd0;
1560
  else if (overload_frame & tx_point & (overload_cnt1 < 3'd7))
1561 29 mohor
    overload_cnt1 <=#Tp overload_cnt1 + 1'b1;
1562
end
1563
 
1564
 
1565 107 mohor
assign overload_flag_over = sample_point & (overload_cnt1 == 3'd7) & (~enable_overload_cnt2);
1566 29 mohor
 
1567
 
1568
always @ (posedge clk or posedge rst)
1569
begin
1570
  if (rst)
1571
    enable_overload_cnt2 <= 1'b0;
1572 30 mohor
  else if (reset_mode | overload_frame_ended | go_error_frame | go_overload_frame)
1573 29 mohor
    enable_overload_cnt2 <=#Tp 1'b0;
1574 30 mohor
  else if (overload_frame & (overload_flag_over & sampled_bit))
1575 29 mohor
    enable_overload_cnt2 <=#Tp 1'b1;
1576
end
1577
 
1578
 
1579
always @ (posedge clk or posedge rst)
1580
begin
1581
  if (rst)
1582 107 mohor
    overload_cnt2 <= 3'd0;
1583 30 mohor
  else if (reset_mode | overload_frame_ended | go_error_frame | go_overload_frame)
1584 107 mohor
    overload_cnt2 <=#Tp 3'd0;
1585 29 mohor
  else if (enable_overload_cnt2 & tx_point)
1586
    overload_cnt2 <=#Tp overload_cnt2 + 1'b1;
1587
end
1588
 
1589
 
1590 30 mohor
always @ (posedge clk or posedge rst)
1591
begin
1592
  if (rst)
1593 125 mohor
    overload_request_cnt <= 2'b0;
1594
  else if (reset_mode | go_error_frame | go_rx_id1)
1595
    overload_request_cnt <=#Tp 2'b0;
1596
  else if (overload_request & overload_frame)
1597
    overload_request_cnt <=#Tp overload_request_cnt + 1'b1;
1598
end
1599
 
1600
 
1601
always @ (posedge clk or posedge rst)
1602
begin
1603
  if (rst)
1604 107 mohor
    overload_frame_blocked <= 1'b0;
1605 30 mohor
  else if (reset_mode | go_error_frame | go_rx_id1)
1606 107 mohor
    overload_frame_blocked <=#Tp 1'b0;
1607 125 mohor
  else if (overload_request & overload_frame & overload_request_cnt == 2'h2)   // This is a second sequential overload_request
1608 30 mohor
    overload_frame_blocked <=#Tp 1'b1;
1609
end
1610
 
1611
 
1612 36 mohor
assign send_ack = (~tx_state) & rx_ack & (~err) & (~listen_only_mode);
1613 25 mohor
 
1614
 
1615 125 mohor
reg tx_next;
1616
always @ (reset_mode or tx_state or bit_de_stuff_tx or tx_bit or tx_q or
1617 126 mohor
//always @ (reset_mode or go_tx or tx_state or bit_de_stuff_tx or tx_bit or tx_q or
1618
          send_ack or go_overload_frame or overload_frame or overload_cnt1 or
1619
          go_error_frame or error_frame or error_cnt1 or node_error_passive)
1620 24 mohor
begin
1621 125 mohor
  if (reset_mode)                                                               // Reset
1622
    tx_next = 1'b1;
1623
  else
1624 24 mohor
    begin
1625 126 mohor
      if (go_error_frame | error_frame)                                         // Transmitting error frame
1626 30 mohor
        begin
1627 107 mohor
          if (error_cnt1 < 3'd6)
1628 25 mohor
            begin
1629 29 mohor
              if (node_error_passive)
1630 125 mohor
                tx_next = 1'b1;
1631 25 mohor
              else
1632 125 mohor
                tx_next = 1'b0;
1633 25 mohor
            end
1634 29 mohor
          else
1635 125 mohor
            tx_next = 1'b1;
1636 24 mohor
        end
1637 126 mohor
      else if (go_overload_frame | overload_frame)                              // Transmitting overload frame
1638
        begin
1639
          if (overload_cnt1 < 3'd6)
1640
            tx_next = 1'b0;
1641
          else
1642
            tx_next = 1'b1;
1643
        end
1644
      else if (tx_state)                                                        // Transmitting message
1645
//      else if (go_tx | tx_state)                                                // Transmitting message
1646
        tx_next = ((~bit_de_stuff_tx) & tx_bit) | (bit_de_stuff_tx & (~tx_q));
1647
      else if (send_ack)                                                        // Acknowledge
1648
        tx_next = 1'b0;
1649 25 mohor
      else
1650 125 mohor
        tx_next = 1'b1;
1651 24 mohor
    end
1652
end
1653
 
1654
 
1655 125 mohor
always @ (posedge clk or posedge rst)
1656
begin
1657
  if (rst)
1658
    tx <= 1'b1;
1659
  else if (tx_point)
1660
    tx <=#Tp tx_next;
1661
end
1662 45 mohor
 
1663 125 mohor
 
1664 107 mohor
always @ (posedge clk or posedge rst)
1665 25 mohor
begin
1666 107 mohor
  if (rst)
1667
    tx_q <=#Tp 1'b0;
1668
  else if (tx_point)
1669 45 mohor
    tx_q <=#Tp tx & (~go_early_tx_latched);
1670 25 mohor
end
1671 24 mohor
 
1672
 
1673 25 mohor
/* Delayed tx point */
1674 107 mohor
always @ (posedge clk or posedge rst)
1675 25 mohor
begin
1676 107 mohor
  if (rst)
1677
    tx_point_q <=#Tp 1'b0;
1678
  else
1679
    tx_point_q <=#Tp tx_point;
1680 25 mohor
end
1681 24 mohor
 
1682
 
1683 25 mohor
/* Changing bit order from [7:0] to [0:7] */
1684
can_ibo i_ibo_tx_data_0  (.di(tx_data_0),  .do(r_tx_data_0));
1685
can_ibo i_ibo_tx_data_1  (.di(tx_data_1),  .do(r_tx_data_1));
1686
can_ibo i_ibo_tx_data_2  (.di(tx_data_2),  .do(r_tx_data_2));
1687
can_ibo i_ibo_tx_data_3  (.di(tx_data_3),  .do(r_tx_data_3));
1688
can_ibo i_ibo_tx_data_4  (.di(tx_data_4),  .do(r_tx_data_4));
1689
can_ibo i_ibo_tx_data_5  (.di(tx_data_5),  .do(r_tx_data_5));
1690
can_ibo i_ibo_tx_data_6  (.di(tx_data_6),  .do(r_tx_data_6));
1691
can_ibo i_ibo_tx_data_7  (.di(tx_data_7),  .do(r_tx_data_7));
1692
can_ibo i_ibo_tx_data_8  (.di(tx_data_8),  .do(r_tx_data_8));
1693
can_ibo i_ibo_tx_data_9  (.di(tx_data_9),  .do(r_tx_data_9));
1694
can_ibo i_ibo_tx_data_10 (.di(tx_data_10), .do(r_tx_data_10));
1695
can_ibo i_ibo_tx_data_11 (.di(tx_data_11), .do(r_tx_data_11));
1696
can_ibo i_ibo_tx_data_12 (.di(tx_data_12), .do(r_tx_data_12));
1697 24 mohor
 
1698 25 mohor
/* Changing bit order from [14:0] to [0:14] */
1699
can_ibo i_calculated_crc0 (.di(calculated_crc[14:7]), .do(r_calculated_crc[7:0]));
1700
can_ibo i_calculated_crc1 (.di({calculated_crc[6:0], 1'b0}), .do(r_calculated_crc[15:8]));
1701 24 mohor
 
1702
 
1703 25 mohor
assign basic_chain = {r_tx_data_1[7:4], 2'h0, r_tx_data_1[3:0], r_tx_data_0[7:0], 1'b0};
1704
assign basic_chain_data = {r_tx_data_9, r_tx_data_8, r_tx_data_7, r_tx_data_6, r_tx_data_5, r_tx_data_4, r_tx_data_3, r_tx_data_2};
1705
assign extended_chain_std = {r_tx_data_0[7:4], 2'h0, r_tx_data_0[1], r_tx_data_2[2:0], r_tx_data_1[7:0], 1'b0};
1706
assign extended_chain_ext = {r_tx_data_0[7:4], 2'h0, r_tx_data_0[1], r_tx_data_4[4:0], r_tx_data_3[7:0], r_tx_data_2[7:3], 1'b1, 1'b1, r_tx_data_2[2:0], r_tx_data_1[7:0], 1'b0};
1707 78 mohor
assign extended_chain_data_std = {r_tx_data_10, r_tx_data_9, r_tx_data_8, r_tx_data_7, r_tx_data_6, r_tx_data_5, r_tx_data_4, r_tx_data_3};
1708
assign extended_chain_data_ext = {r_tx_data_12, r_tx_data_11, r_tx_data_10, r_tx_data_9, r_tx_data_8, r_tx_data_7, r_tx_data_6, r_tx_data_5};
1709 25 mohor
 
1710 78 mohor
always @ (extended_mode or rx_data or tx_pointer or extended_chain_data_std or extended_chain_data_ext or rx_crc or r_calculated_crc or
1711 25 mohor
          r_tx_data_0   or extended_chain_ext or extended_chain_std or basic_chain_data or basic_chain or
1712
          finish_msg)
1713
begin
1714
  if (extended_mode)
1715
    begin
1716
      if (rx_data)  // data stage
1717 78 mohor
        if (r_tx_data_0[0])    // Extended frame
1718
          tx_bit = extended_chain_data_ext[tx_pointer];
1719
        else
1720
          tx_bit = extended_chain_data_std[tx_pointer];
1721 25 mohor
      else if (rx_crc)
1722
        tx_bit = r_calculated_crc[tx_pointer];
1723
      else if (finish_msg)
1724
        tx_bit = 1'b1;
1725
      else
1726
        begin
1727
          if (r_tx_data_0[0])    // Extended frame
1728
            tx_bit = extended_chain_ext[tx_pointer];
1729
          else
1730
            tx_bit = extended_chain_std[tx_pointer];
1731
        end
1732
    end
1733
  else  // Basic mode
1734
    begin
1735
      if (rx_data)  // data stage
1736
        tx_bit = basic_chain_data[tx_pointer];
1737
      else if (rx_crc)
1738
        tx_bit = r_calculated_crc[tx_pointer];
1739
      else if (finish_msg)
1740
        tx_bit = 1'b1;
1741
      else
1742
        tx_bit = basic_chain[tx_pointer];
1743
    end
1744
end
1745
 
1746
 
1747 112 tadejm
assign limited_tx_cnt_ext = tx_data_0[3] ? 6'h3f : ((tx_data_0[2:0] <<3) - 1'b1);
1748
assign limited_tx_cnt_std = tx_data_1[3] ? 6'h3f : ((tx_data_1[2:0] <<3) - 1'b1);
1749
 
1750
assign rst_tx_pointer = ((~bit_de_stuff_tx) & tx_point & (~rx_data) &   extended_mode  &   r_tx_data_0[0]   & tx_pointer == 6'd38             ) |   // arbitration + control for extended format
1751
                        ((~bit_de_stuff_tx) & tx_point & (~rx_data) &   extended_mode  & (~r_tx_data_0[0])  & tx_pointer == 6'd18             ) |   // arbitration + control for extended format
1752
                        ((~bit_de_stuff_tx) & tx_point & (~rx_data) & (~extended_mode)                      & tx_pointer == 6'd18             ) |   // arbitration + control for standard format
1753
                        ((~bit_de_stuff_tx) & tx_point &   rx_data  &   extended_mode                       & tx_pointer == limited_tx_cnt_ext) |   // data       (overflow is OK here)
1754
                        ((~bit_de_stuff_tx) & tx_point &   rx_data  & (~extended_mode)                      & tx_pointer == limited_tx_cnt_std) |   // data       (overflow is OK here)
1755
                        (                     tx_point &   rx_crc_lim                                                                         ) |   // crc
1756
                        (go_rx_idle                                                                                                           ) |   // at the end
1757
                        (reset_mode                                                                                                           ) |
1758
                        (overload_frame                                                                                                       ) |
1759
                        (error_frame                                                                                                          ) ;
1760
 
1761 25 mohor
always @ (posedge clk or posedge rst)
1762
begin
1763
  if (rst)
1764 107 mohor
    tx_pointer <= 6'h0;
1765 25 mohor
  else if (rst_tx_pointer)
1766 107 mohor
    tx_pointer <=#Tp 6'h0;
1767 25 mohor
  else if (go_early_tx | (tx_point & tx_state & (~bit_de_stuff_tx)))
1768
    tx_pointer <=#Tp tx_pointer + 1'b1;
1769
end
1770
 
1771
 
1772 129 mohor
//assign tx_successful = transmitter & go_rx_inter & (~error_frame_ended) & (~overload_frame_ended) & (~arbitration_lost);
1773
assign tx_successful = transmitter & go_rx_inter & (~go_error_frame) & (~error_frame_ended) & (~overload_frame_ended) & (~arbitration_lost);
1774 28 mohor
 
1775
 
1776 25 mohor
always @ (posedge clk or posedge rst)
1777
begin
1778
  if (rst)
1779
    need_to_tx <= 1'b0;
1780 104 tadejm
  else if (tx_successful | reset_mode | (abort_tx & (~transmitting)) | ((~tx_state) & tx_state_q & single_shot_transmission))
1781 28 mohor
    need_to_tx <=#Tp 1'h0;
1782 32 mohor
  else if (tx_request & sample_point)
1783 25 mohor
    need_to_tx <=#Tp 1'b1;
1784
end
1785
 
1786
 
1787
 
1788 36 mohor
assign go_early_tx = (~listen_only_mode) & need_to_tx & (~tx_state) & (~suspend) & sample_point & (~sampled_bit) & (rx_idle | last_bit_of_inter);
1789
assign go_tx       = (~listen_only_mode) & need_to_tx & (~tx_state) & (~suspend) & (go_early_tx | rx_idle);
1790 25 mohor
 
1791
 
1792 45 mohor
// go_early_tx latched (for proper bit_de_stuff generation)
1793
always @ (posedge clk or posedge rst)
1794
begin
1795
  if (rst)
1796
    go_early_tx_latched <= 1'b0;
1797 126 mohor
//  else if (tx_point_q)
1798
  else if (tx_point)
1799 45 mohor
    go_early_tx_latched <=#Tp 1'b0;
1800
  else if (go_early_tx)
1801
    go_early_tx_latched <=#Tp 1'b1;
1802
end
1803
 
1804
 
1805
 
1806 25 mohor
// Tx state
1807
always @ (posedge clk or posedge rst)
1808
begin
1809
  if (rst)
1810
    tx_state <= 1'b0;
1811 39 mohor
  else if (reset_mode | go_rx_inter | error_frame | arbitration_lost)
1812 25 mohor
    tx_state <=#Tp 1'b0;
1813
  else if (go_tx)
1814
    tx_state <=#Tp 1'b1;
1815
end
1816
 
1817 107 mohor
always @ (posedge clk or posedge rst)
1818 104 tadejm
begin
1819 107 mohor
  if (rst)
1820
    tx_state_q <=#Tp 1'b0;
1821
  else
1822
    tx_state_q <=#Tp tx_state;
1823 104 tadejm
end
1824 25 mohor
 
1825
 
1826 104 tadejm
 
1827 28 mohor
// Node is a transmitter
1828 25 mohor
always @ (posedge clk or posedge rst)
1829
begin
1830
  if (rst)
1831 28 mohor
    transmitter <= 1'b0;
1832
  else if (go_tx)
1833
    transmitter <=#Tp 1'b1;
1834 125 mohor
//  else if ((reset_mode | go_rx_inter ) | ((~tx_state) & tx_state_q))
1835
  else if (reset_mode | go_rx_idle)
1836 28 mohor
    transmitter <=#Tp 1'b0;
1837
end
1838 125 mohor
 
1839 28 mohor
 
1840
 
1841
// Signal "transmitting" signals that the core is a transmitting (message, error frame or overload frame). No synchronization is done meanwhile.
1842
// Node might be both transmitter or receiver (sending error or overload frame)
1843
always @ (posedge clk or posedge rst)
1844
begin
1845
  if (rst)
1846 26 mohor
    transmitting <= 1'b0;
1847 125 mohor
//  else if (go_error_frame | go_overload_frame | go_tx)
1848
  else if (go_error_frame | go_overload_frame | go_tx | send_ack)
1849 28 mohor
    transmitting <=#Tp 1'b1;
1850 125 mohor
  else if (reset_mode | go_rx_idle | (go_rx_id1 & (~tx_state)) | (arbitration_lost & tx_state) | rx_ack_lim)
1851 26 mohor
    transmitting <=#Tp 1'b0;
1852
end
1853
 
1854
 
1855 28 mohor
always @ (posedge clk or posedge rst)
1856
begin
1857
  if (rst)
1858 107 mohor
    suspend <= 1'b0;
1859
  else if (reset_mode | (sample_point & (susp_cnt == 3'h7)))
1860
    suspend <=#Tp 1'b0;
1861 125 mohor
//  else if (go_rx_inter & transmitter & node_error_passive)
1862 126 mohor
  else if (not_first_bit_of_inter & transmitter & node_error_passive)
1863 28 mohor
    suspend <=#Tp 1'b1;
1864
end
1865 26 mohor
 
1866 28 mohor
 
1867 26 mohor
always @ (posedge clk or posedge rst)
1868
begin
1869
  if (rst)
1870 107 mohor
    susp_cnt_en <= 1'b0;
1871
  else if (reset_mode | (sample_point & (susp_cnt == 3'h7)))
1872
    susp_cnt_en <=#Tp 1'b0;
1873 29 mohor
  else if (suspend & sample_point & last_bit_of_inter)
1874 28 mohor
    susp_cnt_en <=#Tp 1'b1;
1875
end
1876
 
1877
 
1878
always @ (posedge clk or posedge rst)
1879
begin
1880
  if (rst)
1881 107 mohor
    susp_cnt <= 3'h0;
1882
  else if (reset_mode | (sample_point & (susp_cnt == 3'h7)))
1883
    susp_cnt <=#Tp 3'h0;
1884 28 mohor
  else if (susp_cnt_en & sample_point)
1885
    susp_cnt <=#Tp susp_cnt + 1'b1;
1886
end
1887
 
1888
 
1889
 
1890
 
1891
always @ (posedge clk or posedge rst)
1892
begin
1893
  if (rst)
1894 25 mohor
    finish_msg <= 1'b0;
1895 28 mohor
  else if (go_rx_idle | go_rx_id1 | error_frame | reset_mode)
1896 25 mohor
    finish_msg <=#Tp 1'b0;
1897
  else if (go_rx_crc_lim)
1898
    finish_msg <=#Tp 1'b1;
1899
end
1900
 
1901
 
1902
always @ (posedge clk or posedge rst)
1903
begin
1904
  if (rst)
1905 39 mohor
    arbitration_lost <= 1'b0;
1906 129 mohor
//  else if (go_rx_idle | error_frame | reset_mode)
1907
  else if (go_rx_idle | error_frame_ended | reset_mode)
1908 39 mohor
    arbitration_lost <=#Tp 1'b0;
1909 129 mohor
//  else if (tx_state & sample_point & tx & arbitration_field)
1910
  else if (transmitter & sample_point & tx & arbitration_field)
1911 39 mohor
    arbitration_lost <=#Tp (~sampled_bit);
1912 25 mohor
end
1913
 
1914
 
1915 107 mohor
always @ (posedge clk or posedge rst)
1916 39 mohor
begin
1917 107 mohor
  if (rst)
1918
    arbitration_lost_q <=#Tp 1'b0;
1919
  else
1920
    arbitration_lost_q <=#Tp arbitration_lost;
1921 39 mohor
end
1922 25 mohor
 
1923 39 mohor
 
1924
assign set_arbitration_lost_irq = arbitration_lost & (~arbitration_lost_q) & (~arbitration_blocked);
1925
 
1926
 
1927 28 mohor
always @ (posedge clk or posedge rst)
1928
begin
1929
  if (rst)
1930 39 mohor
    arbitration_cnt_en <= 1'b0;
1931
  else if (arbitration_blocked)
1932
    arbitration_cnt_en <=#Tp 1'b0;
1933
  else if (rx_id1 & sample_point & (~arbitration_blocked))
1934
    arbitration_cnt_en <=#Tp 1'b1;
1935
end
1936
 
1937
 
1938
 
1939
always @ (posedge clk or posedge rst)
1940
begin
1941
  if (rst)
1942
    arbitration_blocked <= 1'b0;
1943
  else if (read_arbitration_lost_capture_reg)
1944
    arbitration_blocked <=#Tp 1'b0;
1945
  else if (set_arbitration_lost_irq)
1946
    arbitration_blocked <=#Tp 1'b1;
1947
end
1948
 
1949
 
1950
always @ (posedge clk or posedge rst)
1951
begin
1952
  if (rst)
1953
    arbitration_lost_capture <= 5'h0;
1954
  else if (read_arbitration_lost_capture_reg)
1955
    arbitration_lost_capture <=#Tp 5'h0;
1956
  else if (sample_point & (~arbitration_blocked) & arbitration_cnt_en & (~bit_de_stuff))
1957
    arbitration_lost_capture <=#Tp arbitration_lost_capture + 1'b1;
1958
end
1959
 
1960
 
1961
 
1962
always @ (posedge clk or posedge rst)
1963
begin
1964
  if (rst)
1965 107 mohor
    rx_err_cnt <= 9'h0;
1966 35 mohor
  else if (we_rx_err_cnt & (~node_bus_off))
1967
    rx_err_cnt <=#Tp {1'b0, data_in};
1968
  else if (set_reset_mode)
1969 107 mohor
    rx_err_cnt <=#Tp 9'h0;
1970 28 mohor
  else
1971
    begin
1972 129 mohor
//      if ((~listen_only_mode) & (~transmitter | arbitration_lost | suspend))
1973 126 mohor
      if ((~listen_only_mode) & (~transmitter | arbitration_lost))
1974 28 mohor
        begin
1975 126 mohor
          if (go_rx_ack_lim & (~go_error_frame) & (~crc_err) & (rx_err_cnt > 9'h0))
1976 36 mohor
            begin
1977 107 mohor
              if (rx_err_cnt > 9'd127)
1978
                rx_err_cnt <=#Tp 9'd127;
1979 36 mohor
              else
1980
                rx_err_cnt <=#Tp rx_err_cnt - 1'b1;
1981
            end
1982 129 mohor
          else if (rx_err_cnt < 9'd128)
1983 36 mohor
            begin
1984 44 mohor
              if (go_error_frame & (~rule5))                                                                            // 1  (rule 5 is just the opposite then rule 1 exception
1985 36 mohor
                rx_err_cnt <=#Tp rx_err_cnt + 1'b1;
1986 129 mohor
//              else if ( (error_flag_over & (~error_flag_over_latched) & sample_point & (~sampled_bit) & (error_cnt1 == 3'd7) & (~rx_err_cnt_blocked)  ) |   // 2
1987
//              else if ( (error_flag_over & (~error_flag_over_latched) & sample_point & (~sampled_bit) & (error_cnt1 == 3'd7)     ) |   // 2
1988
              else if ( (error_flag_over & (~error_flag_over_latched) & sample_point & (~sampled_bit) & (error_cnt1 == 3'd7)     ) |   // 2
1989 125 mohor
                        (go_error_frame & rule5                                                                                  ) |   // 5
1990 126 mohor
//                        (error_frame & sample_point & (~sampled_bit) & (delayed_dominant_cnt == 3'h7)                            )     // 6
1991
                        (sample_point & (~sampled_bit) & (delayed_dominant_cnt == 3'h7)                            )     // 6
1992 36 mohor
                      )
1993
                rx_err_cnt <=#Tp rx_err_cnt + 4'h8;
1994
            end
1995 30 mohor
        end
1996 28 mohor
    end
1997
end
1998
 
1999
 
2000
always @ (posedge clk or posedge rst)
2001
begin
2002
  if (rst)
2003 107 mohor
    tx_err_cnt <= 9'h0;
2004 35 mohor
  else if (we_tx_err_cnt)
2005
    tx_err_cnt <=#Tp {1'b0, data_in};
2006 28 mohor
  else
2007
    begin
2008 35 mohor
      if (set_reset_mode)
2009 107 mohor
        tx_err_cnt <=#Tp 9'd127;
2010
      else if ((tx_err_cnt > 9'd0) & (tx_successful | bus_free))
2011 30 mohor
        tx_err_cnt <=#Tp tx_err_cnt - 1'h1;
2012 129 mohor
//      else if (transmitter & (~arbitration_lost) & (~suspend))
2013 126 mohor
      else if (transmitter & (~arbitration_lost))
2014 28 mohor
        begin
2015 129 mohor
          if ( (sample_point & (~sampled_bit) & (delayed_dominant_cnt == 3'h7)                                          ) |       // 6
2016
               (go_error_frame & rule5                                                                                  ) |       // 4  (rule 5 is the same as rule 4)
2017
               (go_error_frame & (~(transmitter & node_error_passive & ack_err)) & (~(transmitter & stuff_err & arbitration_field & sample_point & tx & (~sampled_bit)))                                       ) |       // 3 
2018
               (error_frame & rule3_exc1_2                                                                              ) //|       // 3
2019
//               (go_error_frame & (~(transmitter & stuff_err & arbitration_field & sample_point & tx & (~sampled_bit)))  )         // 
2020 28 mohor
             )
2021
            tx_err_cnt <=#Tp tx_err_cnt + 4'h8;
2022
        end
2023
    end
2024
end
2025
 
2026
 
2027
always @ (posedge clk or posedge rst)
2028
begin
2029
  if (rst)
2030
    rx_err_cnt_blocked <= 1'b0;
2031 129 mohor
  else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
2032 28 mohor
    rx_err_cnt_blocked <=#Tp 1'b0;
2033 107 mohor
  else if (sample_point & (error_cnt1 == 3'd7))
2034 28 mohor
    rx_err_cnt_blocked <=#Tp 1'b1;
2035
end
2036
 
2037
 
2038
 
2039
always @ (posedge clk or posedge rst)
2040
begin
2041
  if (rst)
2042
    node_error_passive <= 1'b0;
2043 126 mohor
//  else if ((rx_err_cnt < 128) & (tx_err_cnt < 9'd128) & error_frame_ended)
2044
  else if ((rx_err_cnt < 128) & (tx_err_cnt < 9'd128))
2045 28 mohor
    node_error_passive <=#Tp 1'b0;
2046 107 mohor
  else if (((rx_err_cnt >= 128) | (tx_err_cnt >= 9'd128)) & (error_frame_ended | go_error_frame | (~reset_mode) & reset_mode_q) & (~node_bus_off))
2047 28 mohor
    node_error_passive <=#Tp 1'b1;
2048
end
2049
 
2050
 
2051 36 mohor
assign node_error_active = ~(node_error_passive | node_bus_off);
2052
 
2053
 
2054 28 mohor
always @ (posedge clk or posedge rst)
2055
begin
2056
  if (rst)
2057
    node_bus_off <= 1'b0;
2058 107 mohor
  else if ((rx_err_cnt == 9'h0) & (tx_err_cnt == 9'd0) & (~reset_mode) | (we_tx_err_cnt & (data_in < 8'd255)))
2059 28 mohor
    node_bus_off <=#Tp 1'b0;
2060 107 mohor
  else if ((tx_err_cnt >= 9'd256) | (we_tx_err_cnt & (data_in == 8'd255)))
2061 28 mohor
    node_bus_off <=#Tp 1'b1;
2062
end
2063
 
2064
 
2065 35 mohor
 
2066 28 mohor
always @ (posedge clk or posedge rst)
2067
begin
2068
  if (rst)
2069 107 mohor
    bus_free_cnt <= 4'h0;
2070 35 mohor
  else if (reset_mode)
2071 107 mohor
    bus_free_cnt <=#Tp 4'h0;
2072 30 mohor
  else if (sample_point)
2073
    begin
2074 107 mohor
      if (sampled_bit & bus_free_cnt_en & (bus_free_cnt < 4'd10))
2075 35 mohor
        bus_free_cnt <=#Tp bus_free_cnt + 1'b1;
2076 30 mohor
      else
2077 107 mohor
        bus_free_cnt <=#Tp 4'h0;
2078 30 mohor
    end
2079 28 mohor
end
2080
 
2081
 
2082 35 mohor
always @ (posedge clk or posedge rst)
2083
begin
2084
  if (rst)
2085
    bus_free_cnt_en <= 1'b0;
2086
  else if ((~reset_mode) & reset_mode_q | node_bus_off_q & (~reset_mode))
2087
    bus_free_cnt_en <=#Tp 1'b1;
2088 121 mohor
  else if (sample_point & sampled_bit & (bus_free_cnt==4'd10) & (~node_bus_off))
2089 35 mohor
    bus_free_cnt_en <=#Tp 1'b0;
2090
end
2091 28 mohor
 
2092
 
2093 35 mohor
always @ (posedge clk or posedge rst)
2094
begin
2095
  if (rst)
2096
    bus_free <= 1'b0;
2097 107 mohor
  else if (sample_point & sampled_bit & (bus_free_cnt==4'd10))
2098 35 mohor
    bus_free <=#Tp 1'b1;
2099
  else
2100
    bus_free <=#Tp 1'b0;
2101
end
2102
 
2103
 
2104
always @ (posedge clk or posedge rst)
2105
begin
2106
  if (rst)
2107
    waiting_for_bus_free <= 1'b1;
2108
  else if (bus_free & (~node_bus_off))
2109
    waiting_for_bus_free <=#Tp 1'b0;
2110
  else if ((~reset_mode) & reset_mode_q | node_bus_off_q & (~reset_mode))
2111
    waiting_for_bus_free <=#Tp 1'b1;
2112
end
2113
 
2114
 
2115 28 mohor
assign tx_oen = node_bus_off;
2116
 
2117 35 mohor
assign set_reset_mode = node_bus_off & (~node_bus_off_q);
2118
assign error_status = (~reset_mode) & extended_mode? ((rx_err_cnt >= error_warning_limit) | (tx_err_cnt >= error_warning_limit))    :
2119 107 mohor
                                                     ((rx_err_cnt >= 9'd96) | (tx_err_cnt >= 9'd96))                                      ;
2120 28 mohor
 
2121 35 mohor
assign transmit_status = transmitting                 | (extended_mode & waiting_for_bus_free);
2122
assign receive_status  = (~rx_idle) & (~transmitting) | (extended_mode & waiting_for_bus_free);
2123
 
2124 39 mohor
 
2125
/* Error code capture register */
2126
always @ (posedge clk or posedge rst)
2127
begin
2128
  if (rst)
2129
    error_capture_code <= 8'h0;
2130
  else if (read_error_code_capture_reg)
2131
    error_capture_code <=#Tp 8'h0;
2132
  else if (set_bus_error_irq)
2133
    error_capture_code <=#Tp {error_capture_code_type[7:6], error_capture_code_direction, error_capture_code_segment[4:0]};
2134
end
2135
 
2136
 
2137
 
2138 107 mohor
assign error_capture_code_segment[0] = rx_idle | rx_ide | (rx_id2 & (bit_cnt<6'd13)) | rx_r1 | rx_r0 | rx_dlc | rx_ack | rx_ack_lim | error_frame & node_error_active;
2139 39 mohor
assign error_capture_code_segment[1] = rx_idle | rx_id1 | rx_id2 | rx_dlc | rx_data | rx_ack_lim | rx_eof | rx_inter | error_frame & node_error_passive;
2140 107 mohor
assign error_capture_code_segment[2] = (rx_id1 & (bit_cnt>6'd7)) | rx_rtr1 | rx_ide | rx_id2 | rx_rtr2 | rx_r1 | error_frame & node_error_passive | overload_frame;
2141
assign error_capture_code_segment[3] = (rx_id2 & (bit_cnt>6'd4)) | rx_rtr2 | rx_r1 | rx_r0 | rx_dlc | rx_data | rx_crc | rx_crc_lim | rx_ack | rx_ack_lim | rx_eof | overload_frame;
2142 39 mohor
assign error_capture_code_segment[4] = rx_crc_lim | rx_ack | rx_ack_lim | rx_eof | rx_inter | error_frame | overload_frame;
2143
assign error_capture_code_direction  = ~transmitting;
2144
 
2145
 
2146
always @ (bit_err or form_err or stuff_err)
2147
begin
2148
  if (bit_err)
2149 107 mohor
    error_capture_code_type[7:6] = 2'b00;
2150 39 mohor
  else if (form_err)
2151 107 mohor
    error_capture_code_type[7:6] = 2'b01;
2152 39 mohor
  else if (stuff_err)
2153 107 mohor
    error_capture_code_type[7:6] = 2'b10;
2154 39 mohor
  else
2155 107 mohor
    error_capture_code_type[7:6] = 2'b11;
2156 39 mohor
end
2157
 
2158
 
2159
assign set_bus_error_irq = go_error_frame & (~error_capture_code_blocked);
2160
 
2161
 
2162
always @ (posedge clk or posedge rst)
2163
begin
2164
  if (rst)
2165
    error_capture_code_blocked <= 1'b0;
2166
  else if (read_error_code_capture_reg)
2167
    error_capture_code_blocked <=#Tp 1'b0;
2168
  else if (set_bus_error_irq)
2169
    error_capture_code_blocked <=#Tp 1'b1;
2170
end
2171
 
2172
 
2173 2 mohor
endmodule

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