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[/] [cavlc/] [trunk/] [rtl/] [cavlc_len_gen.v] - Blame information for rev 6
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qiubin |
//2011-8-7 20:19 initial revision
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`include "defines.v"
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module cavlc_len_gen (
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cavlc_state,
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len_read_total_coeffs_comb,
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len_read_levels_comb,
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len_read_total_zeros_comb,
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len_read_run_befores_comb,
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len_comb
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);
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//------------------------
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// ports
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//------------------------
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input [7:0] cavlc_state;
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input [4:0] len_read_total_coeffs_comb;
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input [4:0] len_read_levels_comb;
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input [3:0] len_read_total_zeros_comb;
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input [3:0] len_read_run_befores_comb;
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output [4:0] len_comb;
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//------------------------
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// regs
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//------------------------
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reg [4:0] len_comb; //number of bits comsumed by cavlc in a cycle
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//------------------------
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// len_comb
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//------------------------
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always @ (*)
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case (1'b1) //synthesis parallel_case
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cavlc_state[`cavlc_read_total_coeffs_bit] : len_comb <= len_read_total_coeffs_comb;
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cavlc_state[`cavlc_read_t1s_flags_bit],
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cavlc_state[`cavlc_read_level_prefix_bit],
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cavlc_state[`cavlc_read_level_suffix_bit] : len_comb <= len_read_levels_comb;
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cavlc_state[`cavlc_read_total_zeros_bit] : len_comb <= len_read_total_zeros_comb;
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cavlc_state[`cavlc_read_run_befores_bit] : len_comb <= len_read_run_befores_comb;
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cavlc_state[`cavlc_calc_level_bit],
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cavlc_state[`cavlc_idle_bit] : len_comb <= 0;
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default : len_comb <= 'bx;
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endcase
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endmodule
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