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zguig52 |
---- Design Name: ccsds_tx_coder_convolutional
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---- Version: 1.0.0
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---- Description:
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---- Convolutional coder
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-------------------------------
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---- Author(s):
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---- Guillaume REMBERT
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-------------------------------
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---- Licence:
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---- MIT
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-------------------------------
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---- Changes list:
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---- 2017/01/15: initial release
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-------------------------------
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-- TODO: puncturation + input rate /= 1
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-- libraries used
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library ieee;
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use ieee.std_logic_1164.all;
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use work.ccsds_rxtx_functions.all;
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use work.ccsds_rxtx_types.all;
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--=============================================================================
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-- Entity declaration for ccsds_tx / unitary tx convolutional coder inputs and outputs
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--=============================================================================
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entity ccsds_tx_coder_convolutional is
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generic(
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constant CCSDS_TX_CODER_CONV_CONNEXION_VECTORS: std_logic_vector_array := ("1111001", "1011011");
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constant CCSDS_TX_CODER_CONV_CONSTRAINT_SIZE: integer := 7; -- in bits
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constant CCSDS_TX_CODER_CONV_DATA_BUS_SIZE: integer; -- in bits
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constant CCSDS_TX_CODER_CONV_OPERATING_MODE: integer := 1; -- 0=streaming / 1=truncated (reset state when new frame) //TODO: terminated trellis + tailbiting
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constant CCSDS_TX_CODER_CONV_OUTPUT_INVERSION: boolean_array := (false, true);
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constant CCSDS_TX_CODER_CONV_RATE_OUTPUT: integer := 2; -- in bits/operation
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constant CCSDS_TX_CODER_CONV_SEED: std_logic_vector := "000000"
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);
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port(
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-- inputs
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clk_i: in std_logic;
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dat_i: in std_logic_vector(CCSDS_TX_CODER_CONV_DATA_BUS_SIZE-1 downto 0);
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dat_val_i: in std_logic;
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rst_i: in std_logic;
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-- outputs
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bus_o: out std_logic;
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dat_o: out std_logic_vector(CCSDS_TX_CODER_CONV_DATA_BUS_SIZE*CCSDS_TX_CODER_CONV_RATE_OUTPUT-1 downto 0);
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dat_val_o: out std_logic
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);
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end ccsds_tx_coder_convolutional;
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--=============================================================================
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-- architecture declaration / internal components and connections
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--=============================================================================
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architecture rtl of ccsds_tx_coder_convolutional is
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-- internal constants
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type connexion_vectors_array is array(CCSDS_TX_CODER_CONV_RATE_OUTPUT-1 downto 0) of std_logic_vector(CCSDS_TX_CODER_CONV_CONSTRAINT_SIZE-1 downto 0);
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signal connexion_vectors: connexion_vectors_array;
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constant connexion_vectors_array_size: integer := CCSDS_TX_CODER_CONV_CONNEXION_VECTORS'length;
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constant output_inversion_array_size: integer := CCSDS_TX_CODER_CONV_OUTPUT_INVERSION'length;
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-- internal variable signals
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signal coder_busy: std_logic := '0';
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signal coder_memory: std_logic_vector(CCSDS_TX_CODER_CONV_CONSTRAINT_SIZE-2 downto 0) := CCSDS_TX_CODER_CONV_SEED;
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-- components instanciation and mapping
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begin
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bus_o <= coder_busy;
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CONNEXION_VECTORS_GENERATOR: for vector_counter in 0 to CCSDS_TX_CODER_CONV_RATE_OUTPUT-1 generate
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connexion_vectors(CCSDS_TX_CODER_CONV_RATE_OUTPUT-1-vector_counter) <= convert_std_logic_vector_array_to_std_logic_vector(CCSDS_TX_CODER_CONV_CONNEXION_VECTORS, vector_counter);
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end generate CONNEXION_VECTORS_GENERATOR;
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-- presynthesis checks
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CHKCODERP0 : if (CCSDS_TX_CODER_CONV_SEED'length /= CCSDS_TX_CODER_CONV_CONSTRAINT_SIZE-1) generate
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process
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begin
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report "ERROR: SEED SIZE HAS TO BE EQUAL TO CONSTRAINT SIZE - 1" severity failure;
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wait;
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end process;
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end generate CHKCODERP0;
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CHKCODERP1 : if (connexion_vectors_array_size /= CCSDS_TX_CODER_CONV_RATE_OUTPUT) generate
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process
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begin
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report "ERROR: CONNEXION VECTORS ARRAY SIZE HAS TO BE EQUAL TO OUTPUT RATE : " & integer'image(connexion_vectors_array_size) severity failure;
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wait;
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end process;
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end generate CHKCODERP1;
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CHKCODERP2 : if (output_inversion_array_size /= CCSDS_TX_CODER_CONV_RATE_OUTPUT) generate
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process
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begin
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report "ERROR: OUTPUT INVERSION ARRAY HAS TO BE EQUAL TO OUTPUT RATE" severity failure;
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wait;
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end process;
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end generate CHKCODERP2;
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-- internal processing
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--=============================================================================
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-- Begin of coderp
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-- Convolutional encode bits based on connexion vectors
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--=============================================================================
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-- read: rst_i, dat_i, dat_val_i
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-- write: dat_o, dat_val_o, coder_busy
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-- r/w:
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CODERP: process (clk_i)
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variable coder_data_pointer: integer range -1 to (CCSDS_TX_CODER_CONV_DATA_BUS_SIZE-1) := -1;
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variable coder_data: std_logic_vector(CCSDS_TX_CODER_CONV_DATA_BUS_SIZE-1 downto 0) := (others => '0');
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variable coder_atomic_result: std_logic := '0';
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begin
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-- on each clock rising edge
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if rising_edge(clk_i) then
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-- reset signal received
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if (rst_i = '1') then
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-- dat_o <= (others => '0');
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dat_val_o <= '0';
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coder_memory <= CCSDS_TX_CODER_CONV_SEED;
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coder_data_pointer := -1;
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coder_atomic_result := '0';
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coder_busy <= '0';
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else
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case coder_data_pointer is
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-- no current computation
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when -1 =>
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dat_val_o <= '0';
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-- reset on new frame behaviour
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if (CCSDS_TX_CODER_CONV_OPERATING_MODE = 1) then
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coder_memory <= CCSDS_TX_CODER_CONV_SEED;
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end if;
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-- store data
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if (dat_val_i = '1') then
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coder_data := dat_i;
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coder_busy <= '1';
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coder_data_pointer := CCSDS_TX_CODER_CONV_DATA_BUS_SIZE-1;
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else
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-- nothing to be done
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coder_busy <= '0';
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end if;
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-- processing
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when others =>
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coder_busy <= '1';
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dat_val_o <= '0';
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-- shift memory
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coder_memory <= coder_memory(CCSDS_TX_CODER_CONV_CONSTRAINT_SIZE-3 downto 0) & coder_data(coder_data_pointer);
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-- compute output
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for i in CCSDS_TX_CODER_CONV_RATE_OUTPUT-1 downto 0 loop
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if (connexion_vectors(i)(CCSDS_TX_CODER_CONV_CONSTRAINT_SIZE-1) = '1') then
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coder_atomic_result := coder_data(coder_data_pointer);
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else
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coder_atomic_result := '0';
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end if;
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for j in CCSDS_TX_CODER_CONV_CONSTRAINT_SIZE-2 downto 0 loop
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if (connexion_vectors(i)(j) = '1') then
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coder_atomic_result := coder_atomic_result xor coder_memory(CCSDS_TX_CODER_CONV_CONSTRAINT_SIZE-2-j);
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end if;
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end loop;
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if (CCSDS_TX_CODER_CONV_OUTPUT_INVERSION(CCSDS_TX_CODER_CONV_RATE_OUTPUT-1-i) = true) then
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dat_o(coder_data_pointer*CCSDS_TX_CODER_CONV_RATE_OUTPUT+i) <= not(coder_atomic_result);
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else
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dat_o(coder_data_pointer*CCSDS_TX_CODER_CONV_RATE_OUTPUT+i) <= coder_atomic_result;
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end if;
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end loop;
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-- output is computed
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if (coder_data_pointer = 0) then
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coder_busy <= '0';
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dat_val_o <= '1';
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end if;
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coder_data_pointer := coder_data_pointer - 1;
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end case;
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end if;
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end if;
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end process;
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end rtl;
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