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[/] [cfft/] [trunk/] [src/] [div4limit.vhd] - Blame information for rev 14

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Line No. Rev Author Line
1 2 sradio 
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--
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-- Title       : div4limit
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-- Design      : cfft
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-- Author      : ZHAO Ming
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-- email           : sradio@opencores.org
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--
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---------------------------------------------------------------------------------------------------
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--
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-- File        : div4limit.vhd
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-- Generated   : Tue Jul 16 10:39:17 2002
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--
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---------------------------------------------------------------------------------------------------
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--
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-- Description : Div 4 Limit to 12 bit
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--
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---------------------------------------------------------------------------------------------------
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--
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-- Revisions       :    0
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-- Revision Number :    1
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-- Version         :    1
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-- Date            :    Oct 17 2002
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-- Modifier        :    ZHAO Ming
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-- Desccription    :    Data width configurable
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--
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---------------------------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.all;
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use IEEE.STD_LOGIC_UNSIGNED.all;
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entity div4limit is
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        generic (
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                WIDTH : Natural
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        );
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        port(
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                clk : in std_logic;
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                 D : in STD_LOGIC_VECTOR(WIDTH+3 downto 0);
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                 Q : out STD_LOGIC_VECTOR(WIDTH-1 downto 0)
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             );
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end div4limit;
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architecture div4limit of div4limit is
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begin
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process( clk )
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variable Temp_D:std_logic_vector( WIDTH+1 downto 0 );
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begin
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        if clk'event and clk='1' then
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                Temp_D:=D( WIDTH+3 downto 2 )+D(1);
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                if Temp_D(WIDTH+1)='1' and Temp_D(WIDTH downto WIDTH-1)/="11" then
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                        Temp_D(WIDTH+1 downto WIDTH-1):="111";
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                        Temp_D(WIDTH-2 downto 1):=( others=>'0' );
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                        Temp_D(0):='1';
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                elsif Temp_D(WIDTH+1)='0' and Temp_D(WIDTH downto WIDTH-1)/="00" then
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                        Temp_D(WIDTH+1 downto WIDTH-1):="000";
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                        Temp_D(WIDTH-2 downto 0):=( others=>'1' );
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                end if;
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                Q<=Temp_D(WIDTH-1 downto 0 );
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        end if;
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end process;
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end div4limit;

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