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[/] [claw/] [trunk/] [or1200_cpu/] [tb_or1200_rf_top.v] - Blame information for rev 4

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////////////////////////////////////////////////////////////////////
////  Author:                                                   ////
////     - Balaji V. Iyer, bviyer@ncsu.edu                      ////
////////////////////////////////////////////////////////////////////
 
`include "timescale.v"
`include "or1200_defines.v"
 
 
module tb_or1200_rf_top();
 
parameter aw = 5;  //`OR1200_REGFILE_ADDR_WIDTH;
parameter dw = 32;// `OR1200_OPERAND_WIDTH;
 
reg clk;
reg rst;
reg supv;
reg wb_freeze;
reg [aw-1:0] addrw;
reg [dw-1:0] dataw;
reg we;
reg we2;
reg flushpipe;
 
reg [aw-1:0] addrw2;
reg [dw-1:0] dataw2;
 
reg id_freeze;
reg [aw-1:0] addra;
reg [aw-1:0] addrb;
wire [dw-1:0] dataa;
wire [dw-1:0] datab;
reg rda;
reg rdb;
 
reg [aw-1:0] addra2;
reg [aw-1:0] addrb2;
wire [dw-1:0] dataa2;
wire [dw-1:0] datab2;
reg rda2;
reg rdb2;
 
reg spr_cs;
reg spr_write;
reg [31:0] spr_addr;
reg [31:0] spr_dat_i;
wire [31:0] spr_dat_o;
 
wire[2:0] current_thread_read_out;
reg[2:0] current_thread_read;
reg[2:0] current_thread_write;
 
 
or1200_rf_top or1200_rf_top(.clk(clk), .rst(rst), .supv(supv),
  .wb_freeze(wb_freeze), .current_thread_read(current_thread_read),
  .addrw(addrw), .dataw(dataw), .addrw2(addrw2), .dataw2(dataw2), .we(we),
  .we2(we2), .flushpipe (flushpipe), .id_freeze(id_freeze), .addra(addra),
  .addrb(addrb), .dataa(dataa), .datab(datab), .rda(rda), .rdb(rdb),
  .addra2(addra2), .addrb2(addrb2), .dataa2(dataa2),
  .datab2(datab2), .rda2(rda2), .rdb2(rdb2), .spr_cs(spr_cs),
  .spr_write(spr_write), .spr_addr(spr_addr), .spr_dat_i(spr_dat_i),
  .spr_dat_o(spr_dat_o), .current_thread_read_out(current_thread_read_out),
  .current_thread_write(current_thread_write));
 
initial begin
  #0     clk=0;
        rst=0;
 
 
  #10   rst=1;
        current_thread_write=3'bX;
  #10   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr=32'b0;
        spr_write=0;
        addrw =5'd1;
        addrw2=5'd2;
        we=1;
        we2=1;
        rda=0;
        rda2=0;
        supv=1;
        dataw =32'h12345678;
        dataw2 =32'h90ABCDEF;
        current_thread_write = 3'b0;
 
  #10   id_freeze=0;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rda=1;
        rda2=1;
        addra=5'd1;
        addra2=5'd2;
        current_thread_read=3'd0;
 
  #20   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr[10:5]=6'b0;
        spr_write=0;
        addrw =5'd13;
        addrw2=5'd14;
        rda=0;
        rda2=0;
        we=1;
        we2=1;
        supv=1;
        dataw =32'h23456789;
        dataw2 =32'h0ABCDEF1;
        current_thread_write=3'd0;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rdb=1;
        rdb2=1;
        addrb=5'd13;
        addrb2=5'd14;
        current_thread_read=3'd0;
 
  #10   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr=32'b0;
        spr_write=0;
        addrw =5'd1;
        addrw2=5'd2;
        we=1;
        we2=1;
        rda=0;
        rda2=0;
        supv=1;
        dataw =32'h12345678;
        dataw2 =32'h90ABCDEF;
        current_thread_write=3'd1;
 
  #10   id_freeze=0;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rda=1;
        rda2=1;
        addra=5'd1;
        addra2=5'd2;
        current_thread_read=3'd1;
 
  #20   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr[10:5]=6'b0;
        spr_write=0;
        addrw =5'd13;
        addrw2=5'd14;
        rda=0;
        rda2=0;
        we=1;
        we2=1;
        supv=1;
        dataw =32'h23456789;
        dataw2 =32'h0ABCDEF1;
        current_thread_write=3'd1;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rdb=1;
        rdb2=1;
        addrb=5'd13;
        addrb2=5'd14;
        current_thread_read=3'd1;
 
  #10   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr=32'b0;
        spr_write=0;
        addrw =5'd1;
        addrw2=5'd2;
        we=1;
        we2=1;
        rda=0;
        rda2=0;
        supv=1;
        dataw =32'h11111112;
        dataw2 =32'h2AAAAAAA;
        current_thread_write=3'd2;
 
  #10   id_freeze=0;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rda=1;
        rda2=1;
        addra=5'd1;
        addra2=5'd2;
        current_thread_read=3'd2;
 
  #20   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr[10:5]=6'b0;
        spr_write=0;
        addrw =5'd13;
        addrw2=5'd14;
        rda=0;
        rda2=0;
        we=1;
        we2=1;
        supv=1;
        dataw =32'h31111111;
        dataw2 =32'h3BBBBBBB;
        current_thread_write=3'd2;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rdb=1;
        rdb2=1;
        addrb=5'd13;
        addrb2=5'd14;
        current_thread_read=3'd2;
 
  #10   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr=32'b0;
        spr_write=0;
        addrw =5'd1;
        addrw2=5'd2;
        we=1;
        we2=1;
        rda=0;
        rda2=0;
        supv=1;
        dataw =32'h43333333;
        dataw2 =32'h4CCCCCCC;
        current_thread_write=3'd3;
 
  #10   id_freeze=0;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rda=1;
        rda2=1;
        addra=5'd1;
        addra2=5'd2;
        current_thread_read=3'd3;
 
  #20   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr[10:5]=6'b0;
        spr_write=0;
        addrw =5'd13;
        addrw2=5'd14;
        rda=0;
        rda2=0;
        we=1;
        we2=1;
        supv=1;
        dataw =32'h23456789;
        dataw2 =32'h0ABCDEF1;
        current_thread_write=3'd3;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rdb=1;
        rdb2=1;
        addrb=5'd13;
        addrb2=5'd14;
        current_thread_read=3'd3;
 
  #10   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr=32'b0;
        spr_write=0;
        addrw =5'd1;
        addrw2=5'd2;
        we=1;
        we2=1;
        rda=0;
        rda2=0;
        supv=1;
        dataw =32'h12345678;
        dataw2 =32'h90ABCDEF;
        current_thread_write=3'd4;
 
  #10   id_freeze=0;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rda=1;
        rda2=1;
        addra=5'd1;
        addra2=5'd2;
        current_thread_read=3'd4;
 
  #20   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr[10:5]=6'b0;
        spr_write=0;
        addrw =5'd13;
        addrw2=5'd14;
        rda=0;
        rda2=0;
        we=1;
        we2=1;
        supv=1;
        dataw =32'h01323434;
        dataw2 =32'h23389321;
        current_thread_write=3'd4;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rdb=1;
        rdb2=1;
        addrb=5'd13;
        addrb2=5'd14;
        current_thread_read=3'd4;
 
  #10   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr=32'b0;
        spr_write=0;
        addrw =5'd1;
        addrw2=5'd2;
        we=1;
        we2=1;
        rda=0;
        rda2=0;
        supv=1;
        dataw =32'h13456782;
        dataw2 =32'h9AABCDEF;
        current_thread_write=3'd5;
 
  #10   id_freeze=0;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rda=1;
        rda2=1;
        addra=5'd1;
        addra2=5'd2;
        current_thread_read=3'd5;
 
  #20   rst=0;
        wb_freeze=0;
        flushpipe=0;
        spr_cs=0;
        spr_addr[10:5]=6'b0;
        spr_write=0;
        addrw =5'd13;
        addrw2=5'd14;
        rda=0;
        rda2=0;
        we=1;
        we2=1;
        supv=1;
        dataw =32'h34567829;
        dataw2 =32'h0ABCDE1F;
        current_thread_write=3'd5;
 
  #20   spr_write=0;
        id_freeze=0;
        we=0;
        we2=0;
        rdb=1;
        rdb2=1;
        addrb=5'd13;
        addrb2=5'd14;
        current_thread_read=3'd5;
end
 
always #5 clk = ~clk;
endmodule

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[/] [claw/] [trunk/] [or1200_cpu/] [tb_or1200_rf_top.v] - Blame information for rev 4

Line No.	Rev	Author	Line
1	2	conte	`////////////////////////////////////////////////////////////////////`
2			`//// Author: ////`
3			`//// - Balaji V. Iyer, bviyer@ncsu.edu ////`
4			`////////////////////////////////////////////////////////////////////`
5
6			`include "timescale.v"
7			`include "or1200_defines.v"
8
9
10			`module tb_or1200_rf_top();`
11
12			parameter aw = 5; //`OR1200_REGFILE_ADDR_WIDTH;
13			parameter dw = 32;// `OR1200_OPERAND_WIDTH;
14
15			`reg clk;`
16			`reg rst;`
17			`reg supv;`
18			`reg wb_freeze;`
19			`reg [aw-1:0] addrw;`
20			`reg [dw-1:0] dataw;`
21			`reg we;`
22			`reg we2;`
23			`reg flushpipe;`
24
25			`reg [aw-1:0] addrw2;`
26			`reg [dw-1:0] dataw2;`
27
28			`reg id_freeze;`
29			`reg [aw-1:0] addra;`
30			`reg [aw-1:0] addrb;`
31			`wire [dw-1:0] dataa;`
32			`wire [dw-1:0] datab;`
33			`reg rda;`
34			`reg rdb;`
35
36			`reg [aw-1:0] addra2;`
37			`reg [aw-1:0] addrb2;`
38			`wire [dw-1:0] dataa2;`
39			`wire [dw-1:0] datab2;`
40			`reg rda2;`
41			`reg rdb2;`
42
43			`reg spr_cs;`
44			`reg spr_write;`
45			`reg [31:0] spr_addr;`
46			`reg [31:0] spr_dat_i;`
47			`wire [31:0] spr_dat_o;`
48
49			`wire[2:0] current_thread_read_out;`
50			`reg[2:0] current_thread_read;`
51			`reg[2:0] current_thread_write;`
52
53
54			`or1200_rf_top or1200_rf_top(.clk(clk), .rst(rst), .supv(supv),`
55			`.wb_freeze(wb_freeze), .current_thread_read(current_thread_read),`
56			`.addrw(addrw), .dataw(dataw), .addrw2(addrw2), .dataw2(dataw2), .we(we),`
57			`.we2(we2), .flushpipe (flushpipe), .id_freeze(id_freeze), .addra(addra),`
58			`.addrb(addrb), .dataa(dataa), .datab(datab), .rda(rda), .rdb(rdb),`
59			`.addra2(addra2), .addrb2(addrb2), .dataa2(dataa2),`
60			`.datab2(datab2), .rda2(rda2), .rdb2(rdb2), .spr_cs(spr_cs),`
61			`.spr_write(spr_write), .spr_addr(spr_addr), .spr_dat_i(spr_dat_i),`
62			`.spr_dat_o(spr_dat_o), .current_thread_read_out(current_thread_read_out),`
63			`.current_thread_write(current_thread_write));`
64
65			`initial begin`
66			`#0 clk=0;`
67			`rst=0;`
68
69
70			`#10 rst=1;`
71			`current_thread_write=3'bX;`
72			`#10 rst=0;`
73			`wb_freeze=0;`
74			`flushpipe=0;`
75			`spr_cs=0;`
76			`spr_addr=32'b0;`
77			`spr_write=0;`
78			`addrw =5'd1;`
79			`addrw2=5'd2;`
80			`we=1;`
81			`we2=1;`
82			`rda=0;`
83			`rda2=0;`
84			`supv=1;`
85			`dataw =32'h12345678;`
86			`dataw2 =32'h90ABCDEF;`
87			`current_thread_write = 3'b0;`
88
89			`#10 id_freeze=0;`
90
91			`#20 spr_write=0;`
92			`id_freeze=0;`
93			`we=0;`
94			`we2=0;`
95			`rda=1;`
96			`rda2=1;`
97			`addra=5'd1;`
98			`addra2=5'd2;`
99			`current_thread_read=3'd0;`
100
101			`#20 rst=0;`
102			`wb_freeze=0;`
103			`flushpipe=0;`
104			`spr_cs=0;`
105			`spr_addr[10:5]=6'b0;`
106			`spr_write=0;`
107			`addrw =5'd13;`
108			`addrw2=5'd14;`
109			`rda=0;`
110			`rda2=0;`
111			`we=1;`
112			`we2=1;`
113			`supv=1;`
114			`dataw =32'h23456789;`
115			`dataw2 =32'h0ABCDEF1;`
116			`current_thread_write=3'd0;`
117
118			`#20 spr_write=0;`
119			`id_freeze=0;`
120			`we=0;`
121			`we2=0;`
122			`rdb=1;`
123			`rdb2=1;`
124			`addrb=5'd13;`
125			`addrb2=5'd14;`
126			`current_thread_read=3'd0;`
127
128			`#10 rst=0;`
129			`wb_freeze=0;`
130			`flushpipe=0;`
131			`spr_cs=0;`
132			`spr_addr=32'b0;`
133			`spr_write=0;`
134			`addrw =5'd1;`
135			`addrw2=5'd2;`
136			`we=1;`
137			`we2=1;`
138			`rda=0;`
139			`rda2=0;`
140			`supv=1;`
141			`dataw =32'h12345678;`
142			`dataw2 =32'h90ABCDEF;`
143			`current_thread_write=3'd1;`
144
145			`#10 id_freeze=0;`
146
147			`#20 spr_write=0;`
148			`id_freeze=0;`
149			`we=0;`
150			`we2=0;`
151			`rda=1;`
152			`rda2=1;`
153			`addra=5'd1;`
154			`addra2=5'd2;`
155			`current_thread_read=3'd1;`
156
157			`#20 rst=0;`
158			`wb_freeze=0;`
159			`flushpipe=0;`
160			`spr_cs=0;`
161			`spr_addr[10:5]=6'b0;`
162			`spr_write=0;`
163			`addrw =5'd13;`
164			`addrw2=5'd14;`
165			`rda=0;`
166			`rda2=0;`
167			`we=1;`
168			`we2=1;`
169			`supv=1;`
170			`dataw =32'h23456789;`
171			`dataw2 =32'h0ABCDEF1;`
172			`current_thread_write=3'd1;`
173
174			`#20 spr_write=0;`
175			`id_freeze=0;`
176			`we=0;`
177			`we2=0;`
178			`rdb=1;`
179			`rdb2=1;`
180			`addrb=5'd13;`
181			`addrb2=5'd14;`
182			`current_thread_read=3'd1;`
183
184			`#10 rst=0;`
185			`wb_freeze=0;`
186			`flushpipe=0;`
187			`spr_cs=0;`
188			`spr_addr=32'b0;`
189			`spr_write=0;`
190			`addrw =5'd1;`
191			`addrw2=5'd2;`
192			`we=1;`
193			`we2=1;`
194			`rda=0;`
195			`rda2=0;`
196			`supv=1;`
197			`dataw =32'h11111112;`
198			`dataw2 =32'h2AAAAAAA;`
199			`current_thread_write=3'd2;`
200
201			`#10 id_freeze=0;`
202
203			`#20 spr_write=0;`
204			`id_freeze=0;`
205			`we=0;`
206			`we2=0;`
207			`rda=1;`
208			`rda2=1;`
209			`addra=5'd1;`
210			`addra2=5'd2;`
211			`current_thread_read=3'd2;`
212
213			`#20 rst=0;`
214			`wb_freeze=0;`
215			`flushpipe=0;`
216			`spr_cs=0;`
217			`spr_addr[10:5]=6'b0;`
218			`spr_write=0;`
219			`addrw =5'd13;`
220			`addrw2=5'd14;`
221			`rda=0;`
222			`rda2=0;`
223			`we=1;`
224			`we2=1;`
225			`supv=1;`
226			`dataw =32'h31111111;`
227			`dataw2 =32'h3BBBBBBB;`
228			`current_thread_write=3'd2;`
229
230			`#20 spr_write=0;`
231			`id_freeze=0;`
232			`we=0;`
233			`we2=0;`
234			`rdb=1;`
235			`rdb2=1;`
236			`addrb=5'd13;`
237			`addrb2=5'd14;`
238			`current_thread_read=3'd2;`
239
240			`#10 rst=0;`
241			`wb_freeze=0;`
242			`flushpipe=0;`
243			`spr_cs=0;`
244			`spr_addr=32'b0;`
245			`spr_write=0;`
246			`addrw =5'd1;`
247			`addrw2=5'd2;`
248			`we=1;`
249			`we2=1;`
250			`rda=0;`
251			`rda2=0;`
252			`supv=1;`
253			`dataw =32'h43333333;`
254			`dataw2 =32'h4CCCCCCC;`
255			`current_thread_write=3'd3;`
256
257			`#10 id_freeze=0;`
258
259			`#20 spr_write=0;`
260			`id_freeze=0;`
261			`we=0;`
262			`we2=0;`
263			`rda=1;`
264			`rda2=1;`
265			`addra=5'd1;`
266			`addra2=5'd2;`
267			`current_thread_read=3'd3;`
268
269			`#20 rst=0;`
270			`wb_freeze=0;`
271			`flushpipe=0;`
272			`spr_cs=0;`
273			`spr_addr[10:5]=6'b0;`
274			`spr_write=0;`
275			`addrw =5'd13;`
276			`addrw2=5'd14;`
277			`rda=0;`
278			`rda2=0;`
279			`we=1;`
280			`we2=1;`
281			`supv=1;`
282			`dataw =32'h23456789;`
283			`dataw2 =32'h0ABCDEF1;`
284			`current_thread_write=3'd3;`
285
286			`#20 spr_write=0;`
287			`id_freeze=0;`
288			`we=0;`
289			`we2=0;`
290			`rdb=1;`
291			`rdb2=1;`
292			`addrb=5'd13;`
293			`addrb2=5'd14;`
294			`current_thread_read=3'd3;`
295
296			`#10 rst=0;`
297			`wb_freeze=0;`
298			`flushpipe=0;`
299			`spr_cs=0;`
300			`spr_addr=32'b0;`
301			`spr_write=0;`
302			`addrw =5'd1;`
303			`addrw2=5'd2;`
304			`we=1;`
305			`we2=1;`
306			`rda=0;`
307			`rda2=0;`
308			`supv=1;`
309			`dataw =32'h12345678;`
310			`dataw2 =32'h90ABCDEF;`
311			`current_thread_write=3'd4;`
312
313			`#10 id_freeze=0;`
314
315			`#20 spr_write=0;`
316			`id_freeze=0;`
317			`we=0;`
318			`we2=0;`
319			`rda=1;`
320			`rda2=1;`
321			`addra=5'd1;`
322			`addra2=5'd2;`
323			`current_thread_read=3'd4;`
324
325			`#20 rst=0;`
326			`wb_freeze=0;`
327			`flushpipe=0;`
328			`spr_cs=0;`
329			`spr_addr[10:5]=6'b0;`
330			`spr_write=0;`
331			`addrw =5'd13;`
332			`addrw2=5'd14;`
333			`rda=0;`
334			`rda2=0;`
335			`we=1;`
336			`we2=1;`
337			`supv=1;`
338			`dataw =32'h01323434;`
339			`dataw2 =32'h23389321;`
340			`current_thread_write=3'd4;`
341
342			`#20 spr_write=0;`
343			`id_freeze=0;`
344			`we=0;`
345			`we2=0;`
346			`rdb=1;`
347			`rdb2=1;`
348			`addrb=5'd13;`
349			`addrb2=5'd14;`
350			`current_thread_read=3'd4;`
351
352			`#10 rst=0;`
353			`wb_freeze=0;`
354			`flushpipe=0;`
355			`spr_cs=0;`
356			`spr_addr=32'b0;`
357			`spr_write=0;`
358			`addrw =5'd1;`
359			`addrw2=5'd2;`
360			`we=1;`
361			`we2=1;`
362			`rda=0;`
363			`rda2=0;`
364			`supv=1;`
365			`dataw =32'h13456782;`
366			`dataw2 =32'h9AABCDEF;`
367			`current_thread_write=3'd5;`
368
369			`#10 id_freeze=0;`
370
371			`#20 spr_write=0;`
372			`id_freeze=0;`
373			`we=0;`
374			`we2=0;`
375			`rda=1;`
376			`rda2=1;`
377			`addra=5'd1;`
378			`addra2=5'd2;`
379			`current_thread_read=3'd5;`
380
381			`#20 rst=0;`
382			`wb_freeze=0;`
383			`flushpipe=0;`
384			`spr_cs=0;`
385			`spr_addr[10:5]=6'b0;`
386			`spr_write=0;`
387			`addrw =5'd13;`
388			`addrw2=5'd14;`
389			`rda=0;`
390			`rda2=0;`
391			`we=1;`
392			`we2=1;`
393			`supv=1;`
394			`dataw =32'h34567829;`
395			`dataw2 =32'h0ABCDE1F;`
396			`current_thread_write=3'd5;`
397
398			`#20 spr_write=0;`
399			`id_freeze=0;`
400			`we=0;`
401			`we2=0;`
402			`rdb=1;`
403			`rdb2=1;`
404			`addrb=5'd13;`
405			`addrb2=5'd14;`
406			`current_thread_read=3'd5;`
407			`end`
408
409			`always #5 clk = ~clk;`
410			`endmodule`