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[/] [claw/] [trunk/] [or1200_cpu/] [work/] [tb_or1200_cpu/] [_primary.vhd] - Blame information for rev 4

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library verilog;
use verilog.vl_types.all;
entity tb_or1200_cpu is
    generic(
        dw              : integer := 32;
        aw              : integer := 5
    );
end tb_or1200_cpu;

Line No.	Rev	Author	Line
1	2	conte	`library verilog;`
2			`use verilog.vl_types.all;`
3			`entity tb_or1200_cpu is`
4			`generic(`
5			`dw : integer := 32;`
6			`aw : integer := 5`
7			`);`
8			`end tb_or1200_cpu;`

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[/] [claw/] [trunk/] [or1200_cpu/] [work/] [tb_or1200_cpu/] [_primary.vhd] - Blame information for rev 4