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bbeaver |
//------------------------------------------------------------------------
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// This Verilog file was developed by Altera Corporation. It may be
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// freely copied and/or distributed at no cost. Any persons using this
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// file for any purpose do so at their own risk, and are responsible for
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// the results of such use. Altera Corporation does not guarantee that
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// this file is complete, correct, or fit for any particular purpose.
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// NO WARRANTY OF ANY KIND IS EXPRESSED OR IMPLIED. This notice must
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// accompany any copy of this file.
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//
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//------------------------------------------------------------------------
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// Imported to Opencores directory. Date Sept 10, 2001
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// Split related modules into separate files, as the manual splits them.
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// Added example instantiations to the beginning of each file.
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//
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/* EXAMPLE INSTANTIATIONS:
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lpm_constant
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#( 1, // lpm_width
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0, // lpm_cvalue
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"UNUSED" // lpm_strength, optional, {UNUSED, WEAK}
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) lpm_constant_example (
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.result (const_out[lpm_width-1:0])
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);
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lpm_inv
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#( 1 // lpm_width
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) lpm_inv_example (
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.result (data_out[lpm_width-1:0]),
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.data (data_in[lpm_width-1:0])
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);
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// NOTE: Bits data[lpm_size-1:0] are ANDed together to make result[0]
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lpm_and
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#( 1, // lpm_width (output width)
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1 // lpm_size (inputs to each gate)
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) lpm_and_example (
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.result (data_out[lpm_width-1:0]),
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.data (data_in[(lpm_size*lpm_width)-1:0])
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);
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// NOTE: Bits data[lpm_size-1:0] are ORed together to make result[0]
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lpm_or
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#( 1, // lpm_width (output width)
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1 // lpm_size (inputs to each gate)
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) lpm_or_example (
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.result (data_out[lpm_width-1:0]),
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.data (data_in[(lpm_size*lpm_width)-1:0])
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);
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// NOTE: Bits data_[lpm_size-1:0] are XORed together to make result[0]
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lpm_xor
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#( 1, // lpm_width (output width)
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1 // lpm_size (inputs to each gate)
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) lpm_xor_example (
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.result (data_out[lpm_width-1:0]),
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.data (data_in[(lpm_size*lpm_width)-1:0])
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);
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lpm_bustri
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#( 1 // lpm_width
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) lpm_bustri_example (
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.tridata (data_tristate[lpm_width-1:0]),
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.data (data_to_tristate[lpm_width-1:0]), // CHOICE
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.enabledt (enable_data_to_tristate_bus_HIGH), // OPTIONAL
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.result (data_from_tristate[lpm_width-1:0]), // CHOICE
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.enabletr (enable_data_to_result_bus_HIGH), // OPTIONAL
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);
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// NOTE: Bits data[lpm_size-1:0] are SELECTED to make result[0]
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lpm_mux
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#( 1, // lpm_width (output width)
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1, // lpm_size (inputs to each mux)
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1, // lpm_widths (number of bits in output select bus)
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) lpm_mux_example (
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.result (data_out[lpm_width-1:0]),
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.data (data_in[(lpm_size*lpm_width)-1:0]),
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.sel (data_sel[lpm_widths-1:0]),
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.clock (clock_if_pipelined), // OPTIONAL
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.clken (clock_enable_HIGH_if_pipelined), // OPTIONAL
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.aclr (async_clear_if_pipelined) // OPTIONAL
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);
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lpm_decode
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#( 1, // lpm_width (number of bits in input to be decoded)
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1, // lpm_decodes (number of actual outputs decoded)
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) lpm_decode_example (
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.eq (decodes_out[lpm_decodes-1:0]),
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.data (data_in[lpm_width:0]),
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.enable (force_all_outputs_LOW_when_LOW), // OPTIONAL
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.clock (clock_if_pipelined), // OPTIONAL
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.clken (clock_enable_HIGH_if_pipelined), // OPTIONAL
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.aclr (async_clear_if_pipelined) // OPTIONAL
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);
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lpm_clshift
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#( 1, // lpm_width (width of input vector)
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1, // lpm_widthdist (width of shift distance port)
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"LOGICAL" // lpm_shifttype, optional, {LOGICAL, ROTATE, ARITHMETIC}
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) lpm_clshift_example (
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.result (data_out[lpm_width-1:0]),
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.overflow (overflow_means_arith_bit_lost_or_result_became_0), // OPTIONAL
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.underflow (underflow_means_result_became_0), // OPTIONAL
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.data (data_in[lpm_width-1:0]),
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.direction (low_means_towards_LSB), // OPTIONAL
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.distance (shift_distance[lpm_widthdist-1:0])
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);
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*/
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//------------------------------------------------------------------------
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// LPM Synthesizable Models
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//------------------------------------------------------------------------
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// Version 1.5 (lpm 220) Date 12/17/99
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//
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// Modified LPM_ADD_SUB and LPM_MULT to accomodate LPM_WIDTH = 1.
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// Default values for LPM_WIDTH* are changed back to 1.
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// Added LPM_HINT to LPM_DIVIDE.
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// Rewritten LPM_FIFO_DC to output correctly.
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// Modified LPM_FIFO to output 0s before first read, output correct
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// values after aclr and sclr, and output LPM_NUMWORDS mod
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// exp(2, LPM_WIDTHU) when FIFO is full.
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//
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//------------------------------------------------------------------------
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// Version 1.4.1 (lpm 220) Date 10/29/99
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//
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// Default values for LPM_WIDTH* of LPM_ADD_SUB and LPM_MULT are changed
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// from 1 to 2.
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//
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//------------------------------------------------------------------------
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// Version 1.4 (lpm 220) Date 10/18/99
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//
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// Default values for each optional inputs for ALL modules are added.
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// Some LPM_PVALUE implementations were missing, and now implemented.
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//
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//------------------------------------------------------------------------
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// Version 1.3 (lpm 220) Date 06/23/99
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//
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// Corrected LPM_FIFO and LPM_FIFO_DC cout and empty/full flags.
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// Implemented LPM_COUNTER cin/cout, and LPM_MODULUS is now working.
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//
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//------------------------------------------------------------------------
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// Version 1.2 (lpm 220) Date 06/16/99
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//
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// Added LPM_RAM_DP, LPM_RAM_DQ, LPM_IO, LPM_ROM, LPM_FIFO, LPM_FIFO_DC.
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// Parameters and ports are added/discarded according to the spec.
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//
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//------------------------------------------------------------------------
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// Version 1.1 (lpm 220) Date 02/05/99
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//
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// Added LPM_DIVIDE module.
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//
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//------------------------------------------------------------------------
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// Version 1.0 Date 07/09/97
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//
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//------------------------------------------------------------------------
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// Excluded Functions:
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//
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// LPM_FSM and LPM_TTABLE.
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//
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//------------------------------------------------------------------------
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// Assumptions:
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//
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// 1. LPM_SVALUE, LPM_AVALUE, LPM_MODULUS, and LPM_NUMWORDS,
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// LPM_STRENGTH, LPM_DIRECTION, and LPM_PVALUE default value is
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// string UNUSED.
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//
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//------------------------------------------------------------------------
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// Verilog Language Issues:
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//
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// Two dimensional ports are not supported. Modules with two dimensional
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// ports are implemented as one dimensional signal of (LPM_SIZE * LPM_WIDTH)
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// bits wide.
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//
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//------------------------------------------------------------------------
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// Synthesis Issues:
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//
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// 1. LPM_COUNTER
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//
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// Currently synthesis tools do not allow mixing of level and edge
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// sensetive signals. To overcome that problem the "data" signal is
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// removed from the clock always block of lpm_counter, however the
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// synthesis result is accurate. For correct simulation add the "data"
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// pin to the sensetivity list as follows:
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//
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// always @(posedge clock or posedge aclr or posedge aset or
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// posedge aload or data)
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//------------------------------------------------------------------------
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module lpm_constant ( result );
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// NOTE: Parameters must be declared in the same order as the Properties
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// are specified in the Cell Specification document.
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parameter lpm_width = 1;
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parameter lpm_cvalue = 0;
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parameter lpm_strength = "UNUSED";
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parameter lpm_type = "lpm_constant";
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parameter lpm_hint = "UNUSED";
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parameter lpm_source_version = "lpm 220 version 1.6";
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output [lpm_width-1:0] result;
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assign result = lpm_cvalue;
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// Check for previous Parameter declaration order
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initial if ((lpm_width === "lpm_constant") || (lpm_type !== "lpm_constant"))
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begin
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$display ("LPM 220 Version 1.6 Parameter Order changed; update instantiation");
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$finish;
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end
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endmodule // lpm_constant
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//------------------------------------------------------------------------
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module lpm_inv ( result, data );
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// NOTE: Parameters must be declared in the same order as the Properties
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// are specified in the Cell Specification document.
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parameter lpm_width = 1;
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parameter lpm_type = "lpm_inv";
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parameter lpm_hint = "UNUSED";
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parameter lpm_source_version = "lpm 220 version 1.6";
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input [lpm_width-1:0] data;
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output [lpm_width-1:0] result;
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reg [lpm_width-1:0] result;
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always @(data)
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begin
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result = ~data;
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end
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// Check for previous Parameter declaration order
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initial if ((lpm_width === "lpm_inv") || (lpm_type !== "lpm_inv"))
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begin
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$display ("LPM 220 Version 1.6 Parameter Order changed; update instantiation");
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$finish;
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end
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endmodule // lpm_inv
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//------------------------------------------------------------------------
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module lpm_and ( result, data );
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// NOTE: Parameters must be declared in the same order as the Properties
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// are specified in the Cell Specification document.
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parameter lpm_width = 1;
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parameter lpm_size = 1;
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parameter lpm_type = "lpm_and";
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parameter lpm_hint = "UNUSED";
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parameter lpm_source_version = "lpm 220 version 1.6";
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input [(lpm_size * lpm_width)-1:0] data;
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output [lpm_width-1:0] result;
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reg [lpm_width-1:0] result;
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integer i, j, k;
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always @(data)
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begin
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for (i=0; i<lpm_width; i=i+1)
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begin
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result[i] = data[i];
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for (j=1; j<lpm_size; j=j+1)
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begin
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k = j * lpm_width + i;
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result[i] = result[i] & data[k];
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end
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end
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end
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// Check for previous Parameter declaration order
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initial if ((lpm_width === "lpm_and") || (lpm_type !== "lpm_and"))
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begin
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$display ("LPM 220 Version 1.6 Parameter Order changed; update instantiation");
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$finish;
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end
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endmodule // lpm_and
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//------------------------------------------------------------------------
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module lpm_or ( result, data );
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// NOTE: Parameters must be declared in the same order as the Properties
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// are specified in the Cell Specification document.
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parameter lpm_width = 1;
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parameter lpm_size = 1;
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parameter lpm_type = "lpm_or";
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parameter lpm_hint = "UNUSED";
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parameter lpm_source_version = "lpm 220 version 1.6";
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input [(lpm_size * lpm_width)-1:0] data;
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output [lpm_width-1:0] result;
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reg [lpm_width-1:0] result;
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integer i, j, k;
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always @(data)
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begin
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for (i=0; i<lpm_width; i=i+1)
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begin
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result[i] = data[i];
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for (j=1; j<lpm_size; j=j+1)
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begin
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k = j * lpm_width + i;
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result[i] = result[i] | data[k];
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end
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end
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end
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// Check for previous Parameter declaration order
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313 |
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initial if ((lpm_width === "lpm_or") || (lpm_type !== "lpm_or"))
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begin
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$display ("LPM 220 Version 1.6 Parameter Order changed; update instantiation");
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$finish;
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end
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endmodule // lpm_or
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//------------------------------------------------------------------------
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321 |
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module lpm_xor ( result, data );
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324 |
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// NOTE: Parameters must be declared in the same order as the Properties
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325 |
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// are specified in the Cell Specification document.
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326 |
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parameter lpm_width = 1;
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parameter lpm_size = 1;
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parameter lpm_type = "lpm_xor";
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329 |
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parameter lpm_hint = "UNUSED";
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330 |
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parameter lpm_source_version = "lpm 220 version 1.6";
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331 |
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input [(lpm_size * lpm_width)-1:0] data;
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output [lpm_width-1:0] result;
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334 |
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reg [lpm_width-1:0] result;
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336 |
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integer i, j, k;
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always @(data)
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begin
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for (i=0; i<lpm_width; i=i+1)
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begin
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result[i] = data[i];
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for (j=1; j<lpm_size; j=j+1)
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344 |
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begin
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345 |
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k = j * lpm_width + i;
|
346 |
|
|
result[i] = result[i] ^ data[k];
|
347 |
|
|
end
|
348 |
|
|
end
|
349 |
|
|
end
|
350 |
|
|
|
351 |
|
|
// Check for previous Parameter declaration order
|
352 |
|
|
initial if ((lpm_width === "lpm_xor") || (lpm_type !== "lpm_xor"))
|
353 |
|
|
begin
|
354 |
|
|
$display ("LPM 220 Version 1.6 Parameter Order changed; update instantiation");
|
355 |
|
|
$finish;
|
356 |
|
|
end
|
357 |
|
|
endmodule // lpm_xor
|
358 |
|
|
|
359 |
|
|
//------------------------------------------------------------------------
|
360 |
|
|
|
361 |
|
|
module lpm_bustri ( result, tridata, data, enabledt, enabletr );
|
362 |
|
|
|
363 |
|
|
// NOTE: Parameters must be declared in the same order as the Properties
|
364 |
|
|
// are specified in the Cell Specification document.
|
365 |
|
|
parameter lpm_width = 1;
|
366 |
|
|
parameter lpm_type = "lpm_bustri";
|
367 |
|
|
parameter lpm_hint = "UNUSED";
|
368 |
|
|
parameter lpm_source_version = "lpm 220 version 1.6";
|
369 |
|
|
|
370 |
|
|
input [lpm_width-1:0] data;
|
371 |
|
|
input enabledt;
|
372 |
|
|
input enabletr;
|
373 |
|
|
output [lpm_width-1:0] result;
|
374 |
|
|
inout [lpm_width-1:0] tridata;
|
375 |
|
|
|
376 |
|
|
reg [lpm_width-1:0] result;
|
377 |
|
|
reg [lpm_width-1:0] tmp_tridata;
|
378 |
|
|
|
379 |
|
|
tri0 enabledt;
|
380 |
|
|
tri0 enabletr;
|
381 |
|
|
buf (i_enabledt, enabledt);
|
382 |
|
|
buf (i_enabletr, enabletr);
|
383 |
|
|
|
384 |
|
|
always @(data or tridata or i_enabletr or i_enabledt)
|
385 |
|
|
begin
|
386 |
|
|
if (i_enabledt == 0 && i_enabletr == 1)
|
387 |
|
|
begin
|
388 |
|
|
result = tridata;
|
389 |
|
|
tmp_tridata = 'bz;
|
390 |
|
|
end
|
391 |
|
|
else if (i_enabledt == 1 && i_enabletr == 0)
|
392 |
|
|
begin
|
393 |
|
|
result = 'bz;
|
394 |
|
|
tmp_tridata = data;
|
395 |
|
|
end
|
396 |
|
|
else if (i_enabledt == 1 && i_enabletr == 1)
|
397 |
|
|
begin
|
398 |
|
|
result = data;
|
399 |
|
|
tmp_tridata = data;
|
400 |
|
|
end
|
401 |
|
|
else
|
402 |
|
|
begin
|
403 |
|
|
result = 'bz;
|
404 |
|
|
tmp_tridata = 'bz;
|
405 |
|
|
end
|
406 |
|
|
end
|
407 |
|
|
|
408 |
|
|
assign tridata = tmp_tridata;
|
409 |
|
|
|
410 |
|
|
// Check for previous Parameter declaration order
|
411 |
|
|
initial if ((lpm_width === "lpm_bustri") || (lpm_type !== "lpm_bustri"))
|
412 |
|
|
begin
|
413 |
|
|
$display ("LPM 220 Version 1.6 Parameter Order changed; update instantiation");
|
414 |
|
|
$finish;
|
415 |
|
|
end
|
416 |
|
|
endmodule // lpm_bustri
|
417 |
|
|
|
418 |
|
|
//------------------------------------------------------------------------
|
419 |
|
|
|
420 |
|
|
module lpm_mux ( result, clock, clken, data, aclr, sel );
|
421 |
|
|
|
422 |
|
|
// NOTE: Parameters must be declared in the same order as the Properties
|
423 |
|
|
// are specified in the Cell Specification document.
|
424 |
|
|
parameter lpm_width = 1;
|
425 |
|
|
parameter lpm_size = 1;
|
426 |
|
|
parameter lpm_widths = 1;
|
427 |
|
|
parameter lpm_pipeline = 0;
|
428 |
|
|
parameter lpm_type = "lpm_mux";
|
429 |
|
|
parameter lpm_hint = "UNUSED";
|
430 |
|
|
parameter lpm_source_version = "lpm 220 version 1.6";
|
431 |
|
|
|
432 |
|
|
input [(lpm_size * lpm_width)-1:0] data;
|
433 |
|
|
input aclr;
|
434 |
|
|
input clock;
|
435 |
|
|
input clken;
|
436 |
|
|
input [lpm_widths-1:0] sel;
|
437 |
|
|
output [lpm_width-1:0] result;
|
438 |
|
|
|
439 |
|
|
integer i, j, m, n;
|
440 |
|
|
reg [lpm_width-1:0] tmp_result;
|
441 |
|
|
reg [lpm_width-1:0] tmp_result2 [lpm_pipeline:0];
|
442 |
|
|
|
443 |
|
|
tri0 aclr;
|
444 |
|
|
tri0 clock;
|
445 |
|
|
tri1 clken;
|
446 |
|
|
|
447 |
|
|
buf (i_aclr, aclr);
|
448 |
|
|
buf (i_clock, clock);
|
449 |
|
|
buf (i_clken, clken);
|
450 |
|
|
|
451 |
|
|
always @(data or sel)
|
452 |
|
|
begin
|
453 |
|
|
tmp_result = 0;
|
454 |
|
|
for (m=0; m<lpm_width; m=m+1)
|
455 |
|
|
begin
|
456 |
|
|
n = sel * lpm_width + m;
|
457 |
|
|
tmp_result[m] = data[n];
|
458 |
|
|
end
|
459 |
|
|
end
|
460 |
|
|
|
461 |
|
|
always @(posedge i_clock or posedge i_aclr)
|
462 |
|
|
begin
|
463 |
|
|
if (i_aclr)
|
464 |
|
|
begin
|
465 |
|
|
for (i = 0; i <= lpm_pipeline; i = i + 1)
|
466 |
|
|
tmp_result2[i] = 'b0;
|
467 |
|
|
end
|
468 |
|
|
else if (i_clken == 1)
|
469 |
|
|
begin
|
470 |
|
|
tmp_result2[lpm_pipeline] = tmp_result;
|
471 |
|
|
for (j = 0; j < lpm_pipeline; j = j +1)
|
472 |
|
|
tmp_result2[j] = tmp_result2[j+1];
|
473 |
|
|
end
|
474 |
|
|
end
|
475 |
|
|
|
476 |
|
|
assign result = (lpm_pipeline > 0) ? tmp_result2[0] : tmp_result;
|
477 |
|
|
|
478 |
|
|
// Check for previous Parameter declaration order
|
479 |
|
|
initial if ((lpm_width === "lpm_mux") || (lpm_type !== "lpm_mux"))
|
480 |
|
|
begin
|
481 |
|
|
$display ("LPM 220 Version 1.6 Parameter Order changed; update instantiation");
|
482 |
|
|
$finish;
|
483 |
|
|
end
|
484 |
|
|
endmodule // lpm_mux
|
485 |
|
|
|
486 |
|
|
//------------------------------------------------------------------------
|
487 |
|
|
|
488 |
|
|
module lpm_decode ( eq, data, enable, clock, clken, aclr );
|
489 |
|
|
|
490 |
|
|
// NOTE: Parameters must be declared in the same order as the Properties
|
491 |
|
|
// are specified in the Cell Specification document.
|
492 |
|
|
parameter lpm_width = 1;
|
493 |
|
|
parameter lpm_decodes = 1 << lpm_width;
|
494 |
|
|
parameter lpm_pipeline = 0;
|
495 |
|
|
parameter lpm_type = "lpm_decode";
|
496 |
|
|
parameter lpm_hint = "UNUSED";
|
497 |
|
|
parameter lpm_source_version = "lpm 220 version 1.6";
|
498 |
|
|
|
499 |
|
|
input [lpm_width-1:0] data;
|
500 |
|
|
input enable;
|
501 |
|
|
input clock;
|
502 |
|
|
input clken;
|
503 |
|
|
input aclr;
|
504 |
|
|
output [lpm_decodes-1:0] eq;
|
505 |
|
|
|
506 |
|
|
reg [lpm_decodes-1:0] tmp_eq2 [lpm_pipeline:0];
|
507 |
|
|
reg [lpm_decodes-1:0] tmp_eq;
|
508 |
|
|
integer i, j;
|
509 |
|
|
|
510 |
|
|
tri0 clock;
|
511 |
|
|
tri1 clken;
|
512 |
|
|
tri0 aclr;
|
513 |
|
|
tri1 enable;
|
514 |
|
|
|
515 |
|
|
buf (i_clock, clock);
|
516 |
|
|
buf (i_clken, clken);
|
517 |
|
|
buf (i_aclr, aclr);
|
518 |
|
|
buf (i_enable, enable);
|
519 |
|
|
|
520 |
|
|
|
521 |
|
|
always @(data or i_enable)
|
522 |
|
|
begin
|
523 |
|
|
tmp_eq = 0;
|
524 |
|
|
if (i_enable)
|
525 |
|
|
begin
|
526 |
|
|
if ((data < lpm_decodes))
|
527 |
|
|
begin
|
528 |
|
|
tmp_eq[data] = 1'b1;
|
529 |
|
|
end
|
530 |
|
|
else
|
531 |
|
|
tmp_eq = 0;
|
532 |
|
|
end
|
533 |
|
|
end
|
534 |
|
|
|
535 |
|
|
always @(posedge i_clock or posedge i_aclr)
|
536 |
|
|
begin
|
537 |
|
|
if (i_aclr)
|
538 |
|
|
begin
|
539 |
|
|
for (i = 0; i <= lpm_pipeline; i = i + 1)
|
540 |
|
|
tmp_eq2[i] = 'b0;
|
541 |
|
|
end
|
542 |
|
|
else if (clken == 1)
|
543 |
|
|
begin
|
544 |
|
|
tmp_eq2[lpm_pipeline] = tmp_eq;
|
545 |
|
|
for (j = 0; j < lpm_pipeline; j = j +1)
|
546 |
|
|
tmp_eq2[j] = tmp_eq2[j+1];
|
547 |
|
|
end
|
548 |
|
|
end
|
549 |
|
|
|
550 |
|
|
assign eq = (lpm_pipeline > 0) ? tmp_eq2[0] : tmp_eq;
|
551 |
|
|
|
552 |
|
|
// Check for previous Parameter declaration order
|
553 |
|
|
initial if ((lpm_width === "lpm_decode") || (lpm_type !== "lpm_decode"))
|
554 |
|
|
begin
|
555 |
|
|
$display ("LPM 220 Version 1.6 Parameter Order changed; update instantiation");
|
556 |
|
|
$finish;
|
557 |
|
|
end
|
558 |
|
|
endmodule // lpm_decode
|
559 |
|
|
|
560 |
|
|
//------------------------------------------------------------------------
|
561 |
|
|
|
562 |
|
|
module lpm_clshift ( result, overflow, underflow, data, direction, distance );
|
563 |
|
|
|
564 |
|
|
// NOTE: Parameters must be declared in the same order as the Properties
|
565 |
|
|
// are specified in the Cell Specification document.
|
566 |
|
|
parameter lpm_width = 1;
|
567 |
|
|
parameter lpm_widthdist = 1;
|
568 |
|
|
parameter lpm_shifttype = "LOGICAL";
|
569 |
|
|
parameter lpm_type = "lpm_clshift";
|
570 |
|
|
parameter lpm_hint = "UNUSED";
|
571 |
|
|
parameter lpm_source_version = "lpm 220 version 1.6";
|
572 |
|
|
|
573 |
|
|
input [lpm_width-1:0] data;
|
574 |
|
|
input [lpm_widthdist-1:0] distance;
|
575 |
|
|
input direction;
|
576 |
|
|
output [lpm_width-1:0] result;
|
577 |
|
|
output overflow;
|
578 |
|
|
output underflow;
|
579 |
|
|
|
580 |
|
|
reg [lpm_width-1:0] ONES;
|
581 |
|
|
reg [lpm_width-1:0] result;
|
582 |
|
|
reg overflow, underflow;
|
583 |
|
|
integer i;
|
584 |
|
|
|
585 |
|
|
tri0 direction;
|
586 |
|
|
|
587 |
|
|
buf (i_direction, direction);
|
588 |
|
|
|
589 |
|
|
//---------------------------------------------------------------//
|
590 |
|
|
function [lpm_width+1:0] LogicShift;
|
591 |
|
|
input [lpm_width-1:0] data;
|
592 |
|
|
input [lpm_widthdist-1:0] dist;
|
593 |
|
|
input direction;
|
594 |
|
|
reg [lpm_width-1:0] tmp_buf;
|
595 |
|
|
reg overflow, underflow;
|
596 |
|
|
|
597 |
|
|
begin
|
598 |
|
|
tmp_buf = data;
|
599 |
|
|
overflow = 1'b0;
|
600 |
|
|
underflow = 1'b0;
|
601 |
|
|
if ((direction) && (dist > 0)) // shift right
|
602 |
|
|
begin
|
603 |
|
|
tmp_buf = data >> dist;
|
604 |
|
|
if ((data != 0) && ((dist >= lpm_width) || (tmp_buf == 0)))
|
605 |
|
|
underflow = 1'b1;
|
606 |
|
|
end
|
607 |
|
|
else if (dist > 0) // shift left
|
608 |
|
|
begin
|
609 |
|
|
tmp_buf = data << dist;
|
610 |
|
|
if ((data != 0) && ((dist >= lpm_width)
|
611 |
|
|
|| ((data >> (lpm_width-dist)) != 0)))
|
612 |
|
|
overflow = 1'b1;
|
613 |
|
|
end
|
614 |
|
|
LogicShift = {overflow,underflow,tmp_buf[lpm_width-1:0]};
|
615 |
|
|
end
|
616 |
|
|
endfunction
|
617 |
|
|
|
618 |
|
|
//---------------------------------------------------------------//
|
619 |
|
|
function [lpm_width+1:0] ArithShift;
|
620 |
|
|
input [lpm_width-1:0] data;
|
621 |
|
|
input [lpm_widthdist-1:0] dist;
|
622 |
|
|
input direction;
|
623 |
|
|
reg [lpm_width-1:0] tmp_buf;
|
624 |
|
|
reg overflow, underflow;
|
625 |
|
|
|
626 |
|
|
begin
|
627 |
|
|
tmp_buf = data;
|
628 |
|
|
overflow = 1'b0;
|
629 |
|
|
underflow = 1'b0;
|
630 |
|
|
|
631 |
|
|
if (direction && (dist > 0)) // shift right
|
632 |
|
|
begin
|
633 |
|
|
if (data[lpm_width-1] == 0) // positive number
|
634 |
|
|
begin
|
635 |
|
|
tmp_buf = data >> dist;
|
636 |
|
|
if ((data != 0) && ((dist >= lpm_width) || (tmp_buf == 0)))
|
637 |
|
|
underflow = 1'b1;
|
638 |
|
|
end
|
639 |
|
|
else // negative number
|
640 |
|
|
begin
|
641 |
|
|
tmp_buf = (data >> dist) | (ONES << (lpm_width - dist));
|
642 |
|
|
if ((data != ONES) && ((dist >= lpm_width-1) || (tmp_buf == ONES)))
|
643 |
|
|
underflow = 1'b1;
|
644 |
|
|
end
|
645 |
|
|
end
|
646 |
|
|
else if (dist > 0) // shift left
|
647 |
|
|
begin
|
648 |
|
|
tmp_buf = data << dist;
|
649 |
|
|
if (data[lpm_width-1] == 0) // positive number
|
650 |
|
|
begin
|
651 |
|
|
if ((data != 0) && ((dist >= lpm_width-1)
|
652 |
|
|
|| ((data >> (lpm_width-dist-1)) != 0)))
|
653 |
|
|
overflow = 1'b1;
|
654 |
|
|
end
|
655 |
|
|
else // negative number
|
656 |
|
|
begin
|
657 |
|
|
if ((data != ONES) && ((dist >= lpm_width)
|
658 |
|
|
|| (((data >> (lpm_width-dist-1))|(ONES << (dist+1))) != ONES)))
|
659 |
|
|
overflow = 1'b1;
|
660 |
|
|
end
|
661 |
|
|
end
|
662 |
|
|
ArithShift = {overflow,underflow,tmp_buf[lpm_width-1:0]};
|
663 |
|
|
end
|
664 |
|
|
endfunction
|
665 |
|
|
|
666 |
|
|
//---------------------------------------------------------------//
|
667 |
|
|
function [lpm_width-1:0] RotateShift;
|
668 |
|
|
input [lpm_width-1:0] data;
|
669 |
|
|
input [lpm_widthdist-1:0] dist;
|
670 |
|
|
input direction;
|
671 |
|
|
reg [lpm_width-1:0] tmp_buf;
|
672 |
|
|
|
673 |
|
|
begin
|
674 |
|
|
tmp_buf = data;
|
675 |
|
|
if ((direction) && (dist > 0)) // shift right
|
676 |
|
|
begin
|
677 |
|
|
tmp_buf = (data >> dist) | (data << (lpm_width - dist));
|
678 |
|
|
end
|
679 |
|
|
else if (dist > 0) // shift left
|
680 |
|
|
begin
|
681 |
|
|
tmp_buf = (data << dist) | (data >> (lpm_width - dist));
|
682 |
|
|
end
|
683 |
|
|
RotateShift = tmp_buf[lpm_width-1:0];
|
684 |
|
|
end
|
685 |
|
|
endfunction
|
686 |
|
|
//---------------------------------------------------------------//
|
687 |
|
|
|
688 |
|
|
initial
|
689 |
|
|
begin
|
690 |
|
|
for (i=0; i < lpm_width; i=i+1)
|
691 |
|
|
ONES[i] = 1'b1;
|
692 |
|
|
end
|
693 |
|
|
|
694 |
|
|
always @(data or i_direction or distance)
|
695 |
|
|
begin
|
696 |
|
|
// lpm_shifttype is optional and default to LOGICAL
|
697 |
|
|
if ((lpm_shifttype == "LOGICAL"))
|
698 |
|
|
begin
|
699 |
|
|
{overflow,underflow,result} = LogicShift(data,distance,i_direction);
|
700 |
|
|
end
|
701 |
|
|
else if (lpm_shifttype == "ARITHMETIC")
|
702 |
|
|
begin
|
703 |
|
|
{overflow,underflow,result} = ArithShift(data,distance,i_direction);
|
704 |
|
|
end
|
705 |
|
|
else if (lpm_shifttype == "ROTATE")
|
706 |
|
|
begin
|
707 |
|
|
result = RotateShift(data, distance, i_direction);
|
708 |
|
|
overflow = 1'b0;
|
709 |
|
|
underflow = 1'b0;
|
710 |
|
|
end
|
711 |
|
|
else
|
712 |
|
|
begin
|
713 |
|
|
result = 'bx;
|
714 |
|
|
overflow = 1'b0;
|
715 |
|
|
underflow = 1'b0;
|
716 |
|
|
end
|
717 |
|
|
end
|
718 |
|
|
|
719 |
|
|
// Check for previous Parameter declaration order
|
720 |
|
|
initial if ((lpm_width === "lpm_clshift") || (lpm_type !== "lpm_clshift"))
|
721 |
|
|
begin
|
722 |
|
|
$display ("LPM 220 Version 1.6 Parameter Order changed; update instantiation");
|
723 |
|
|
$finish;
|
724 |
|
|
end
|
725 |
|
|
endmodule // lpm_clshift
|