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[/] [common/] [trunk/] [LPM_readme.txt] - Blame information for rev 48

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1 14 bbeaver
// These LPM files were retrieved from
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//    http://www.edif.org/lpmweb/
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//
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// They are based on the Library of Parameterized Modules, which is
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//   advocated for and supported by Altera.
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//
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// These files are based on the Version 1.5 LPM source.  The documentation
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//   corresponding to this source is titled "LPM 2 2 0" in the documentation.
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//
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// The files of interest are:
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//   220_cells_specification.pdf:  The specifications for each module.
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//   220_edif-1_usage.pdf:         EDIF instantiation notes.
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//   220_verilog_usage.pdf:        Verilog instantiation notes.
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//   220_vhdl_usage.pdf:           VHDL instantiation notes.
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//   220_vhdl_declarations.vhd:    VHDL source which might be module declarations.
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//   220_vhdl_models.vhd:          VHDL source for the LPM library version "2 2 0".
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//   220_verilog_models.v:         Original Verilog sources for LPM library "2 2 0".
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//   220_count4_example.vhd:       Example of a counter instantiation in VHDL.
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//   220_count4_example.v:         Example of a counter instantiation in verilog.
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//   220_convert_hex2ver_pli.c:    PLI cource to initialize storage elements in verilog.
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//
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// The 220_verilog_models.v file is broken into parts to make it easier to use.
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// Example module instantiations for the verilog modules are included in
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//   these modules.
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//
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//   LPM_gates.v:                  Simple gates in verilog.
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//   LPM_arithmetic.v:             Arithmetic elements in verilog.
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//   LPM_storage.v:                Storage elements in verilog.
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//   LPM_pads.v:                   IO pads in verilog.
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