OpenCores
URL https://opencores.org/ocsvn/connect-6/connect-6/trunk

Subversion Repositories connect-6

[/] [connect-6/] [trunk/] [BUILD_SCC/] [DE2/] [RS232_Controller.v] - Blame information for rev 17

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 4 sumanta.ch
module RS232_Controller(oDATA,iDATA,oTxD,oTxD_Busy,iTxD_Start,
2
                                                iRxD,oRxD_Ready,oRxD_ERROR,oRxD_idle,iCLK,RST_n);
3
input [7:0] iDATA;
4
input iTxD_Start,iRxD,iCLK,RST_n;
5
output [7:0] oDATA;
6
output oTxD,oTxD_Busy,oRxD_Ready,oRxD_ERROR,oRxD_idle;
7
 
8
async_receiver          u0      (       /*.RST_n(RST_n),*/.clk(iCLK), .RxD(iRxD),
9
                                                        .RxD_data_ready(oRxD_Ready),/*.RxD_data_error(oRxD_ERROR),*/
10
                                                        .RxD_data(oDATA),.RxD_idle(oRxD_idle));
11
//serie                                 u0      (       .n_reset(RST_n),.clk(iCLK), .rx_in(iRxD),
12
//                                                      .d_rdy(oRxD_Ready),.d_err(oRxD_ERROR),
13
//                                                      .rx_data(oDATA));
14
async_transmitter       u1      (       /*.RST_n(RST_n),*/.clk(iCLK), .TxD_start(iTxD_Start),
15
                                                        .TxD_data(iDATA), .TxD(oTxD),
16
                                                        .TxD_busy(oTxD_Busy));
17
 
18
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.