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URL https://opencores.org/ocsvn/connect-6/connect-6/trunk

Subversion Repositories connect-6

[/] [connect-6/] [trunk/] [BUILD_SCC/] [scc_scripts/] [run_imp_marks.tcl] - Blame information for rev 7

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Line No. Rev Author Line
1 4 sumanta.ch
set_project_params -directory ./
2
set_project_params -results myboard.txt
3 7 sumanta.ch
set_project_params -sources "synth_src/connect6.cpp synth_src/connect6_synth.cpp synth_src/main.cpp synth_src/q.cpp synth_src/state.cpp synth_src/threats.cpp synth_src/util.cpp"
4
set_project_params -headers "synth_src/connect6.h synth_src/connect6_synth.h synth_src/q.hpp synth_src/shared.h synth_src/threats.h synth_src/util.h"
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set_project_params -cache_result_files no
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set_project_params -cache_data_files yes
7 4 sumanta.ch
 
8
if [file exists imp_marks] { delete_implementation imp_marks }
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create_implementation imp_marks
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set_implementation_params -systemc_source no
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set_implementation_params -memory_return_path_external_delay 0%
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set_implementation_params -memory_forward_path_external_delay 0%
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set_implementation_params -instream_forward_path_external_delay 0%
15 7 sumanta.ch
set_implementation_params -sccompiler_args "-DDONT_VERIFY_PPAID -g -g -g -g"
16 4 sumanta.ch
set_implementation_params -outstream_return_path_external_delay 0%
17 7 sumanta.ch
set_implementation_params -appfiles "synth_src/state.cpp synth_src/threats.cpp"
18 4 sumanta.ch
set_implementation_params -proc ai_marks
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set_implementation_params -memory_forward_boundary_register infer
20 7 sumanta.ch
set_implementation_params -cppcompiler_args "-g -DPICO_SYNTH -fpermissive"
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set_implementation_params -techlib altera-cyclone4gx
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set_implementation_params -device ep4cgx110c-fc23-7
23 4 sumanta.ch
set_implementation_params -memory_return_boundary_register infer
24
set_implementation_params -cexec_args "-port /dev/ttyS0 -player L"
25 7 sumanta.ch
set_implementation_params -host_memory_access never
26
set_implementation_params -init_data_registers yes
27 4 sumanta.ch
set_implementation_params -outstream_forward_path_external_delay 0%
28
set_implementation_params -build_tcab yes
29
set_implementation_params -reset_data_registers yes
30 7 sumanta.ch
set_implementation_params -task_overlap 0
31 4 sumanta.ch
set_implementation_params -instream_return_path_external_delay 0%
32 7 sumanta.ch
set_implementation_params -simulator modelsim
33 4 sumanta.ch
set_implementation_params -clock_freq 100
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37 7 sumanta.ch
set_loop_params -ii 3
38 4 sumanta.ch
 
39 7 sumanta.ch
csim  -golden  -cppcompiler_args "-g -DPICO_SYNTH -fpermissive" -cexec_args "-port /dev/ttyS0 -player L"
40 4 sumanta.ch
preprocess
41 7 sumanta.ch
csim  -preprocess  -cppcompiler_args "-g -DPICO_SYNTH -fpermissive" -cexec_args "-port /dev/ttyS0 -player L"
42 4 sumanta.ch
schedule
43 7 sumanta.ch
csim  -schedule  -cppcompiler_args "-g -DPICO_SYNTH -fpermissive" -cexec_args "-port /dev/ttyS0 -player L"
44 4 sumanta.ch
synthesize
45
create_rtl_package
46
 

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