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[/] [connect-6/] [trunk/] [XILINX/] [BUILD_SCC/] [SP6/] [SEG7_LUT.v] - Blame information for rev 17

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1 17 sumanta.ch
module SEG7_LUT (       oSEG,iDIG       );
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input   [3:0]    iDIG;
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output  [6:0]    oSEG;
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reg             [6:0]    oSEG;
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always @(iDIG)
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begin
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                case(iDIG)
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                4'h1: oSEG = 7'b1111001;        // ---t----
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                4'h2: oSEG = 7'b0100100;        // |      |
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                4'h3: oSEG = 7'b0110000;        // lt    rt
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                4'h4: oSEG = 7'b0011001;        // |      |
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                4'h5: oSEG = 7'b0010010;        // ---m----
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                4'h6: oSEG = 7'b0000010;        // |      |
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                4'h7: oSEG = 7'b1111000;        // lb    rb
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                4'h8: oSEG = 7'b0000000;        // |      |
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                4'h9: oSEG = 7'b0011000;        // ---b----
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                4'ha: oSEG = 7'b0001000;
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                4'hb: oSEG = 7'b0000011;
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                4'hc: oSEG = 7'b1000110;
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                4'hd: oSEG = 7'b0100001;
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                4'he: oSEG = 7'b0000110;
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                4'hf: oSEG = 7'b0001110;
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                4'h0: oSEG = 7'b1000000;
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                endcase
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end
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endmodule

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