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https://opencores.org/ocsvn/connect-6/connect-6/trunk
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sumanta.ch |
#!/bin/sh
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run_logic_synthesis_only=0;
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while getopts ":s i" options; do
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case $options in
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i ) run_logic_synthesis_only=0;;
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s ) run_logic_synthesis_only=1;;
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? ) echo $usage
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exit 1;;
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esac
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done
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export date_of_run=`date +%Y.%m.%d_%H.%M.%S`
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mkdir run_$date_of_run
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rm -f run
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ln -s run_$date_of_run run
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mkdir run/synthesis
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if [ $run_logic_synthesis_only -eq 1 ] ; then
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touch run/synthesis/.LOGIC_SYNTHESIS_ONLY
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fi
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synplify_premier_dp -batch synplify.tcl
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if [[ $? != 0 ]]; then exit 1; fi
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if [ $run_logic_synthesis_only -ne 1 ] ; then
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mkdir run/implementation
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cd run/implementation
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ngdbuild -uc ../../SP6.ucf -sd ../../../../coregen/ip_rtl/ -dd _ngo -nt timestamp -p xc6slx45t-fgg484-3 ../synthesis/DE2.edf DE2.ngd
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if [[ $? != 0 ]]; then exit 1; fi
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map -u -timing -p xc6slx45t-fgg484-3 -ol high -pr b -detail -o DE2_map.ncd DE2.ngd DE2.pcf
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if [[ $? != 0 ]]; then exit 1; fi
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par -ol high -w -nopad DE2_map.ncd DE2.ncd DE2.pcf
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if [[ $? != 0 ]]; then exit 1; fi
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trce -v 20 -u 64 -o DE2.twr DE2.ncd DE2.pcf
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if [[ $? != 0 ]]; then exit 1; fi
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bitgen -intstyle xflow -w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g Reset_on_err:No -g ConfigRate:2 -g ProgPin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g ExtMasterCclk_en:No -g SPI_buswidth:1 -g TIMER_CFG:0xFFFF -g multipin_wakeup:No -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:Yes -g DriveDone:No -g en_sw_gsr:No -g drive_awake:No -g sw_clk:Startupclk -g sw_gwe_cycle:5 -g sw_gts_cycle:4 DE2.ncd -g INIT_9K:yes
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#if [[ $? != 0 ]]; then exit 1; fi
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#setMode -bs
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#setCable -port auto
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#Identify -inferir
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#identifyMPM
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#assignFile -p 2 -file"/tmp/BUILD_SCC/imp_connect/rtl_package/synth/synplify_fpga/run/implementation/DE2.bit"
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#Program -p 2
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if [[ $? != 0 ]]; then exit 1; fi
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cd -
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fi
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exit 0
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