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[/] [copyblaze/] [trunk/] [copyblaze/] [rtl/] [vhdl/] [cpu/] [cp_Usefull_Pkg.vhd] - Blame information for rev 57

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1 2 ameziti
--------------------------------------------------------------------------------
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-- Company: 
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--
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-- File: cp_Usefull_Pkg.vhd
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--
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-- Description:
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--      projet copyBlaze
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--      Package utilisé pour le projet
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--
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-- File history:
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-- v1.0: 31/08/11: Creation
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-- v1.1: 20/11/11: Ajout de la fréquence low (10Mhz)
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-- v1.2: 27/11/11: Ajout des fonctions OR_Func, AND_Func
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--
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-- Targeted device: ProAsic A3P250 VQFP100
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-- Author: AbdAllah Meziti
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--------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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--------------------------------------------------------------------------------
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-- Package: Usefull_Pkg
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--------------------------------------------------------------------------------
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package Usefull_Pkg is
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        --- frequence of the fpga core
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        constant FREQ                           : real          := 40.0e6;
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        constant FREQ_LOW                       : real          := 10.0e6;
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        --- find minimum number of bits required to
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        --- represent N as an unsigned binary number
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        function log2_ceil(N: natural) return positive;
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        function log2(A: integer) return integer;
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        -- OR sur tout les bits d'un vecteur
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        function OR_Func (x : std_ulogic_vector) return std_ulogic;
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        -- AND sur tout les bits d'un vecteur
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        function AND_Func (x : std_ulogic_vector) return std_ulogic;
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        function ODD_Func (x : std_ulogic_vector) return std_ulogic;
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end;
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--------------------------------------------------------------------------------
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-- Body: Usefull_Pkg
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--------------------------------------------------------------------------------
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package body Usefull_Pkg is
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        --- find minimum number of bits required to
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        --- represent N as an unsigned binary number
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        function log2_ceil(N: natural) return positive is
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        begin
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                if N < 2 then
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                        return 1;
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                else
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                        return 1 + log2_ceil(N/2);
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                end if;
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        end;
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--      function log2_ceil(N : integer) return integer is
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--      begin
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--              if (N <= 2) then
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--                      return 1;
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--              else
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--                      if (N mod 2 = 0) then
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--                              return 1 + log2_ceil(N/2);
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--                      else
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--                              return 1 + log2_ceil((N+1)/2);
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--                      end if;
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--              end if;
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--      end function log2_ceil;
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--      function log2_ceil (constant x : natural) return positive is
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--      
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--              variable v_tmp : natural := x;
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--              variable v_ret : natural := 0;
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--              variable v_line : integer;
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--      
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--      begin -- function log2
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--      
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--              while (v_tmp > 0) loop
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--                      v_tmp := v_tmp / 2;
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--                      v_ret := v_ret + 1;
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--              end loop;
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--
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--              v_line := v_ret;
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--              report "value: " & integer'image(v_line);
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--              return v_ret;
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--      end function log2_ceil;
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        function log2(A: integer) return integer is
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        begin
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                for I in 1 to 30 loop  -- Works for up to 32 bit integers
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                        if(2**I > A) then return(I-1);  end if;
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                end loop;
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                return(30);
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        end;
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        -- OR sur tout les bits d'un vecteur
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        function OR_Func (x : std_ulogic_vector) return std_ulogic is
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                variable tmp : std_ulogic := '0';
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        begin
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                for j in x'range loop
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                        tmp := tmp or x(j);
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                end loop;
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        return tmp;
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        end OR_Func;
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        -- AND sur tout les bits d'un vecteur
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        function AND_Func (x : std_ulogic_vector) return std_ulogic is
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                variable tmp : std_ulogic := '1';
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        begin
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                for j in x'range loop
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                        tmp := tmp and x(j);
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                end loop;
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        return tmp;
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        end AND_Func;
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        function ODD_Func (x : std_ulogic_vector) return std_ulogic is
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                variable tmp : std_ulogic := '0';
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        begin
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                for j in x'range loop
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                        tmp := tmp xor x(j);
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                end loop;
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        return tmp;
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        end ODD_Func;
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end package body;

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