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[/] [copyblaze/] [trunk/] [copyblaze/] [sim/] [rtl_sim/] [bin/] [wave_WISHBONE.do] - Blame information for rev 33

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Line No. Rev Author Line
1 2 ameziti
add wave -noupdate -divider {WISHBONE}
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add wave -noupdate -format Logic        -label {WISHBONE reset}                         -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/Rst_i_n
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add wave -noupdate -format Logic        -label {WISHBONE clk}                           -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/Clk_i
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add wave -noupdate -format Logic        -label {WISHBONE Phase1}                        -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/iPhase1
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add wave -noupdate -format Logic        -label {WISHBONE Phase2}                        -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/iPhase2
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add wave -noupdate -format Logic        -label {WISHBONE InstReadSing}          -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/iWbRdSing
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add wave -noupdate -format Logic        -label {WISHBONE InstWriteSing}         -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/iWbWrSing
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add wave -noupdate -format Logic        -label {WISHBONE ACK_I}                         -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/iwbACK_I
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add wave -noupdate -format Logic        -label {WISHBONE validHandshake}        -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/iWB_vHs
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add wave -noupdate -format Logic        -label {WISHBONE CYC}                           -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/iwbCYC
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add wave -noupdate -format Logic        -label {WISHBONE validPC}                       -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/iWB_vPC
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add wave -noupdate -format Logic        -label {WISHBONE validOperation}        -radix hexadecimal /tb_copyBlaze_ecoSystem/uut/processor/iWB_vOp

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