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Subversion Repositories copyblaze

[/] [copyblaze/] [trunk/] [copyblaze/] [sw/] [code/] [pBlaze/] [wb_timer/] [wb_timer.asm] - Blame information for rev 32

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; project       : copyBlaze 8 bit processor
; file name     : wb_timer.asm
; author        : abdAllah Meziti
; licence       : LGPL
 
; this programm test the wishbone copyBlaze instruction.
; it use this module :
;                       wb_timer_08.vhd
 
                WB_TIMER_TRC0           .EQU    0x00
                WB_TIMER_COMPARE0       .EQU    0x04
                WB_TIMER_COUNTER0       .EQU    0x08
                WB_TIMER_TRC1           .EQU    0x0C
                WB_TIMER_COMPARE1       .EQU    0x10
                WB_TIMER_COUNTER1       .EQU    0x14
 
                wb_data_to_wb           .EQU   s0
                wb_data_from_wb         .EQU   s1
 
                ;
 
                ; ==========================================================
start:
                ; ==========================================================
                EINT                          ; ENABLE INTERRUPT
;               DINT                          ; DISABLE INTERRUPT
 
                LOAD            wb_data_to_wb,          0x80                            ;
                WBWRSING        wb_data_to_wb,          WB_TIMER_COMPARE0       ; COMPARE0 = 0x80
 
                LOAD            wb_data_to_wb,          0x0e                            ;
                WBWRSING        wb_data_to_wb,          WB_TIMER_TRC0           ; TRC0 = 0x0e : en0=1, ar0=1, irq0en=1
 
end:
                JUMP    end
                ;
 
;       *************************
;       Interrupt Service Routine
;       *************************
ISR:
                WBRDSING        wb_data_from_wb,        WB_TIMER_TRC0           ; access on TCR0 (reset trig0)
 
                RETI      ENABLE              ; RETURNI
;               RETI      DISABLE
;       *************************
;       End ISR Interrupt Handler
;       *************************
 
                .ORG    0x3FF
VECTOR:
                JUMP    ISR

Line No.	Rev	Author	Line
1	30	ameziti	`; project : copyBlaze 8 bit processor`
2			`; file name : wb_timer.asm`
3			`; author : abdAllah Meziti`
4			`; licence : LGPL`
5
6			`; this programm test the wishbone copyBlaze instruction.`
7			`; it use this module :`
8			`; wb_timer_08.vhd`
9
10	32	ameziti	`WB_TIMER_TRC0 .EQU 0x00`
11			`WB_TIMER_COMPARE0 .EQU 0x04`
12			`WB_TIMER_COUNTER0 .EQU 0x08`
13			`WB_TIMER_TRC1 .EQU 0x0C`
14			`WB_TIMER_COMPARE1 .EQU 0x10`
15			`WB_TIMER_COUNTER1 .EQU 0x14`
16
17			`wb_data_to_wb .EQU s0`
18			`wb_data_from_wb .EQU s1`
19
20	30	ameziti	`;`
21
22			`; ==========================================================`
23			`start:`
24			`; ==========================================================`
25	32	ameziti	`EINT ; ENABLE INTERRUPT`
26			`; DINT ; DISABLE INTERRUPT`
27	30	ameziti
28	32	ameziti	`LOAD wb_data_to_wb, 0x80 ;`
29			`WBWRSING wb_data_to_wb, WB_TIMER_COMPARE0 ; COMPARE0 = 0x80`
30	30	ameziti
31	32	ameziti	`LOAD wb_data_to_wb, 0x0e ;`
32			`WBWRSING wb_data_to_wb, WB_TIMER_TRC0 ; TRC0 = 0x0e : en0=1, ar0=1, irq0en=1`
33
34	30	ameziti	`end:`
35			`JUMP end`
36			`;`
37	32	ameziti
38			`; *************************`
39			`; Interrupt Service Routine`
40			`; *************************`
41			`ISR:`
42			`WBRDSING wb_data_from_wb, WB_TIMER_TRC0 ; access on TCR0 (reset trig0)`
43
44			`RETI ENABLE ; RETURNI`
45			`; RETI DISABLE`
46			`; *************************`
47			`; End ISR Interrupt Handler`
48			`; *************************`
49
50			`.ORG 0x3FF`
51			`VECTOR:`
52			`JUMP ISR`

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[/] [copyblaze/] [trunk/] [copyblaze/] [sw/] [code/] [pBlaze/] [wb_timer/] [wb_timer.asm] - Blame information for rev 32