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[/] [copyblaze/] [trunk/] [copyblaze/] [sw/] [code/] [pBlaze/] [wb_timer/] [wb_timer.asm] - Blame information for rev 52

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; project       : copyBlaze 8 bit processor
; file name     : wb_timer.asm
; author        : abdAllah Meziti
; licence       : LGPL
 
; this programm test the wishbone copyBlaze instruction.
; it use this module :
;                       wb_timer_08.vhd
 
                WB_TIMER_TRC0           .EQU    0x00
                WB_TIMER_COMPARE0       .EQU    0x04
                WB_TIMER_COUNTER0       .EQU    0x08
                WB_TIMER_TRC1           .EQU    0x0C
                WB_TIMER_COMPARE1       .EQU    0x10
                WB_TIMER_COUNTER1       .EQU    0x14
 
                wb_data_to_wb           .EQU   s0
                wb_data_from_wb         .EQU   s1
 
                ;
 
                ; ==========================================================
start:
                ; ==========================================================
                ; enable interrupts
                EINT                          ; ENABLE INTERRUPT
                ;DINT                          ; DISABLE INTERRUPT
 
                ; initialize the wb_timer registers
                LOAD            wb_data_to_wb,          0x80                            ;
                WBWRSING        wb_data_to_wb,          WB_TIMER_COMPARE0       ; COMPARE0 = 0x80
 
                LOAD            wb_data_to_wb,          0x0e                            ;
                WBWRSING        wb_data_to_wb,          WB_TIMER_TRC0           ; TRC0 = 0x0e : en0=1, ar0=1, irq0en=1
 
 
                ; normale operations
                load    s0,     0x00
                call    FuncLoadAllRegister
 
loopMain:
                call    FuncIncrAllRegister
                JUMP    loopMain
 
end:
                JUMP    end
                ;
 
; ****************************************
; Load All the register with the s0 value.
; ****************************************
FuncLoadAllRegister:
;               LOAD      s0, s0                ;       s0=s0
                LOAD      s1, s0                ;       s1=s0
                LOAD      s2, s0                ;       s2=s0
                LOAD      s3, s0                ;       s3=s0
                LOAD      s4, s0                ;       s4=s0
                LOAD      s5, s0                ;       s5=s0
                LOAD      s6, s0                ;       s6=s0
                LOAD      s7, s0                ;       s7=s0
                LOAD      s8, s0                ;       s8=s0
                LOAD      s9, s0                ;       s9=s0
                LOAD      sA, s0                ;       sA=s0
                LOAD      sB, s0                ;       sB=s0
                LOAD      sC, s0                ;       sC=s0
                LOAD      sD, s0                ;       sD=s0
                LOAD      sE, s0                ;       sE=s0
                LOAD      sF, s0                ;       sF=s0
                ret
; ****************************************
; Decrement All the register by 1.
; ****************************************
FuncIncrAllRegister:
;               ADD      s0, 0x01               ;       s0++
;               ADD      s1, 0x01               ;       s1++
                ADD      s2, 0x01               ;       s2++
                ADD      s3, 0x01               ;       s3++
                ADD      s4, 0x01               ;       s4++
                ADD      s5, 0x01               ;       s5++
                ADD      s6, 0x01               ;       s6++
                ADD      s7, 0x01               ;       s7++
                ADD      s8, 0x01               ;       s8++
                ADD      s9, 0x01               ;       s9++
                ADD      sA, 0x01               ;       sA++
                ADD      sB, 0x01               ;       sB++
                ADD      sC, 0x01               ;       sC++
                ADD      sD, 0x01               ;       sD++
                ADD      sE, 0x01               ;       sE++
                ADD      sF, 0x01               ;       sF++
                ret
 
;       *************************
;       Interrupt Service Routine
;       *************************
ISR:
                WBRDSING        wb_data_from_wb,        WB_TIMER_TRC0           ; access on TCR0 (reset trig0)
                ;LOAD      s1, 0x55
 
                RETI      ENABLE              ; RETURNI
;               RETI      DISABLE
;       *************************
;       End ISR Interrupt Handler
;       *************************
 
                .ORG    0x3FF
VECTOR:
                JUMP    ISR

Line No.	Rev	Author	Line
1	30	ameziti	`; project : copyBlaze 8 bit processor`
2			`; file name : wb_timer.asm`
3			`; author : abdAllah Meziti`
4			`; licence : LGPL`
5
6			`; this programm test the wishbone copyBlaze instruction.`
7			`; it use this module :`
8			`; wb_timer_08.vhd`
9
10	32	ameziti	`WB_TIMER_TRC0 .EQU 0x00`
11			`WB_TIMER_COMPARE0 .EQU 0x04`
12			`WB_TIMER_COUNTER0 .EQU 0x08`
13			`WB_TIMER_TRC1 .EQU 0x0C`
14			`WB_TIMER_COMPARE1 .EQU 0x10`
15			`WB_TIMER_COUNTER1 .EQU 0x14`
16
17			`wb_data_to_wb .EQU s0`
18			`wb_data_from_wb .EQU s1`
19
20	30	ameziti	`;`
21
22			`; ==========================================================`
23			`start:`
24			`; ==========================================================`
25	36	ameziti	`; enable interrupts`
26	32	ameziti	`EINT ; ENABLE INTERRUPT`
27	36	ameziti	`;DINT ; DISABLE INTERRUPT`
28	30	ameziti
29	36	ameziti	`; initialize the wb_timer registers`
30	32	ameziti	`LOAD wb_data_to_wb, 0x80 ;`
31			`WBWRSING wb_data_to_wb, WB_TIMER_COMPARE0 ; COMPARE0 = 0x80`
32	30	ameziti
33	32	ameziti	`LOAD wb_data_to_wb, 0x0e ;`
34			`WBWRSING wb_data_to_wb, WB_TIMER_TRC0 ; TRC0 = 0x0e : en0=1, ar0=1, irq0en=1`
35
36	36	ameziti
37			`; normale operations`
38			`load s0, 0x00`
39			`call FuncLoadAllRegister`
40
41			`loopMain:`
42			`call FuncIncrAllRegister`
43			`JUMP loopMain`
44
45	30	ameziti	`end:`
46			`JUMP end`
47			`;`
48	32	ameziti
49	36	ameziti	`; ****************************************`
50			`; Load All the register with the s0 value.`
51			`; ****************************************`
52			`FuncLoadAllRegister:`
53			`; LOAD s0, s0 ; s0=s0`
54			`LOAD s1, s0 ; s1=s0`
55			`LOAD s2, s0 ; s2=s0`
56			`LOAD s3, s0 ; s3=s0`
57			`LOAD s4, s0 ; s4=s0`
58			`LOAD s5, s0 ; s5=s0`
59			`LOAD s6, s0 ; s6=s0`
60			`LOAD s7, s0 ; s7=s0`
61			`LOAD s8, s0 ; s8=s0`
62			`LOAD s9, s0 ; s9=s0`
63			`LOAD sA, s0 ; sA=s0`
64			`LOAD sB, s0 ; sB=s0`
65			`LOAD sC, s0 ; sC=s0`
66			`LOAD sD, s0 ; sD=s0`
67			`LOAD sE, s0 ; sE=s0`
68			`LOAD sF, s0 ; sF=s0`
69			`ret`
70			`; ****************************************`
71			`; Decrement All the register by 1.`
72			`; ****************************************`
73			`FuncIncrAllRegister:`
74			`; ADD s0, 0x01 ; s0++`
75			`; ADD s1, 0x01 ; s1++`
76			`ADD s2, 0x01 ; s2++`
77			`ADD s3, 0x01 ; s3++`
78			`ADD s4, 0x01 ; s4++`
79			`ADD s5, 0x01 ; s5++`
80			`ADD s6, 0x01 ; s6++`
81			`ADD s7, 0x01 ; s7++`
82			`ADD s8, 0x01 ; s8++`
83			`ADD s9, 0x01 ; s9++`
84			`ADD sA, 0x01 ; sA++`
85			`ADD sB, 0x01 ; sB++`
86			`ADD sC, 0x01 ; sC++`
87			`ADD sD, 0x01 ; sD++`
88			`ADD sE, 0x01 ; sE++`
89			`ADD sF, 0x01 ; sF++`
90			`ret`
91
92	32	ameziti	`; *************************`
93			`; Interrupt Service Routine`
94			`; *************************`
95			`ISR:`
96			`WBRDSING wb_data_from_wb, WB_TIMER_TRC0 ; access on TCR0 (reset trig0)`
97	36	ameziti	`;LOAD s1, 0x55`
98
99	32	ameziti	`RETI ENABLE ; RETURNI`
100			`; RETI DISABLE`
101			`; *************************`
102			`; End ISR Interrupt Handler`
103			`; *************************`
104
105			`.ORG 0x3FF`
106			`VECTOR:`
107			`JUMP ISR`

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[/] [copyblaze/] [trunk/] [copyblaze/] [sw/] [code/] [pBlaze/] [wb_timer/] [wb_timer.asm] - Blame information for rev 52