URL https://opencores.org/ocsvn/copyblaze/copyblaze/trunk

Subversion Repositories copyblaze

[/] [copyblaze/] [trunk/] [copyblaze/] [sw/] [code/] [pBlaze/] [wb_uart/] [wb_uart.asm] - Blame information for rev 43

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; project       : copyBlaze 8 bit processor
; file name     : wb_uart.asm
; author        : abdAllah Meziti
; licence       : LGPL
 
; this programm test the wishbone copyBlaze instruction.
; it use this module :
;                       wb_uart_08.vhd
 
                WB_UART_STATUS          .EQU    0x00
                WB_UART_DIV_LOW         .EQU    0x04
                WB_UART_DIV_HIGH        .EQU    0x05
                WB_UART_DATA            .EQU    0x08
 
                wb_data_to_wb           .EQU   s0
                wb_data_from_wb         .EQU   s1
                ;
 
                ; ==========================================================
start:
                ; ==========================================================
 
                ; initialize the wb_uart registers
                LOAD            wb_data_to_wb,          0x02                            ;
                WBWRSING        wb_data_to_wb,          WB_UART_DIV_LOW         ; DIV_LOW = 0x02
 
                LOAD            wb_data_to_wb,          0x00                            ;
                WBWRSING        wb_data_to_wb,          WB_UART_DIV_HIGH        ; DIV_HIGH = 0x00
 
;               LOAD            wb_data_to_wb,          0x04                            ;
;               WBWRSING        wb_data_to_wb,          WB_UART_STATUS          ; STATUS = 0x04 : rx_irqen=1
 
                LOAD            wb_data_to_wb,          0x08                            ;
                WBWRSING        wb_data_to_wb,          WB_UART_STATUS          ; STATUS = 0x08 : tx_irqen=1
 
                ; write a data to the UART
                LOAD            wb_data_to_wb,          0x55                            ;
                WBWRSING        wb_data_to_wb,          WB_UART_DATA            ;
 
                ; enable interrupts
                EINT
end:
                JUMP    end
                ;
 
;       *************************
;       Interrupt Service Routine
;       *************************
ISR:
                WBRDSING        wb_data_from_wb,        WB_UART_STATUS          ; read the status
 
                ADD                     wb_data_to_wb,          0x01
 
                WBWRSING        wb_data_to_wb,          WB_UART_DATA            ;
 
 
                RETI      ENABLE
;               RETI      DISABLE
;       *************************
;       End ISR Interrupt Handler
;       *************************
 
                .ORG    0x3FF
VECTOR:
                JUMP    ISR

Line No.	Rev	Author	Line
1	30	ameziti	`; project : copyBlaze 8 bit processor`
2			`; file name : wb_uart.asm`
3			`; author : abdAllah Meziti`
4			`; licence : LGPL`
5
6			`; this programm test the wishbone copyBlaze instruction.`
7			`; it use this module :`
8			`; wb_uart_08.vhd`
9
10	43	ameziti	`WB_UART_STATUS .EQU 0x00`
11			`WB_UART_DIV_LOW .EQU 0x04`
12			`WB_UART_DIV_HIGH .EQU 0x05`
13			`WB_UART_DATA .EQU 0x08`
14
15			`wb_data_to_wb .EQU s0`
16			`wb_data_from_wb .EQU s1`
17	30	ameziti	`;`
18
19			`; ==========================================================`
20			`start:`
21			`; ==========================================================`
22
23	43	ameziti	`; initialize the wb_uart registers`
24			`LOAD wb_data_to_wb, 0x02 ;`
25			`WBWRSING wb_data_to_wb, WB_UART_DIV_LOW ; DIV_LOW = 0x02`
26	30	ameziti
27	43	ameziti	`LOAD wb_data_to_wb, 0x00 ;`
28			`WBWRSING wb_data_to_wb, WB_UART_DIV_HIGH ; DIV_HIGH = 0x00`
29
30			`; LOAD wb_data_to_wb, 0x04 ;`
31			`; WBWRSING wb_data_to_wb, WB_UART_STATUS ; STATUS = 0x04 : rx_irqen=1`
32
33			`LOAD wb_data_to_wb, 0x08 ;`
34			`WBWRSING wb_data_to_wb, WB_UART_STATUS ; STATUS = 0x08 : tx_irqen=1`
35
36			`; write a data to the UART`
37			`LOAD wb_data_to_wb, 0x55 ;`
38			`WBWRSING wb_data_to_wb, WB_UART_DATA ;`
39
40			`; enable interrupts`
41			`EINT`
42	30	ameziti	`end:`
43			`JUMP end`
44			`;`
45	43	ameziti
46			`; *************************`
47			`; Interrupt Service Routine`
48			`; *************************`
49			`ISR:`
50			`WBRDSING wb_data_from_wb, WB_UART_STATUS ; read the status`
51
52			`ADD wb_data_to_wb, 0x01`
53
54			`WBWRSING wb_data_to_wb, WB_UART_DATA ;`
55
56
57			`RETI ENABLE`
58			`; RETI DISABLE`
59			`; *************************`
60			`; End ISR Interrupt Handler`
61			`; *************************`
62
63			`.ORG 0x3FF`
64			`VECTOR:`
65			`JUMP ISR`

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[/] [copyblaze/] [trunk/] [copyblaze/] [sw/] [code/] [pBlaze/] [wb_uart/] [wb_uart.asm] - Blame information for rev 43