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[/] [cordic_atan_iq/] [cordic_atan_iq.sv] - Blame information for rev 8

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`ifndef _cordic_atan_iq_
`define _cordic_atan_iq_
`include "atan32_table.sv"
 
// Calc delay 32 clocks
module cordic_atan_iq(clk, IS, QS, angle, coe_radius);
        import ConstPkg::atan_table;
        localparam STEPS = ConstPkg::STEPS;
 
        input wire clk; // todo: clk_ena
        input wire signed [29:0] IS, QS;
        output signed [31:0] angle;
        output [31:0] coe_radius; // sqrt(I^2 + Q^2) / K
 
        wire isign;
        reg isign_reg;
        reg signed [31:0] x[STEPS], y[STEPS-1]; // + 2 bit for carry (sqrt(2) * (1 + k)) todo: x unsigned and increase input vector width
        reg signed [31:0] a[STEPS-1:1];
 
        assign isign = IS < 'sh0;
 
        // rotate to working range -90..+90
        always_ff @(posedge clk) begin
                x[0] <= (isign) ? 32'sh0 - IS : 32'sh0 + IS;
                y[0] <= (isign) ? 32'sh0 + QS : 32'sh0 - QS; // invert y sign for true result sign
                isign_reg <= isign; // save rotate on 180 deg
        end
 
        always_ff @(posedge clk)
                if (y[0] > 'sh0)
                        begin
                                x[1] <= x[0] + y[0];
                                y[1] <= y[0] - x[0];
 
                                if (isign_reg)
                                        a[1] <= signed'({1'b0, {31{1'b1}}}) - (atan_table[0] - 1'b1); // rotate 180 - 45 deg
                                else
                                        a[1] <= -atan_table[0]; // rotate -45 deg
                        end
                else
                        begin
                                x[1] <= x[0] - y[0];
                                y[1] <= y[0] + x[0];
 
                                if (isign_reg)
                                        a[1] <= signed'({1'b1, {31{1'b0}}}) + atan_table[0]; // rotate -180 + 45 deg
                                else
                                        a[1] <= atan_table[0]; // rotate +45 deg
                        end
 
        genvar i;
        generate for(i = 2; i < STEPS-1; i++)
                begin :gen
                        always_ff @(posedge clk)
                                if (y[i-1] > 'sh0)
                                        begin
                                                x[i] <= x[i-1] + (y[i-1] >>> (i - 1));
                                                y[i] <= y[i-1] - (x[i-1] >>> (i - 1));
                                                a[i] <= a[i-1] - atan_table[i-1];
                                        end
                                else
                                        begin
                                                x[i] <= x[i-1] - (y[i-1] >>> (i - 1));
                                                y[i] <= y[i-1] + (x[i-1] >>> (i - 1));
                                                a[i] <= a[i-1] + atan_table[i-1];
                                        end
                end
        endgenerate
 
        always_ff @(posedge clk)
                if (y[STEPS-2] > 'sh0)
                        begin
                                x[STEPS-1] <= x[STEPS-2] + (y[STEPS-2] >>> (STEPS-2));
                                a[STEPS-1] <= a[STEPS-2] - atan_table[STEPS-2];
                        end
                else
                        begin
                                x[STEPS-1] <= x[STEPS-2] - (y[STEPS-2] >>> (STEPS-2));
                                a[STEPS-1] <= a[STEPS-2] + atan_table[STEPS-2];
                        end
 
        assign angle = a[STEPS-1];
        assign coe_radius = x[STEPS-1];
 
endmodule : cordic_atan_iq
 
`endif

Line No.	Rev	Author	Line
1	8	Papayaved	`ifndef _cordic_atan_iq_
2			`define _cordic_atan_iq_
3			`include "atan32_table.sv"
4
5			`// Calc delay 32 clocks`
6			`module cordic_atan_iq(clk, IS, QS, angle, coe_radius);`
7			`import ConstPkg::atan_table;`
8			`localparam STEPS = ConstPkg::STEPS;`
9
10			`input wire clk; // todo: clk_ena`
11			`input wire signed [29:0] IS, QS;`
12			`output signed [31:0] angle;`
13			`output [31:0] coe_radius; // sqrt(I^2 + Q^2) / K`
14
15			`wire isign;`
16			`reg isign_reg;`
17			`reg signed [31:0] x[STEPS], y[STEPS-1]; // + 2 bit for carry (sqrt(2) * (1 + k)) todo: x unsigned and increase input vector width`
18			`reg signed [31:0] a[STEPS-1:1];`
19
20			`assign isign = IS < 'sh0;`
21
22			`// rotate to working range -90..+90`
23			`always_ff @(posedge clk) begin`
24			`x[0] <= (isign) ? 32'sh0 - IS : 32'sh0 + IS;`
25			`y[0] <= (isign) ? 32'sh0 + QS : 32'sh0 - QS; // invert y sign for true result sign`
26			`isign_reg <= isign; // save rotate on 180 deg`
27			`end`
28
29			`always_ff @(posedge clk)`
30			`if (y[0] > 'sh0)`
31			`begin`
32			`x[1] <= x[0] + y[0];`
33			`y[1] <= y[0] - x[0];`
34
35			`if (isign_reg)`
36			`a[1] <= signed'({1'b0, {31{1'b1}}}) - (atan_table[0] - 1'b1); // rotate 180 - 45 deg`
37			`else`
38			`a[1] <= -atan_table[0]; // rotate -45 deg`
39			`end`
40			`else`
41			`begin`
42			`x[1] <= x[0] - y[0];`
43			`y[1] <= y[0] + x[0];`
44
45			`if (isign_reg)`
46			`a[1] <= signed'({1'b1, {31{1'b0}}}) + atan_table[0]; // rotate -180 + 45 deg`
47			`else`
48			`a[1] <= atan_table[0]; // rotate +45 deg`
49			`end`
50
51			`genvar i;`
52			`generate for(i = 2; i < STEPS-1; i++)`
53			`begin :gen`
54			`always_ff @(posedge clk)`
55			`if (y[i-1] > 'sh0)`
56			`begin`
57			`x[i] <= x[i-1] + (y[i-1] >>> (i - 1));`
58			`y[i] <= y[i-1] - (x[i-1] >>> (i - 1));`
59			`a[i] <= a[i-1] - atan_table[i-1];`
60			`end`
61			`else`
62			`begin`
63			`x[i] <= x[i-1] - (y[i-1] >>> (i - 1));`
64			`y[i] <= y[i-1] + (x[i-1] >>> (i - 1));`
65			`a[i] <= a[i-1] + atan_table[i-1];`
66			`end`
67			`end`
68			`endgenerate`
69
70			`always_ff @(posedge clk)`
71			`if (y[STEPS-2] > 'sh0)`
72			`begin`
73			`x[STEPS-1] <= x[STEPS-2] + (y[STEPS-2] >>> (STEPS-2));`
74			`a[STEPS-1] <= a[STEPS-2] - atan_table[STEPS-2];`
75			`end`
76			`else`
77			`begin`
78			`x[STEPS-1] <= x[STEPS-2] - (y[STEPS-2] >>> (STEPS-2));`
79			`a[STEPS-1] <= a[STEPS-2] + atan_table[STEPS-2];`
80			`end`
81
82			`assign angle = a[STEPS-1];`
83			`assign coe_radius = x[STEPS-1];`
84
85			`endmodule : cordic_atan_iq`
86
87			`endif

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[/] [cordic_atan_iq/] [cordic_atan_iq.sv] - Blame information for rev 8