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Subversion Repositories core1990_interlaken

[/] [core1990_interlaken/] [trunk/] [gateware/] [simulation/] [interlaken_receiver_tb.vhd] - Blame information for rev 6

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library ieee;
use ieee.std_logic_1164.all;
 
entity testbench_interlaken_receiver is
end entity testbench_interlaken_receiver;
 
architecture tb_interlaken_receiver of testbench_interlaken_receiver is
 
        signal write_clk   : std_logic;
        signal clk   : std_logic;
        signal reset : std_logic;
 
        signal RX_Data_In       : std_logic_vector(66 downto 0);
        signal RX_Data_Out : std_logic_vector (63 downto 0); -- later 66 downto 0
 
        signal RX_Enable        : std_logic;                         -- Enable the TX
        signal RX_SOP           : std_logic;                         -- Start of Packet
        signal RX_ValidBytes    : std_logic_vector(2 downto 0);      -- Valid bytes packet contains
        signal RX_EOP           : std_logic;                         -- End of Packet
        signal RX_FlowControl   : std_logic_vector(15 downto 0);     -- Flow control data (yet unutilized)
        signal RX_Channel       : std_logic_vector(7 downto 0);      -- Select transmit channel (yet unutilized)
 
        signal RX_Link_Up       : std_logic;
 
        constant CLK_PERIOD : time := 10 ns;
 
begin
  uut : entity work.interlaken_receiver
  port map (
    write_clk => write_clk,
    clk => clk,
    reset => reset,
    RX_Data_In => RX_Data_In,
    RX_Data_Out => RX_Data_Out,
    RX_Enable => RX_Enable,
    RX_SOP => RX_SOP,
        RX_ValidBytes => RX_ValidBytes,
        RX_EOP => RX_EOP,
        RX_FlowControl => RX_FlowControl,
        RX_Channel => RX_Channel,
 
        RX_Link_Up => RX_Link_Up
  );
 
   Clk_process :process
     begin
          write_clk <= '1';
          clk <= '1';
          wait for CLK_PERIOD/2;  --for half of clock period clk stays at '0'.
          clk <= '0';
          write_clk <= '0';
          wait for CLK_PERIOD/2;  --for next half of clock period clk stays at '1'.
     end process;
 
    simulation : process
    begin
        wait for 1 ps;
        RX_Data_In <= (others=>'0');
        reset <= '1';
 
 
        wait for CLK_PERIOD;
 
        wait for CLK_PERIOD;
        --FIFO_meta <= '1';
        reset <= '0';
        reset <= '0';
        RX_Data_in <= "101" & X"1f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "101" & X"3f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "101" & X"4f21a2a3a4a5a6a7";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "101" & X"5f5e5a5c5b60f2a0";
        wait for CLK_PERIOD;
 
        RX_Data_In  <= "001" & X"635e22a3a4a5a7a7";
        wait for CLK_PERIOD;
 
        RX_Data_In  <= "101" & X"70000FFF000000F0";
        wait for CLK_PERIOD*2;
 
 
        RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        wait for CLK_PERIOD;
 
 
        RX_Data_In  <= "110" & X"8050505050050505";
        wait for CLK_PERIOD*3;
 
        RX_Data_In  <= "101" & X"9486576758050505";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"60b35d5dc4a582a7";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD*12;
 
        RX_Data_In <= "111" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"1f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"70000FFF000000F0";
        wait for CLK_PERIOD*21;
 
        RX_Data_In <= "001" & X"78f6_78f6_78f6_78f6"; --Sync & 
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"3f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"4f21a2a3a4a5a6a7";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"5f5e5a5c5b60f2a0";
        wait for CLK_PERIOD;
 
        RX_Data_In  <= "001" & X"635e22a3a4a5a7a7";
        wait for CLK_PERIOD;
 
        RX_Data_In  <= "101" & X"70000FFF000000F0";
        wait for CLK_PERIOD*2;
 
        RX_Data_In <= "001" & X"2Bfe_d100_19e0_1dbd";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"70000FFF000000F0";
        wait for CLK_PERIOD*2;
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"3f5e5d5c5b5a5958";
        wait for CLK_PERIOD*10;
 
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"8050505050050505";
        wait for CLK_PERIOD*3;
 
        RX_Data_In <= "001" & X"9486576758050505";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "101" & X"4f21a2a3a4a5a6a7";
        wait for CLK_PERIOD*20;
 
 
        RX_Data_In <= "101" & X"5f5e5a5c5b60f2a0";
        wait for CLK_PERIOD*10;
 
        RX_Data_In  <= "001" & X"635e22a3a4a5a7a7";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"5f5e5a5c5b60f2a0";
        wait for CLK_PERIOD;
 
        RX_Data_In  <= "001" & X"635e22a3a4a5a7a7";
        wait for CLK_PERIOD;
 
        RX_Data_In  <= "101" & X"70000FFF000000F0";
        wait for CLK_PERIOD*6;
 
        RX_Data_In <= "001" & X"8050505050050505";
        wait for CLK_PERIOD*9;
 
 
        RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In  <= "110" & X"8050505050050505";
        wait for CLK_PERIOD*3;
 
        RX_Data_In  <= "101" & X"9486576758050505";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"1f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6"; --1
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"3f5e5d5c5b5a5958";
        wait for CLK_PERIOD*23;
 
        RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6";--2
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";
        wait for CLK_PERIOD*23;
 
        RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6";--3
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"70000FFF000000F0";
        wait for CLK_PERIOD*23;
 
 
 
        RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6";--4 -> lock
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"70000FFF000000F0";
        wait for CLK_PERIOD*21;
 
        RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6"; --Sync & 
        wait for CLK_PERIOD;
 
        RX_Data_In <= "010" & X"2Bfe_d100_19e0_1dbd";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "010" & X"1e1e_1e1e_1e1e_1e1e";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"70000FFF000000F0";
        wait for CLK_PERIOD*2;
 
        RX_Data_In <= "010" & X"E000_0001_0000_0000";
        wait for CLK_PERIOD*3;
 
        RX_Data_In <= "001" & X"9486576758050505";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"60b35d5dc4a582a7";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD*5;
 
        RX_Data_In <= "001" & X"1f5e5d5c5b5a5958";
        wait for CLK_PERIOD*3;
 
        RX_Data_In <= "010" & X"6400_0000_6222_431a";
        wait for clk_period;
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"9486576758050505";
        wait for CLK_PERIOD*19;
 
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "001" & X"8050505050050505";
        wait for CLK_PERIOD*3;
 
        RX_Data_In <= "001" & X"9486576758050505";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "001" & X"60b35d5dc4a582a7";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD*12;
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"1f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "001" & X"3f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "001" & X"4f21a2a3a4a5a6a7";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"635e22a3a4a5a7a7";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"635e22a3a4a5a7a7";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"70000FFF000000F0";
        wait for CLK_PERIOD*2;
 
 
        RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"8050505050050505";
        wait for CLK_PERIOD*3;
 
        RX_Data_In <= "001" & X"9486576758050505";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "001" & X"60b35d5dc4a582a7";
        wait for CLK_PERIOD*60;
 
        RX_Data_In <= "001" & X"8050505050050505";
        wait for CLK_PERIOD*3;
 
        RX_Data_In <= "001" & X"9486576758050505";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "001" & X"60b35d5dc4a582a7";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "101" & X"60b35d5dc4a582a7";
        wait for CLK_PERIOD*60;
 
        RX_Data_In  <= "110" & X"8050505050050505";
        wait for CLK_PERIOD*3;
 
        RX_Data_In  <= "101" & X"9486576758050505";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "101" & X"60b35d5dc4a582a7";
        wait for CLK_PERIOD;
 
 
        RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";
        wait for CLK_PERIOD*12;
 
        RX_Data_In <= "111" & X"2c8e5d5c5b5a5958";
        wait for CLK_PERIOD;
 
        RX_Data_In <= "101" & X"1f5e5d5c5b5a5958";
        wait for CLK_PERIOD*26;
 
        RX_Data_In <= "111" & X"2c8e5d5c5b5a5958";
        wait for CLK_PERIOD*18;
 
        RX_Data_In <= "101" & X"1f5e5d5c5b5a5958";
        wait for CLK_PERIOD;
        wait;
        --FIFO_meta <= '0';
        wait for CLK_PERIOD*4;
        --FIFO_meta <= '1';
        wait;
    end process;
 
end architecture tb_interlaken_receiver;
 
 

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Subversion Repositories core1990_interlaken

[/] [core1990_interlaken/] [trunk/] [gateware/] [simulation/] [interlaken_receiver_tb.vhd] - Blame information for rev 6

Line No.	Rev	Author	Line
1	6	N.Boukadid	`library ieee;`
2			`use ieee.std_logic_1164.all;`
3
4			`entity testbench_interlaken_receiver is`
5			`end entity testbench_interlaken_receiver;`
6
7			`architecture tb_interlaken_receiver of testbench_interlaken_receiver is`
8
9			`signal write_clk : std_logic;`
10			`signal clk : std_logic;`
11			`signal reset : std_logic;`
12
13			`signal RX_Data_In : std_logic_vector(66 downto 0);`
14			`signal RX_Data_Out : std_logic_vector (63 downto 0); -- later 66 downto 0`
15
16			`signal RX_Enable : std_logic; -- Enable the TX`
17			`signal RX_SOP : std_logic; -- Start of Packet`
18			`signal RX_ValidBytes : std_logic_vector(2 downto 0); -- Valid bytes packet contains`
19			`signal RX_EOP : std_logic; -- End of Packet`
20			`signal RX_FlowControl : std_logic_vector(15 downto 0); -- Flow control data (yet unutilized)`
21			`signal RX_Channel : std_logic_vector(7 downto 0); -- Select transmit channel (yet unutilized)`
22
23			`signal RX_Link_Up : std_logic;`
24
25			`constant CLK_PERIOD : time := 10 ns;`
26
27			`begin`
28			`uut : entity work.interlaken_receiver`
29			`port map (`
30			`write_clk => write_clk,`
31			`clk => clk,`
32			`reset => reset,`
33			`RX_Data_In => RX_Data_In,`
34			`RX_Data_Out => RX_Data_Out,`
35			`RX_Enable => RX_Enable,`
36			`RX_SOP => RX_SOP,`
37			`RX_ValidBytes => RX_ValidBytes,`
38			`RX_EOP => RX_EOP,`
39			`RX_FlowControl => RX_FlowControl,`
40			`RX_Channel => RX_Channel,`
41
42			`RX_Link_Up => RX_Link_Up`
43			`);`
44
45			`Clk_process :process`
46			`begin`
47			`write_clk <= '1';`
48			`clk <= '1';`
49			`wait for CLK_PERIOD/2; --for half of clock period clk stays at '0'.`
50			`clk <= '0';`
51			`write_clk <= '0';`
52			`wait for CLK_PERIOD/2; --for next half of clock period clk stays at '1'.`
53			`end process;`
54
55			`simulation : process`
56			`begin`
57			`wait for 1 ps;`
58			`RX_Data_In <= (others=>'0');`
59			`reset <= '1';`
60
61
62			`wait for CLK_PERIOD;`
63
64			`wait for CLK_PERIOD;`
65			`--FIFO_meta <= '1';`
66			`reset <= '0';`
67			`reset <= '0';`
68			`RX_Data_in <= "101" & X"1f5e5d5c5b5a5958";`
69			`wait for CLK_PERIOD;`
70
71
72			`RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";`
73			`wait for CLK_PERIOD;`
74
75
76			`RX_Data_In <= "101" & X"3f5e5d5c5b5a5958";`
77			`wait for CLK_PERIOD;`
78
79
80			`RX_Data_In <= "101" & X"4f21a2a3a4a5a6a7";`
81			`wait for CLK_PERIOD;`
82
83
84			`RX_Data_In <= "101" & X"5f5e5a5c5b60f2a0";`
85			`wait for CLK_PERIOD;`
86
87			`RX_Data_In <= "001" & X"635e22a3a4a5a7a7";`
88			`wait for CLK_PERIOD;`
89
90			`RX_Data_In <= "101" & X"70000FFF000000F0";`
91			`wait for CLK_PERIOD*2;`
92
93
94			`RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";`
95			`wait for CLK_PERIOD;`
96
97			`wait for CLK_PERIOD;`
98
99
100			`RX_Data_In <= "110" & X"8050505050050505";`
101			`wait for CLK_PERIOD*3;`
102
103			`RX_Data_In <= "101" & X"9486576758050505";`
104			`wait for CLK_PERIOD;`
105
106			`RX_Data_In <= "101" & X"60b35d5dc4a582a7";`
107			`wait for CLK_PERIOD;`
108
109			`RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";`
110			`wait for CLK_PERIOD*12;`
111
112			`RX_Data_In <= "111" & X"2f5e5d5c5b5a5958";`
113			`wait for CLK_PERIOD;`
114
115			`RX_Data_In <= "101" & X"1f5e5d5c5b5a5958";`
116			`wait for CLK_PERIOD;`
117
118			`RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";`
119			`wait for CLK_PERIOD;`
120
121			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
122			`wait for CLK_PERIOD;`
123
124			`RX_Data_In <= "001" & X"70000FFF000000F0";`
125			`wait for CLK_PERIOD*21;`
126
127			`RX_Data_In <= "001" & X"78f6_78f6_78f6_78f6"; --Sync &`
128			`wait for CLK_PERIOD;`
129
130			`RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";`
131			`wait for CLK_PERIOD;`
132
133			`RX_Data_In <= "101" & X"3f5e5d5c5b5a5958";`
134			`wait for CLK_PERIOD;`
135
136			`RX_Data_In <= "101" & X"4f21a2a3a4a5a6a7";`
137			`wait for CLK_PERIOD;`
138
139			`RX_Data_In <= "101" & X"5f5e5a5c5b60f2a0";`
140			`wait for CLK_PERIOD;`
141
142			`RX_Data_In <= "001" & X"635e22a3a4a5a7a7";`
143			`wait for CLK_PERIOD;`
144
145			`RX_Data_In <= "101" & X"70000FFF000000F0";`
146			`wait for CLK_PERIOD*2;`
147
148			`RX_Data_In <= "001" & X"2Bfe_d100_19e0_1dbd";`
149			`wait for CLK_PERIOD;`
150
151			`RX_Data_In <= "001" & X"70000FFF000000F0";`
152			`wait for CLK_PERIOD*2;`
153
154			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
155			`wait for CLK_PERIOD;`
156
157			`RX_Data_In <= "101" & X"3f5e5d5c5b5a5958";`
158			`wait for CLK_PERIOD*10;`
159
160
161			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
162			`wait for CLK_PERIOD;`
163
164			`RX_Data_In <= "001" & X"8050505050050505";`
165			`wait for CLK_PERIOD*3;`
166
167			`RX_Data_In <= "001" & X"9486576758050505";`
168			`wait for CLK_PERIOD;`
169
170
171			`RX_Data_In <= "101" & X"4f21a2a3a4a5a6a7";`
172			`wait for CLK_PERIOD*20;`
173
174
175			`RX_Data_In <= "101" & X"5f5e5a5c5b60f2a0";`
176			`wait for CLK_PERIOD*10;`
177
178			`RX_Data_In <= "001" & X"635e22a3a4a5a7a7";`
179			`wait for CLK_PERIOD;`
180
181			`RX_Data_In <= "101" & X"5f5e5a5c5b60f2a0";`
182			`wait for CLK_PERIOD;`
183
184			`RX_Data_In <= "001" & X"635e22a3a4a5a7a7";`
185			`wait for CLK_PERIOD;`
186
187			`RX_Data_In <= "101" & X"70000FFF000000F0";`
188			`wait for CLK_PERIOD*6;`
189
190			`RX_Data_In <= "001" & X"8050505050050505";`
191			`wait for CLK_PERIOD*9;`
192
193
194			`RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";`
195			`wait for CLK_PERIOD;`
196
197			`RX_Data_In <= "110" & X"8050505050050505";`
198			`wait for CLK_PERIOD*3;`
199
200			`RX_Data_In <= "101" & X"9486576758050505";`
201			`wait for CLK_PERIOD;`
202
203			`RX_Data_In <= "001" & X"1f5e5d5c5b5a5958";`
204			`wait for CLK_PERIOD;`
205
206			`RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6"; --1`
207			`wait for CLK_PERIOD;`
208
209			`RX_Data_In <= "001" & X"3f5e5d5c5b5a5958";`
210			`wait for CLK_PERIOD*23;`
211
212			`RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6";--2`
213			`wait for CLK_PERIOD;`
214
215			`RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";`
216			`wait for CLK_PERIOD*23;`
217
218			`RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6";--3`
219			`wait for CLK_PERIOD;`
220
221			`RX_Data_In <= "001" & X"70000FFF000000F0";`
222			`wait for CLK_PERIOD*23;`
223
224
225
226			`RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6";--4 -> lock`
227			`wait for CLK_PERIOD;`
228
229			`RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";`
230			`wait for CLK_PERIOD;`
231
232			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
233			`wait for CLK_PERIOD;`
234
235			`RX_Data_In <= "001" & X"70000FFF000000F0";`
236			`wait for CLK_PERIOD*21;`
237
238			`RX_Data_In <= "010" & X"78f6_78f6_78f6_78f6"; --Sync &`
239			`wait for CLK_PERIOD;`
240
241			`RX_Data_In <= "010" & X"2Bfe_d100_19e0_1dbd";`
242			`wait for CLK_PERIOD;`
243
244			`RX_Data_In <= "010" & X"1e1e_1e1e_1e1e_1e1e";`
245			`wait for CLK_PERIOD;`
246
247			`RX_Data_In <= "001" & X"70000FFF000000F0";`
248			`wait for CLK_PERIOD*2;`
249
250			`RX_Data_In <= "010" & X"E000_0001_0000_0000";`
251			`wait for CLK_PERIOD*3;`
252
253			`RX_Data_In <= "001" & X"9486576758050505";`
254			`wait for CLK_PERIOD;`
255
256			`RX_Data_In <= "001" & X"60b35d5dc4a582a7";`
257			`wait for CLK_PERIOD;`
258
259			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
260			`wait for CLK_PERIOD*5;`
261
262			`RX_Data_In <= "001" & X"1f5e5d5c5b5a5958";`
263			`wait for CLK_PERIOD*3;`
264
265			`RX_Data_In <= "010" & X"6400_0000_6222_431a";`
266			`wait for clk_period;`
267
268			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
269			`wait for CLK_PERIOD;`
270
271			`RX_Data_In <= "001" & X"9486576758050505";`
272			`wait for CLK_PERIOD*19;`
273
274			`wait for CLK_PERIOD;`
275
276
277			`RX_Data_In <= "001" & X"8050505050050505";`
278			`wait for CLK_PERIOD*3;`
279
280			`RX_Data_In <= "001" & X"9486576758050505";`
281			`wait for CLK_PERIOD;`
282
283
284			`RX_Data_In <= "001" & X"60b35d5dc4a582a7";`
285			`wait for CLK_PERIOD;`
286
287
288			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
289			`wait for CLK_PERIOD*12;`
290
291			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
292			`wait for CLK_PERIOD;`
293
294			`RX_Data_In <= "001" & X"1f5e5d5c5b5a5958";`
295			`wait for CLK_PERIOD;`
296
297
298			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
299			`wait for CLK_PERIOD;`
300
301
302			`RX_Data_In <= "001" & X"3f5e5d5c5b5a5958";`
303			`wait for CLK_PERIOD;`
304
305
306			`RX_Data_In <= "001" & X"4f21a2a3a4a5a6a7";`
307			`wait for CLK_PERIOD;`
308
309
310			`RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";`
311			`wait for CLK_PERIOD;`
312
313			`RX_Data_In <= "001" & X"635e22a3a4a5a7a7";`
314			`wait for CLK_PERIOD;`
315
316			`RX_Data_In <= "001" & X"5f5e5a5c5b60f2a0";`
317			`wait for CLK_PERIOD;`
318
319			`RX_Data_In <= "001" & X"635e22a3a4a5a7a7";`
320			`wait for CLK_PERIOD;`
321
322			`RX_Data_In <= "001" & X"70000FFF000000F0";`
323			`wait for CLK_PERIOD*2;`
324
325
326			`RX_Data_In <= "001" & X"2f5e5d5c5b5a5958";`
327			`wait for CLK_PERIOD;`
328
329			`RX_Data_In <= "001" & X"8050505050050505";`
330			`wait for CLK_PERIOD*3;`
331
332			`RX_Data_In <= "001" & X"9486576758050505";`
333			`wait for CLK_PERIOD;`
334
335			`RX_Data_In <= "001" & X"60b35d5dc4a582a7";`
336			`wait for CLK_PERIOD*60;`
337
338			`RX_Data_In <= "001" & X"8050505050050505";`
339			`wait for CLK_PERIOD*3;`
340
341			`RX_Data_In <= "001" & X"9486576758050505";`
342			`wait for CLK_PERIOD;`
343
344
345			`RX_Data_In <= "001" & X"60b35d5dc4a582a7";`
346			`wait for CLK_PERIOD;`
347
348
349			`RX_Data_In <= "101" & X"60b35d5dc4a582a7";`
350			`wait for CLK_PERIOD*60;`
351
352			`RX_Data_In <= "110" & X"8050505050050505";`
353			`wait for CLK_PERIOD*3;`
354
355			`RX_Data_In <= "101" & X"9486576758050505";`
356			`wait for CLK_PERIOD;`
357
358
359			`RX_Data_In <= "101" & X"60b35d5dc4a582a7";`
360			`wait for CLK_PERIOD;`
361
362
363			`RX_Data_In <= "101" & X"2f5e5d5c5b5a5958";`
364			`wait for CLK_PERIOD*12;`
365
366			`RX_Data_In <= "111" & X"2c8e5d5c5b5a5958";`
367			`wait for CLK_PERIOD;`
368
369			`RX_Data_In <= "101" & X"1f5e5d5c5b5a5958";`
370			`wait for CLK_PERIOD*26;`
371
372			`RX_Data_In <= "111" & X"2c8e5d5c5b5a5958";`
373			`wait for CLK_PERIOD*18;`
374
375			`RX_Data_In <= "101" & X"1f5e5d5c5b5a5958";`
376			`wait for CLK_PERIOD;`
377			`wait;`
378			`--FIFO_meta <= '0';`
379			`wait for CLK_PERIOD*4;`
380			`--FIFO_meta <= '1';`
381			`wait;`
382			`end process;`
383
384			`end architecture tb_interlaken_receiver;`
385
386