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[/] [core_arm/] [trunk/] [syn/] [synplify/] [core.prj] - Blame information for rev 4

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source "core_files.tcl"
add_file -constraint "core.sdc"
 
impl -add syn
 
set_option -technology VIRTEX-E
set_option -part XCV1000E
set_option -package FG1156
set_option -speed_grade -6
 
set_option -default_enum_encoding onehot
set_option -symbolic_fsm_compiler 0
set_option -resource_sharing 0
set_option -use_fsm_explorer 0
set_option -top_module "core"
 
set_option -frequency 45.000
set_option -fanout_limit 100
set_option -disable_io_insertion 0
set_option -pipe 1
set_option -modular 0
set_option -retiming 1
 
set_option -write_verilog 0
set_option -write_vhdl 0
 
set_option -write_apr_constraint 0
 
project -result_file "./core.edf"
 
set_option -compiler_compatible 0
impl -active "syn"

Line No.	Rev	Author	Line
1	2	tarookumic
2			`source "core_files.tcl"`
3			`add_file -constraint "core.sdc"`
4
5			`impl -add syn`
6
7			`set_option -technology VIRTEX-E`
8			`set_option -part XCV1000E`
9			`set_option -package FG1156`
10			`set_option -speed_grade -6`
11
12			`set_option -default_enum_encoding onehot`
13			`set_option -symbolic_fsm_compiler 0`
14			`set_option -resource_sharing 0`
15			`set_option -use_fsm_explorer 0`
16			`set_option -top_module "core"`
17
18			`set_option -frequency 45.000`
19			`set_option -fanout_limit 100`
20			`set_option -disable_io_insertion 0`
21			`set_option -pipe 1`
22			`set_option -modular 0`
23			`set_option -retiming 1`
24
25			`set_option -write_verilog 0`
26			`set_option -write_vhdl 0`
27
28			`set_option -write_apr_constraint 0`
29
30			`project -result_file "./core.edf"`
31
32			`set_option -compiler_compatible 0`
33			`impl -active "syn"`

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[/] [core_arm/] [trunk/] [syn/] [synplify/] [core.prj] - Blame information for rev 4